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ROG Crosshair VI overclocking thread - Page 1155

post #11541 of 17652
Quote:
Originally Posted by elmor View Post

It is what it is, your theory seems sound. VDDP is similar to VCCIO on Intel platform. From our testing it didn't help much with DRAM, but it's possible it can affect things slightly. I'd recommend the same limits as SOC.
I am currently testing 4.0 + 3300-CL14 using VDDP 0.94 V and SOC 1.0 V. It's also worth mentioning that this successfully cold boot using BIOS 0003.
post #11542 of 17652

@ Elmor.

 

Just a quick note to say that on win 10 Creators, for me, the ZenStates program is back to not starting the service. It seems to install the service ok now but cant start it. Before when I got a memory interface file not found error it would start at the next attempt now it just keeps trying to start the AsusZsSrv service and failing.

Manual attempts to start yield error "Windows could not start AsusZsSrv service on Local Computer. Error 1067:The process terminated unexpectedly."

 

cheers.


Edited by dorbot - 4/25/17 at 11:56pm
post #11543 of 17652
Quote:
Originally Posted by Reikoji View Post

That may be so, but I look at it this way. a 3200 14 cas kit was tested to run at that much, and they released it as such. a 4266 kit 19 cas was also tested to run stable as such. I see a kit tested to run much faster and passing would easily be able to run at the in between levels. When we get a higher strap, say 3600, i would think a kit tested to run faster would have better fortune running on the 3600 strap than the kit not tested to run that fast.
I have yet to find a difference between my TridentZ 3200-CL14 and 4000-CL18 kit with the current Agesa. Out of the four kits I tested the Flare X curiously was the worst, it took several full POST cycles to work with settings that the other kits just breezed through.

One thing to take note of is that the 4000-CL18 kit is listed as 1.35 V in its specs. To me this seems to be the most important difference to 3200-CL14 kits that may need more voltage to get up there.
post #11544 of 17652
@Timur Born

Many thanks for the shares smile.gif , +rep thumb.gif . I nearly flashed 0003 yesterday, still hesitant. Reading your experience I'm now thinking I may wish to wink.gif .
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post #11545 of 17652
Quote:
Originally Posted by bavarianblessed View Post

I'm wondering if the zenstates app is using the voltage offset you have set in the BIOS or if it's applying an auto setting of some sort.
Either way definitely disable core performance boost. It throws to many variables in trying to obtain a stable overclock.

CPB was always disabled from launch till new bios versions for me. Always disable turbo modes on previous OC's. But since new bios version I thought playing less with values (leave at default or auto) would be best..

Thanks to @gupsterg, he told us whew pages back setting CPB on disabled would do the trick.

Still need to be fixed in bios. OC mode needs to disable this function automatically like it does with other variables.
post #11546 of 17652
@elmor
Inkey and Myself found why voltage regulation does not work.
If we change BCLK to anything else than 100 changing Pstate VID in bios or Zen States does not work AT ALL. Bet You know it but just in case pointing it out smile.gif
post #11547 of 17652
I am using 103.2 BCLK and can happily use P-state VID in both BIOS and ZenStates (0.2), including offset. BIOS 0003 here.

Furthermore I do not specifically disable Core Performance Boost and do not see my CPU change frequency higher than what I have set in BIOS (neither using fixed OC or using P-state OC). Frankly, I would be happy if it did that, because then it would use 4.1 Ghz for 1/2 core tasks instead of just using 4.0.

On a side note: I just passed 10 loops of ITB AVX at 4.0 + 3300-CL14 after decreasing SOC to 0.95 V via offset. Let's try to lower VDDP a notch more and then see if I can squeeze more power-saving out of it during idle times (60 W idle still is a bit excessive wink.gif).
post #11548 of 17652
60W? I'm getting 17W for CPU vcore, 32W together with soc, without Pstates.

idlep1sb0.png
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post #11549 of 17652
Quote:
Originally Posted by skline00 View Post

All other settings in the BIOS are auto and I use Zenstate as follows:

P0=40x @1.39375v
P1=30x@ 1.05v
P2=22x@0.9v

My P0 voltage is a bit higher than some others BUT I'm running my ram at 3200 so it probably needs a bit more voltage.

I have the windows power management on high but modify the min state from 100% down to 20% to allow the P state downclocking.

I use a suite of tests to check stability

At least

IBT 10x run
Aiida64 stress test minimum 15 minutes
RealBench 2.54 at least 30 minutes
Cinebench 15
Aida64 Memory Benchmark
I'm wondering what kind of Vdroop you get in IBT and RealBench, what's your effective Vcore? I crash in these test but I get severe Vdroop. So I'm wondering, do you have a lower leaking chip?
post #11550 of 17652
Quote:
Originally Posted by Timur Born View Post

I am using 103.2 BCLK and can happily use P-state VID in both BIOS and ZenStates (0.2), including offset. BIOS 0003 here.

Furthermore I do not specifically disable Core Performance Boost and do not see my CPU change frequency higher than what I have set in BIOS (neither using fixed OC or using P-state OC). Frankly, I would be happy if it did that, because then it would use 4.1 Ghz for 1/2 core tasks instead of just using 4.0.

On a side note: I just passed 10 loops of ITB AVX at 4.0 + 3300-CL14 after decreasing SOC to 0.95 V via offset. Let's try to lower VDDP a notch more and then see if I can squeeze more power-saving out of it during idle times (60 W idle still is a bit excessive wink.gif).

CPB is disabled when CPU enter OC mode regardless of setting of CPB. So if you are on x OC then you will not see PB/XFR boost occurring. Yes it would be nice to have some elements of default boost method on OC.

Why it benefited me to disable CPB is when memory training fail, when using PState OC with offset mode voltage:-

- AMD CBS is reset.
- Extreme Tweaker page is not.
- CPB [Auto]/[Enabled] the CPU will do PB/XFR, even in UEFI.

So CPU will hit ~1.35V and add in the offset on Extreme Tweaker page that did not reset = ~1.5V.

When above happen and CPB is disabled, then PB/XFR not active. CPU only go to base clock, on my R7 1700 = 3.0GHz, ~1.000V, add offset from Extreme Tweaker = ~1.162V.
Edited by gupsterg - 4/26/17 at 1:49am
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