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ROG Crosshair VI overclocking thread - Page 1193

post #11921 of 17328
Quote:
Originally Posted by Reikoji View Post

also 0082

OK, submitted the report. Not sure if this is a feature or a flaw but if they weren't aware of it, there is a report now smile.gif
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post #11922 of 17328
Heroic ladies and gentlemen, and children of all ages. Here we have a multi-input multi-output black box, aka the elephant in the room. Observe the tag team of blind men fondling the elephant and reporting what they find. Like in the fable, what they find is an incomplete description. We, the circus management (AMD), find this too amusing to interrupt. So keep enjoying the entertainment.
     
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post #11923 of 17328
But I don't wanna fondle the elephant sad-smiley-002.gif
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post #11924 of 17328
Quote:
Originally Posted by Reikoji View Post

Sense MI Scew disabled, and since my set offset of 279 does nothing now, 43c idle. 1.8v pll.

1.85v pll, no change still 43c idle, 70c load.

1.75v pll, still no change 43c idle, 70c load.

1.95v pll. . . . 43c idle.

Seems to be a sense MI thing.

Either way 43c is obviously wrong in my case smile.gif back to enabled for me.

Quote:
Originally Posted by gupsterg View Post

If Sense MI Skew disabled, offset can not apply.

So, my interpretation from the earliest report that changes in PLL 1.8V affected the thermal diode bias has to be wrong; PLL affects something else that requires Sense MI Skew to be enabled.
     
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post #11925 of 17328
Quote:
Originally Posted by kaseki View Post


So, my interpretation from the earliest report that changes in PLL 1.8V affected the thermal diode bias has to be wrong; PLL affects something else that requires Sense MI Skew to be enabled.

it affects it when sense mi is enabled.
Quote:
Originally Posted by Reikoji View Post

im about to check that right now.

hah... any increase in PLL for me destroys my sensemi skew aparently. just put it at 1.9 and idle shot up to 41c, from 27c.

using CPU-Z Stress CPU, load temp went from 51c to 68c

1.95 PLL = 43c idle, 70c load.

1.75 PLL = 7c idle, 28c load.

Well it doesnt exactly destroy sensemi skew/offset, but have to further increase offset if pll voltage increases, and possible vice versa for pll voltage decreases.

Edited by Reikoji - 4/27/17 at 6:00am
post #11926 of 17328
Quote:
Originally Posted by Maxcielle View Post

I have put the white tape on the bottom but one of the rubber feet (intel socket) gets in contact with some pins.
Also should i use the white plastic gasket on the top?





I cut that part off.
post #11927 of 17328
Quote:
Originally Posted by bluej511 View Post

Yea that result is a HUGE increase Jesus lol. I don't plan on doing much bclk OCing (its set to 100 right now, got sick of seeing 3788 cpu speed haha) My memory can boot fine at 3200 with straps its just not the most reliable (needs a quick reset to get past training every time).

Seems like PLL does have to be changed if its enabled. I'm sure disabled would skew it as well just not as badly.

P.S. Im curious if hes reading tctl temps or mobo cpu temps.
reading tctl
post #11928 of 17328
Quote:
Originally Posted by kaseki View Post


So, my interpretation from the earliest report that changes in PLL 1.8V affected the thermal diode bias has to be wrong; PLL affects something else that requires Sense MI Skew to be enabled.

I'm not sure what to make of that statement headscratch.gif PLL has the desired effect (according to the BIOS description) in regard to BCLK stability (at least anecdotally in my case) with SenseMi Skew disabled (I have a 1700 so it is always set to disabled).
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post #11929 of 17328

Try cutting it all off....

 

 

 

 

perhaps not......

:p

post #11930 of 17328
Quote:
Originally Posted by Reikoji View Post

reading tctl

Ah ok then yea that's quite a bit off haha.
Quote:
Originally Posted by dorbot View Post

Try cutting it all off....






perhaps not......
tongue.gif

Yea that looks pretty beefy, zip ties ftw.
    
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