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[Various] Skylake-X (Core i9) Lineup and Specifications - 6C / 8C / 10C / 12C / 14C / 16C and 18C Models Confirmed - Page 58

post #571 of 1013
Quote:
Originally Posted by bigjdubb View Post

There is nothing wrong with purchasing something based on how it performs. Not everyone needs, or wants, to make their purchasing choices based on value. Let's imagine that the Intel has 20% more performance, even if it costs 80% more than the AMD it still has 20% more performance. While it may not be as good of a value, it is perfectly reasonable to purchase it over the AMD if performance is what you are after.

Exactly.
If I save 1/2 an hour a day on my cpu rendering that adds up pretty quickly. Even a few minutes a day would be worth it. Even if I was earning half my normal rate it'd be worth it biggrin.gif
Plus when I claim all the taxes back it's about 1/2 price anyway.

I figure this'll be quite popular with design / CAD people.
However, intel seems to think Xeons are the thing for design and CAD and don't push these chips into that market. I can tell you though, most design software spends most of it's time in a single core and brief moments tapping out all cores, which makes Xeons painfully slow except for those moments.

As an aside, because I saw the threadripper CPU on the internet, imagine the excellent cooling ability with all that surface area!
Still, I run a Hackintosh and AMD is more trouble than it's worth.
post #572 of 1013
Heck, do we even know how Mhz boost works, on lga2066..?
Wasn't it like 4 core boost..?
post #573 of 1013
Quote:
Originally Posted by the w3rd View Post

Heck, do we even know how Mhz boost works, on lga2066..?
Wasn't it like 4 core boost..?

Thought it was all cores for 2.0. Though I'm not sure. I know that 3.0 is only two cores.
     
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post #574 of 1013
Quote:
Originally Posted by BiG StroOnZ View Post


Nice Video, I think AMD is going for 48C/96T after the EPYC 32C/64T- and it will look like this :
After that they will have to Shrink to place more cores in same size.

Edited by Hwgeek - 6/7/17 at 10:29pm
post #575 of 1013
Quote:
Originally Posted by Hwgeek View Post

Nice Video, I think AMD is going for 48C/96T after the EPYC 32C/64T- and it will look like this :
After that they will have to Shrink to place more cores in same size.


7nm Zen + give 35% transistor speed boost, 3.3X more density and 65% power reduction.


You nailed it, 48C/96T 7nm Zen+ coming in at higher clock, less power consumption and smaller footprint than the current 32C model. While Intel 10nm Cannonlake are still nowhere to be seen.


GG to Intel.
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post #576 of 1013
Quote:
Originally Posted by guttheslayer View Post

7nm Zen + give 35% transistor speed boost, 3.3X more density and 65% power reduction.


You nailed it, 48C/96T 7nm Zen+ coming in at higher clock, less power consumption and smaller footprint than the current 32C model. While Intel 10nm Cannonlake are still nowhere to be seen.


GG to Intel.

And the distinct possibility of 24 core threadripper.
post #577 of 1013
I really feel Intel need to seriously buck up and change their roadmap if they are to be compete with a monster 7nm Zen+. Their 5% IPC gain per gen and tons of "lakes" architecture that are effectively the same is not going to cut it in long run. They will lose and be left behind. For each generation they need to double leap in performance.


Accordingly to their original roadmap:

Skylake (14) -> Kabylake (14) -> Coffeelake (14) -> Cannonlake (10) -> Icelake (10) -> Tigerlake (10) -> 7nm CPU+

(Each arrow denote one generation of 5% IPC gain, with parenthesis denote process node)


But right now with AMD biting their heel so fiercely behind in ST performance and well ahead in MT performance, they don't have time for measly 5% performance per gen. Would make more sense for staggered launch that is split into 2 quarters between HEDT / Mainstream platform


New roadmap:

HEDT: Skylake / Kabylake X -> Cannonlake (Q1 2018) -> Tigerlake (Q1 2019) -> Next gen 7nm CPU
Mainstream: Coffeelake (Q3 2017) -> Icelake (Q3 2018) -> Next gen 7nm CPU

(Each arrow denote 2 generation of 10% IPC gain)


As you can see what was suppose to be a direct successor is now being compact in staggered double leap. With HEDT and mainstream always in 1 generation apart from one another, but 2 generations apart within the same platform. They need to do this if not even the giant will fade away once it loses all its asset.



To be honest, they have so many "LAKES" CPU it is getting very frustrating and confusing to identify which generation comes first.

Quote:
Originally Posted by MrZoner View Post

And the distinct possibility of 24 core threadripper.


24 cores TR is a lower estimation. 7nm bring 3.3X more density. They can pack twice more cores while still shaving 30% die space.
Edited by guttheslayer - 6/8/17 at 12:08am
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post #578 of 1013
AMD is only using one wafer design for mainstream/HEDT/servers while Intel has both mainstream and HEDT/server line. Any reason why they can't simply source all mainstream cpus from the HEDT line? All cpus 6C and lower could be relegated to mainstream socket to recoup some of the cost.

Low end Xeon E3s to share the same mainstream socket instead with some features enabled on the cpu.
Edited by Kana Chan - 6/8/17 at 12:17am
post #579 of 1013
Quote:
Originally Posted by Kana Chan View Post

AMD is only using one wafer design for mainstream/HEDT/servers while Intel has both mainstream and HEDT/server line. Any reason why they can't simply source all mainstream cpus from the HEDT line? All cpus 6C and lower could be relegated to mainstream socket to recoup some of the cost.

I think is smth to deal with how it was built and the structural differences. Mainstream have a iGPU to fuse together with the die, and to the Intel stubborn money-grabber, no way u will see the iGPU disappear in their mainstream platform. On top of that, those CPU had its design based on LGA socket that were different, with the HEDT having more power delivery.


That iGPU alone require a redesign of the overall structure to run, also the different cache hierarchy now. So I guess u need 2 different process line for that.
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post #580 of 1013
But Kabylake-X works on the HEDT socket and it was sourced from the mainstream wafer.
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