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[TechSpot] TSMC is building the world's first 3nm semiconductor facility in Taiwan - Page 2

post #11 of 12
Quote:
Originally Posted by Mand12 View Post

Above that size, actually. It's a major issue, one that translates into leakage current.

It's worth pointing out that 3nm is about eight atoms wide.
Feature size is significantly above that, and vdW radius hardly represents a bonded structure to begin with.
post #12 of 12
Quote:
Originally Posted by prjindigo View Post

Quote:
Originally Posted by caenlen View Post

https://www.techspot.com/news/71255-tsmc-building-world-first-3nm-semiconductor-facility-taiwan.html
I am worried my heavy Noctua cooler will prove to much for these little chips, lol.

A facility capable of doing 3nm lithography is not proof of a chip that runs with 3nm components. Remember that very very few chips printed on a lithography limit actually have components that small.

This. Even though for many years the VLSI designers pushed the fabrication industry to reduce the gate length in order to take advantage of it, this is not the case now. Nevertheless, having the ability to scale down the fabrication process means higher quality product outputs.
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