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post #31 of 52
1337 pic now i can build my own
post #32 of 52
L3 is slower than L2 which is slower than L1, which means it's better to have 4MB shared of L2 than 2MB shared of L2+2MB shared of L3. Intel has propably something even better undergoing.
    
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post #33 of 52
Quote:
Originally Posted by Cheetos316 View Post
Old skool chips used to have L2/3 caches off-die on the motherboard, but nowadays, L1/2/3 caches are on-die. Caching refers to a place on the chip where code can be temporarily stored. Think of a tiny amount of RAM on the chip. The difference is that cache usually runs at the speed of the core, so much faster than RAM. Plus, since it is right on the die, the latencies are much faster. L1 caches are not big because it resides right by the execution units and so it is very very fast. L2 cache also runs at full speed of the core but resides outside of the execution core, so it can be designed to be bigger, but because of the greater distance away from the core, the latencies increase. AMD's L3 cache resides even farther away from the core so the latencies are even greater. I haven't seen any info stating if AMD's L3 cache will run at full speed of the core. For Barcelona, each core has it's own dedicated L1 and L2 caches, just like K8 does now, but they also get a L3 cache on top of all of it for all of them to share.

For a good guide on how caching works, check this out.
Rep +1

I can't see the addition of L3 cache onto the processor die making much of an impact for home users as there aren't many desktop applications that would require such an amount of L3 cache. It is practical for the server markets though.
post #34 of 52
Quote:
Originally Posted by t4ct1c47 View Post
Rep +1

I can't see the addition of L3 cache onto the processor die making much of an impact for home users as there aren't many desktop applications that would require such an amount of L3 cache. It is practical for the server markets though.
Not at all.

More L3 simply means that that data, would have (had not the l3 been present) needed to come from RAM (which is further away and ALWAYS slower, OR eventually, the HDD.)

That cache being there simply means the CPU Will have access to it much quicker.

More cache is ALWAYS better
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post #35 of 52
I want it!!!!
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post #36 of 52
Quote:
Originally Posted by Emmanuel View Post
L3 is slower than L2 which is slower than L1, which means it's better to have 4MB shared of L2 than 2MB shared of L2+2MB shared of L3. Intel has propably something even better undergoing.
Intel needs more cache to make up for their weak FSB macho fiasco. AMD doesn't use as much cache and due to it's architecture it's a lot more efficient.
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post #37 of 52
Fo sho more cache is going to be better but that isn't the only improvement. There are tons of other architecture improvements that none of us will ever understand.
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post #38 of 52
Quote:
Originally Posted by aaronman View Post
Fo sho more cache is going to be better but that isn't the only improvement. There are tons of other architecture improvements that none of us will ever understand.
Yup, CPU's are very complex... GPU's on the other hand wow. Amazing!

Humans haven't even been on the planet for too long compared to like Dinosaurs or something and bam we are like crazy! It's all because of opposable thumbs
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post #39 of 52
Quote:
Originally Posted by MGX1016 View Post
Intel needs more cache to make up for their weak FSB macho fiasco. AMD doesn't use as much cache and due to it's architecture it's a lot more efficient.
Just got me thinking, how fast would Conroe architecture be if it was on an AMD style bus system?
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post #40 of 52
Quote:
Originally Posted by MGX1016 View Post
Yup, CPU's are very complex... GPU's on the other hand wow. Amazing!
Yeah, GPUs are pretty much mini computers.
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