Tight/small timings DOES NOT equal low latency.
2-2-2-5 at 50MHz would suck big time, in terms of latency, if compared to 3-3-3-8 at 200MHz.
Biggest misconception in memory overclocking.
The value of each timing is the number of memory clock cycles, not time, given to each timing. The lower we can get the time of each timing, the better. The less time each timing is allocated, the lower your latency. And, the time of one memory clock cycle is found by dividing 1 by your effective (ie, DDR2 xxx) memory speed.
Just oc your memory as far as you can to get maximum bandwidth, and then tighten your timings so that latency is equal to, or slightly lower than, latency at stock clock (with timings tightened).