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Intel Core 2 Duo Has 'Non-Fixable' Bugs, OpenBSD Founder Alleges - Page 9

post #81 of 148
Quote:
Originally Posted by Intervention View Post
I'm not being ignorant about the problem. But I haven't experienced a single issue with c2d, and I know there are many others who will back me up on that.

Question to this community: Has one single member experienced these issues before 2 days ago before they were reported?


It just seems that as soon as this was "known" a lot of AMD guy jumps in and say, "wow look at that" or "intel sux hard". If we want to be professional, lets start by dissecting this problem, and actually seeing if there is a problem at all.


Edit****
Maybe I'm not being professional is me not understanding the problem, but honestly, I haven't reported any instabilities with my C2D. Unless provoked by 4.0Ghz syndrome.....
I have widely sporadic, random WU ending errors on mild CORE2DUO OCs (2.4GHz E4300 and sub ddr800 cas5 ram) while folding that do not fail ANY stability stress tests for 8 hours. I attributed it to degrading ram because I couldn't fix it with voltage increases or declocks (whenever I thought it was fixed it came back anywhere from 1day to a week later).

This MIGHT explain that.
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post #82 of 148
Hey, I have an AMD, and I just wanted to point out that AMD has theese "Errata"s too. My Lanparty has an option for "Errata 94 Enhancement" A quick google search turned up
Quote:
Errata 94 refers to the 94th bug identified in AMD Athlon and Opteron processors. This bug affects the sequential prefetch feature in those processors.

When there's an instruction cache miss, the sequential prefetch mechanism in affected processors may incorrectly prefetch the next sequential cache line. This may cause the processor to hang. Affected 64-bit processors that run 32-bit applications may end up executing incorrect code.

This bug affects the following processor families :
AMD Opteron (Socket 940)
AMD Athlon 64 (Socket 754, 939)
AMD Athlon 64 FX (Socket 940, 939)
Mobile AMD Athlon 64 (Socket 754)
AMD Sempron (Socket 754, 939)
Mobile AMD Sempron (Socket 754)
Mobile AMD Athlon XP-M (Socket 754)

This BIOS feature is a workaround for the bug. It allows you to disable the sequential prefetch mechanism and avoid the bug from manifesting.

When enabled, the BIOS will disable the processor's sequential prefetch mechanism for any software that operates in Long Mode.

When disabled, the BIOS will not disable the processor's sequential prefetch mechanism. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or processing incorrect code. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.
That means that K8 has at least 94 bugs, so how about we stop saying "OMG Lyke C2D makes my compy BSOD omg"

Both CPU's have their own bugs, so now the fanboys can ****
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post #83 of 148
Quote:
Originally Posted by TheSubtleKnife View Post
Hey, I have an AMD, and I just wanted to point out that AMD has theese "Errata"s too. My Lanparty has an option for "Errata 94 Enhancement" A quick google search turned up


That means that K8 has at least 94 bugs, so how about we stop saying "OMG Lyke C2D makes my compy BSOD omg"

Both CPU's have their own bugs, so now the fanboys can ****
Awesome post. Rep +
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post #84 of 148
I hope AM2 doesn't have that much
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post #85 of 148
Quote:
I hope AM2 doesn't have that much
am2 is still K8 tho....hmmm

lol, look at this...
Quote:
Errata 123 refers to the 123rd bug identified in AMD Athlon and Opteron processors. This bug affects the cache bypass feature in those processors.

These processors have an internal data path that allows the processor to bypass the L2 cache and initiate an early DRAM read for certain cache line fill requests, even before receiving the hit/miss status from the L2 cache.

However, at low core frequencies, the DRAM data read may reach the processor core before it is ready. This causes data corruption and/or the processor to hang.

This bug affects the following processor families :
Dual Core AMD Opteron (Socket 940, 939)
AMD Athlon 64 X2 (Socket 939)

This BIOS feature is a workaround for the bug. It allows you to disable the cache bypass feature and avoid the bug from manifesting.

When enabled, the processor will not bypass the L2 cache to prefetch data from the system memory.

When disabled, the processor will continue to bypass the L2 cache for certain cache line fill requests. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or corrupting data. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.
hmmmm 123 bugs... O_o
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post #86 of 148
Quote:
Originally Posted by Unknownm View Post
I hope AM2 doesn't have that much
It's AM2+ buddy
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post #87 of 148
Thread Starter 
Quote:
Originally Posted by TheSubtleKnife View Post
That means that K8 has at least 94 bugs, so how about we stop saying "OMG Lyke C2D makes my compy BSOD omg"

Both CPU's have their own bugs, so now the fanboys can ****
As I said earlier there is no perfect product.

good research
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post #88 of 148
Quote:
AI65

When the temperature reaches an invalid temperature the CPU does not generate a Thermal interrupt even if a programmed threshold is crossed.
I don’t see how this is a security concern; maybe he meant AI56, which gives unpredictable behavior if you change the attributes of a PTE without fixing up the TLB; AI64 involves system management mode and AI67 involves VTX.
AI79
guys, this means, if your CPU just happens to hicckup, the CPU will not restart when it goes over the throttle temp, lets say for example 60 degrees c.
scenario situation

so, your overclocking your C2D, and you hit 60C, normally you would restart because of the thermal interrupt, but if this bug gets exploited and written into your OS code, this could potentially end up "microwaving" your CPU, resulting in, well, a sticky mess of gunk inside a pretty looking lump of metal/silicone.

This is just a theorem, based upon what i know. and theres always a noob busting a core with too much voltage
i dont know about you guys, but i would say this is pretty damn serious.
and im no fanboy for either team. my rig is not yet even started.

ViRuS
post #89 of 148
Well, my C2D is always around these temps and no, I never restart...
    
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post #90 of 148
i said, for example, as im not sure of the exact restart temp, its probably closer to 70+
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