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AMD looks to the stars! - Page 5

post #41 of 71
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Originally Posted by Jarhead View Post
Will since AMD has never outsold Intel, why is it suddenly the end of AMD if they don't outsell Intel?
True genius.

As long as AMD can keep their pricing in line they'll be fine.
post #42 of 71
Quote:
Originally Posted by Heru View Post
ZOMG HAX.

I'm so tired of all this AMD reading material. This will be the last AMD news I'm going to bother reading until I see a processor materialize.

I just simply don't care to hear about their plans, fanboy and flamer speculation, doom theories and the rest of the vomit being spewn forth like dessert time in Nicole Richie's bathroom.
Amen to that. I'm SO so so so so s os osososososososo sick of AMD's talk. We heard a lot of talk about the r600 as well, and 6 months after the 8800GTX they barely beat their competition, if at all.

AMD, stop the talk and walk the walk.
post #43 of 71
Quote:
Originally Posted by pauldovi View Post
Let me show you some math (or magic)

Barcelona launches at 2.0Ghz. Current Xeon leader is clocked at 3.0Ghz 1333Mhz FSB.

Now, if I do the math correctly (correct me if I am wrong). 3.0 is 50% larger than 2.0... Right?

So that means that K10 will have to do 50% more per clock than Intel's Core 2 architecture in order to match its performance.

Now how likely do you think that is considering the only benchmark we have of Barcelona shows it slower than Core 2 Quad Q6600....
This Doesn’t Prove Anything , do you have real benchmark scores? or your just talking astrology!
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post #44 of 71
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Originally Posted by SZayat View Post
This Doesn’t Prove Anything , do you have real benchmark scores? or your just talking astrology!
That may not be "proof", but it is perfectly clear logical thoughts. Intel will be 3.33Ghz at least, with AMD's Barcelona highest to be around around 2.6Ghz.
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post #45 of 71
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Originally Posted by Intervention View Post
That may not be "proof", but it is perfectly clear logical thoughts. Intel will be 3.33Ghz at least, with AMD's Barcelona highest to be around around 2.6Ghz.
How do you know how Barcelona would run. or lets say your right. Intel P4 got much higher frequency than Intel C2D, yet C2D is much faster. got it.

i hate arrogance ... and its negative effects
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post #46 of 71
Thread Starter 
Quote:
Originally Posted by SZayat View Post
This Doesn’t Prove Anything , do you have real benchmark scores? or your just talking astrology!
How does that not serve as proof?

It is 100% correct I guarantee it.

If you have a 2.0Ghz processor just as fast as a 3.0Ghz processor, it does 50% more per clock.

How will a benchmark help you figure that out.

There are variables here: clock speed, benchmark, clock to clock comparison. We are filling in clock speed (2.0 vs 3.0Ghz), benchmark (even scores), so the only variable would be clock to clock performance.
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post #47 of 71
Quote:
Originally Posted by pauldovi View Post
How does that not serve as proof?

It is 100% correct I guarantee it.

If you have a 2.0Ghz processor just as fast as a 3.0Ghz processor, it does 50% more per clock.

How will a benchmark help you figure that out.

There are variables here: clock speed, benchmark, clock to clock comparison. We are filling in clock speed (2.0 vs 3.0Ghz), benchmark (even scores), so the only variable would be clock to clock performance.
It's like saying Intel P4 > Intel C2D because of the clock speed. got it
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post #48 of 71
Thread Starter 
Quote:
Originally Posted by SZayat View Post
It's like saying Intel P4 > Intel C2D because of the clock speed. got it
No, it has nothing to do with that. Maybe you don't understand.

Lets say that a 2.0Ghz Core 2 Duo matches a 4.0Ghz P4. That means that the C2D is doing 100% (or double) the performance per clock.
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post #49 of 71
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Originally Posted by Intervention View Post
That may not be "proof", but it is perfectly clear logical thoughts. Intel will be 3.33Ghz at least, with AMD's Barcelona highest to be around around 2.6Ghz.
What I'm hoping is that as Intel reaches its speed cap on this architecture, AMD will have improved their process enough to yield 3ghz chips... if it is truly more efficient per clock than the penryn (which it may or may not be), then there could be some fairly decent competition for a little while. It's all speculation anyways, but that is what I hope to see.
post #50 of 71
Thread Starter 
Quote:
Originally Posted by iandh View Post
What I'm hoping is that as Intel reaches its speed cap on this architecture, AMD will have improved their process enough to yield 3ghz chips... if it is truly more efficient per clock than the penryn (which it may or may not be), then there could be some fairly decent competition for a little while. It's all speculation anyways, but that is what I hope to see.
Core 3 launches in the flavor of Nehalem in Q3 08.

Quote:
Intel's 45nm node utilizes metal transistor gates and high-k dielectrics. The departure from silicon-based transistors translates to a 5-fold reduction in source-drain leakage and a 10-fold reduction in dielectric leakage. According to Intel guidance, this means existing processors could run 20% faster just by switching to metal gate and high-k transistors. Gelsinger claims mature Penryn processors will operate in excess of 3 GHz per core, with 1600 MHz front-side busses on server platforms.

After the 45nm shrink has matured, Intel will then incorporate architectural changes into its processor family, currently dubbed Nehalem. Nehalem is still a 4-issue architecture similar to Core, but new advances in management and scalability give Nehalem its new micro architecture designation.

Earlier this year Intel roadmaps stated Hyper-Threading would appear on some Penryn processors. Shortly after, Intel retracted the roadmap, stating that simultaneous multi-threading will not reappear until 2008. This was made evident today when Intel unveiled its next-generation threading plans for Nehalem.

High-end server Nehalem-family processors have eight cores. Coupled with 2-way threading, these processors appear as 16 logical CPUs. This threading is dynamic: Threads can be powered on and off depending on the application needs.

Dynamic threading isn't the only on-the-fly operation for Nehalem. Almost everything about Nehalem can be dynamically managed: Power, threads, bus, cache and cores. This management is primarily a power-saving feature, but also allows for saleable designs as well.

The bulk of these changes are possible due to Nehalem's on-board memory controller. AMD realized the advantages of integrated memory controllers (IMCs) with the introduction of its Opteron series processors four years ago. Intel has long toyed with with IMCs on some processors, and will even deliver the Tolapai system-on-a-chip later this year with an integrated memory controller.

Intel's dynamic bus, the Common System Interface (CSI), is clearly a focal point for the Nehalem architecture. With many respects, CSI is very similar to HyperTransport: Variable, serial interconnects for processor-to-processor communication. CSI will not only make its debut on Nehalem, but design engineers have also confirmed to DailyTech that CSI will have a large presence on next-generation Itanium platforms as well.

Intel leaves a single teaser in its Nehalem design guidance: "High performance integrated graphics engine for client." Speaking on background, Intel insiders stated "The majority of the Intel Northbridge is already on the Nehalem die, so adding the final logic to include graphics is essentially [trivial] with the correct bus support." Intel's renewed interest in graphics processing came just weeks after AMD made similiar announcements, which AMD has codenamed Fusion.

In addition, Intel will also expand the SSE4 instruction set. Other architectural tweaks include shared multi-level cache. AMD's upcoming Barcelona processors share L3 cache between cores; Intel's last NetBurst processors shared L3 cache, but no current Core processor utilizes such functionality.

Gelsinger emphasizes that Nehalem is on track for production in 2008.

Intel's "tick tock" strategy doesn't end at the 45nm node. In 2009 Intel will optically shrink Nehalem process from 45nm to 32nm. In a sense, it's the same move Intel is currently undertaking with the transition from Conroe to Penryn. Nehalem's 32nm shrink is dubbed Westmere. The 32nm architecture that will succeed Westmere is dubbed Gesher.
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