There's a better explaination out there but I can't find it now. However, I can summarize....
Certainly, one of the most important timings is the CAS Latency, which is also the one most people understand. Since data is often accessed sequentially (same row), the CPU need only select the next column in the row to get the next piece of data. In other words, CAS Latency is the delay between the CAS signal and the availability of valid data on the data pins (DQ). The latency between column accesses (CAS) then plays an important role in the performance of the memory. The lower the latency, the better the performance. However, the memory modules must be able to support low-latency settings.
tRCD is the delay from the time a row is activated to when the cell (or column) is activated via the CAS signal and data can be written to or read from a memory cell. When memory is accessed sequentially, the row is already active and tRCD will not have much impact. However, if memory is not accessed in a linear fashion, the current active row must be deactivated and then a new row selected/activated. In such an example, low tRCD's can improve performance. However, like any other memory timing, putting this too low for the module can cause in instability.
tRAS is the time required before (or delay needed) between the active and precharge commands. In other words, how long the memory must wait before the next memory access can begin.
CAS is how long it takes to move from one cell to the next. tRCD is how long it takes to activate a new row. tRAS is how long it takes to actually start reading the memory. Even if tRAS was instantaneous, it would not help much because it still has to wait for at least CAS.