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CoreTemp vs. RealTemp - Page 6

post #51 of 133
Quote:
Originally Posted by Retrospekt View Post
I'm confused as ever. Is all of this Intels fault for not releasing accurate tjmax?
Yep, ...
quote "from intel specifically from one of our internal contacts for the processor documentation", that states, "Note Tj is not a fixed value and the IA32_TEMPERATURE_TARGET[15:8] value can vary from part to part. Tj is also not software readable."

http://softwarecommunity.intel.com/i...howThread.aspx
last 2 post

and forum response to author of coretemp regarding using mobile cpu tjmax for desktop processors, exact response was....NO

Rudolf,

Our engineering contacts responded:

MSR PLATFORM_ID[52:50] are not defined to have any specific value - not even in the BIOS Writers' Guide. Those bits are used by the microcode update load process. An algorithm is applied to the value returned in the three bits to determine if a microcode update in combination with the processor signature (CPUID) is the correct update for a given processor. By definition, Intel can change the bit pattern used for any processor whenever a new processor signature (CPUID) is assigned.

Bit 50 is not sufficient enough to determine if a specific processor is a mobile or non-mobile processor.

In response to your individual questions:

Is test MSR_IA32_PLATFORM bit 50 is 0 strong enough to detect all non-mobile platforms? No.

Also some rumors say that it is not actually 85 and 100 but 90 and 105? What should I do with the desktop users? Display a temperature relative to the TCC activation point (i.e., "PROCHOT# - 15C").

Perhaps put 100 as TjMax and write to documentation that it is safe until you reach 100? (and also that this temp is artificial) Do you think users might benefit from MSR_TARGET_TEMP too? No.

This reminds me, there were some efforts to include the MSR_TEMP_TARGET in documentation, I check the 3A manual and could not find it :/ To our knowledge, as of this writing, that has not been included in the documentation.

==

Lexi S.

Intel(R) Software Network Support

http://www.intel.com/software

Contact us

And
http://softwarecommunity.intel.com/i.../30244450.aspx

They speak in another paper regarding the thermal resistance difference between design of mobile versus desktop cpu package, which likely explains why desktop cpus have different tjmax than mobile. Also, give the numerous papers written by intel on decreasing thermal resistance, and all the improvements, it is no wonder they do not publish tjmaxs, if they keep changing.
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post #52 of 133
heres mine. tjunction 85 w/ coretemp and tjunction 95 w/ realtemp. odd huh. with tat, i get same reading as coretemp.
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post #53 of 133
Well same for my E6600. If that helps any.
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post #54 of 133
It really sounds like Intel doesen't even know themselfs... I hope Nehelam has a different and better way of monitoring temps..
     
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post #55 of 133
Quote:
Originally Posted by Blizzie View Post
Well same for my E6600. If that helps any.
thats cuz your tjunction is same. a lot of us get different ones.
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post #56 of 133
Quote:
Originally Posted by luckii View Post
heres mine. tjunction 85 w/ coretemp and tjunction 95 w/ realtemp. odd huh. with tat, i get same reading as coretemp.
Yea all M0's are getting read as 95c by RealTemp, while 85c is a definate no 95c could work.. at least going by what the calculations show..
     
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post #57 of 133
Quote:
That, you say CoreTemp's assumption of 105c Tj max is incorrect for E8400 and is 95c instead.
Read post above with links telling coretemp author NO in response to him asking about using mobile cpu tjmax, and other post explaining why, and there is a paper explaining thermal resistance differences as possible explanation...but thats just theory...fact is tjmax according to intel is NOT SAME as mobile cpus.

measuring Tcase at idle undervolted and underclocked with no heatsink, should give an approximate core temp reading as gradient is approximated less than 1C (see paper on thermal gradients at steady state idle, from core to between cores). figure 5, read article, then
http://arxiv.org/ftp/arxiv/papers/0709/0709.1861.pdf
See gradient casing/TIM, especially Tc, tj4
http://www.flomerics.com/flotherm/te...apers/t324.pdf

Thus if Tcase is 95, measured by more than one person same, when DTS=0, than tjmax =95, as temp = tjmax - DTS.
I did not understand your last question.
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post #58 of 133
Quote:
Originally Posted by luckii View Post
thats cuz your tjunction is same. a lot of use get different ones.
Well I just posted it. >_>
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post #59 of 133
Quote:
Originally Posted by opt33 View Post
Read post above with links telling coretemp author NO in response to him asking about using mobile cpu tjmax, and other post explaining why, and there is a paper explaining thermal resistance differences as possible explanation...but thats just theory...fact is tjmax according to intel is NOT SAME as mobile cpus.

measuring Tcase at idle undervolted and underclocked with no heatsink, should give an approximate core temp reading as gradient is approximated less than 1C (see paper on thermal gradients at steady state idle, from core to between cores). figure 5, read article, then
http://arxiv.org/ftp/arxiv/papers/0709/0709.1861.pdf
See gradient casing/TIM, especially Tc, tj4
http://www.flomerics.com/flotherm/te...apers/t324.pdf

Thus if Tcase is 95, measured by more than one person same, when DTS=0, than tjmax =95, as temp = tjmax - DTS.
I did not understand your last question.
Disreguard the last question, I think I just answered it myself.
     
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post #60 of 133
Quote:
Originally Posted by GigaByte View Post
It really sounds like Intel doesen't even know themselfs... I hope Nehelam has a different and better way of monitoring temps..
That is one argued possibility. If intel is indeed individually calibrating chip to chip, and not batch to batch, and if they did so only based on some fault at some tested temp, then making that the throttling point, they may not be able to give a tjmax unless they wrote it down for every chip, in which case your left with the only accurate number of ...relative temp from Tcc, which intel keeps telling us to use.

And I think the coretemp author is starting to think the same, as the default display when I downloaded the newer version...see pic.
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