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post #11 of 15
Quote:
Originally Posted by drewfus View Post
+rep for the best answer iv been given , but it still seems that this would be
able to be determined/ measured , i mean i think every one would agree that a 8800 ultra uses more of the bus than a 8800gs , so with that being said knowing there is a difference , some how you should be able to measure the difference , one would think at least?
Yes, a faster card would logically use more of the bus, as would a card with less on-board memory.

I think this would be best measured by bus time, or I/Os, but I don't know of anything that is capable of doing that on a PC.

Task Manager, or the windows Perfmon can monitor system memory and drive I/Os, but I think special software, possibly special drivers, would have to be written to make the same kind of measurments of the PCI-E bus.
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post #12 of 15
Quote:
Originally Posted by Perry View Post
Even some of the best cards today really aren't impacted by PCI-E x8. In SLI tests on a 650i board I think the biggest difference was about 8 FPS but that's going based on a very foggy memory.
this was done with the 7xxx serries
post #13 of 15
Thread Starter 
Quote:
Originally Posted by noobdown View Post
i think the only way to get a ruff idea of how much is being used is to set the frequency at different amounts(1x,4x,8x,16x) and bench them
great idea, now use that and make a huge chart to show at what x-whatever cards start to suffer, sounds like a project for toms hardware!
then you could see whats the best bus is for a specific card is and whether it would be necessary to upgrade.
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post #14 of 15
PCI-E 1x-16x is not frequency, it's lanes.

I recall a site (anandtech or hardocp maybe), testing this before, for the purposes of determining it's impact on SLI (if I recall correctly). They used tape to mask off the connectors for the extra lanes. I think they tested 1x, 4x, 8x, and 16x.
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post #15 of 15
Quote:
Originally Posted by Blameless View Post
PCI-E 1x-16x is not frequency, it's lanes.

I recall a site (anandtech or hardocp maybe), testing this before, for the purposes of determining it's impact on SLI (if I recall correctly). They used tape to mask off the connectors for the extra lanes. I think they tested 1x, 4x, 8x, and 16x.
PCI Express is the new serial bus addition to the PCI series of specifications. How ever the electrical and mechanical interface for PCI Express is not compatible with the PCI bus interface. This is a serial bus which uses two low-voltage differential LVDS pairs, at 2.5Gb/s in each direction [one transmit, and one receive pair]. A PCI Express link is comprised of these two unidirectional differential pairs each operating at 2.5Gbps to achieve a basic over all throughput of 5Gbps [before accounting for over-head]. PCI Express uses 8B/10B encoding [each 8 bit byte is translated into a 10 bit character in order to equalize the numbers of 1's and 0's sent, and the encoded signal contains an embedded clock]. PCI Express supports 1x [2.5Gbps], 2x, 4x, 8x, 12x, 16x, and 32x bus widths [transmit / receive pairs]; 2.5Gigabits/second per Lane per Direction. The 8B/10B changes the data transfer numbers to 250MBps per lane, raw data [B= Bytes, b=Bits]. The reduction in throughput is accounted for under the protocol section.

http://www.interfacebus.com/Design_C...I_Express.html

Bus Spec Transfer Rate Throughput Rate
PCI; 33MHz, 32-bit 133MBps -
PCI-Express x1 250MBps -
AGP 2x 533MBps -
PCI-Express x4 1,000MBps -
AGP 4x 1,066MBps -
AGP 8x 2,133MBps -
PCI-Express x16 4,000MBps -
Edited by noobdown - 5/21/08 at 12:00pm
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