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RAM speed & timings?

post #1 of 11
Thread Starter 
I am running 4Gb's of G.Skill F2-8500CL5D, EPP-1066 CL5-5-5-15 2.1v

Which speed and timings will give me better performance?

1066 @ 5-5-5-15 - 3:4

850 @ 4-4-4-12 - 1:1

I have read that underclocking ram with tighter timings may yield better results.
Edited by hogans - 12/19/08 at 1:35am
    
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post #2 of 11
Go with the tighter timings.
    
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post #3 of 11
You will get better performance at higher speeds. Definitely run the ram at 1066. DDR2 950 CAS 4 would get you about the same performance as 1066 Cas 5. But there are very few kits that can run that tight at 950.
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post #4 of 11
Higher bandwidth prevails. Seriously, run the Everest memory benchmark, and take note of the increase in read/write times @ 1066MHz. Overall system performance just craves m0ar bandwidth.
Edited by Diabolical999 - 12/19/08 at 2:32am
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post #5 of 11
Thread Starter 
Thank's guys!
    
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post #6 of 11
Higher Frequency wins here. Additionally tweak the tRD to squeeze out as much performance as possible.
post #7 of 11
Actually, if recall correctly, the best timing FSB:RAM ratio would be a 1:2 (by the way, as confusing as it sounds, the divider for a 1:2 ratio is 2:1, as you'd see in your M/B) where the DDR was running at twice the speed of the frontside bus. For example, a 400MHz FSB would work best with an 800MHz clock-cycle on the RAM (dual-rate would put it at 1600MHz on the packaging) This is DDR3 is all the buzz... there *are* DDR3-1600MHz modules (800MHz bus) that would make a 400MHz bus scream.

Now, since that doesn't happen very often in reality, a 1:1 ratio works pretty well because the rest of the ratios start favoring the processor's FSB clock over the RAM clock speed within your MCH/NB...

Look at it this way... all your FSB is, essentially is the clock cycle in which data will be transmitted into your L1 Cache. Your L1 Cache is the big loading dock in which the processor moves data in and data out. The L2 Cache is where all the work is done but it's so damn fast (literally it's your FSB x Multipler, faster) it can't deal with as much data, reliably, so it uses the L1 Cache as it's buffer to shift bits and pieces of work around until their set is finished...then it tells the L1 Cache to move it back out to the MCH/NB where it can be passed back to either the RAM or the other busses, as needed.

Because the RAM is not constrained by having to support a frequency in which the L2 Cache can sync up to, and because the CPU has to make all requests through the MCH/NB before it is translated into a request for the RAM to fetch, it makes sense to try to get your RAM Mhz as fast as it can handle.

The other reason this is a good thing is because of DMA (direct memory access) requests on the part of HDD and other devices. The CPU may send out one simple request to load an application, and then it moves onto another work request until the N/B passes back some of the next workset. In the mean time the RAM and HDD are working intimately together, without the FSB's interaction *at all* to load up the segments of the application the CPU just requested.

....
did I get that right?
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post #8 of 11
As I have posted, higher speed beats lower timings. But try both ways and measure.
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post #9 of 11
Hmm that's strange because my C2D PC's have always run faster with better timings.
*Goes off to experiment*
    
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post #10 of 11
Quote:
Originally Posted by redsox83381 View Post
Hmm that's strange because my C2D PC's have always run faster with better timings.
*Goes off to experiment*
They're right. Generally, you'll see better performance with higher bandwidth vs tight timings.
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