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Gigabyte EP35C-DS3R vdroop mod (almost there!) - Page 2

post #11 of 30
Thread Starter 
how much resistance do i need between those points?
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post #12 of 30
Thread Starter 
nvm i figured this out.....


thanks for the help guys!

dont forget to put this in the volt mod thread

EDIT: pic was a failiure
Edited by wumpus - 4/8/10 at 11:09pm
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post #13 of 30
What did you do, shade the resistor?
    
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post #14 of 30
Thread Starter 
no i thought i figured out which two points to connect but i was wrong, i have been using these links to try and figure it out:

http://www.xtremesystems.org/forums/...d.php?t=147781
http://www.xtremesystems.org/forums/...d.php?t=162875
this is a different revision but its the same design. the chips are just turned 90 degrees compared to mine.
http://img213.imageshack.us/img213/4...eedp35cwj5.jpg
this is my mobo:
http://img696.imageshack.us/img696/9...ds3rvdroop.jpg
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post #15 of 30
Thread Starter 
double post. occurrs when i use the back button to go to this page
Edited by wumpus - 4/9/10 at 3:29pm
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post #16 of 30
Thread Starter 
one of the links says to connect pins 15 and 17 together with a 100k VR and turn it down until no vdroop.....im not sure about it though as i cant find any evidence to support it...

resisitence between those points is supposed to be like 2.27k ohms or something....

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post #17 of 30
Thread Starter 
triple post
Edited by wumpus - 4/9/10 at 3:29pm
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post #18 of 30
Thread Starter 
quad post
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post #19 of 30
Ok, so it looks like you can attack this from two angles. I'm glad I reread the datasheet.

Datasheet for reference.





So there is IDROOP which I was looking at earlier.
Quote:
IDROOP - IDROOP is the output pin of the sensed average
channel current, which is proportional to the load current. In
the application, which does not require loadline, leave this
pin open.
In the application which requires load line, connect
this pin to FB so that the sensed average current will flow
through the resistor between FB and VDIFF to create a
voltage drop
, which is proportional to the load current.
You can disconnect IDROOP(remove the resistor we labeled) to not use load line(vdroop).


Then there is the FB/VDIFF mod which you found.

Quote:
FB and COMP - The inverting input and the output of the
error amplifier respectively. FB can be connected to VDIFF
through a resistor. A properly chosen resistor between
VDIFF and FB can set the load line (droop)
, when IDROOP
pin is tied to FB pin.
The droop scale factor is set by the ratio
of the ISEN resistors and the inductor DCR or the dedicated
current sense resistor. COMP is tied back to FB through an
external R-C network to compensate the regulator.
Here it tells us a VR somewhere between FB and VDIFF will set LLC, be careful not to have the VR between ground and FB or you'll get e vCore mod.

I'm leaning towards removing IDROOP as the mod to eliminate vdroop.
    
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post #20 of 30
Thread Starter 
Quote:
Originally Posted by PizzaMan View Post
Ok, so it looks like you can attack this from two angles. I'm glad I reread the datasheet.

Datasheet for reference.





So there is IDROOP which I was looking at earlier.


You can disconnect IDROOP(remove the resistor we labeled) to not use load line(vdroop).


Then there is the FB/VDIFF mod which you found.



Here it tells us a VR somewhere between FB and VDIFF will set LLC, be careful not to have the VR between ground and FB or you'll get e vCore mod.

I'm leaning towards removing IDROOP as the mod to eliminate vdroop.
ok I know its been a while its just been on the back burner.
Also, I think we found it out.

here is my paint diagram:



Quote:
A properly chosen resistor between
VDIFF and FB can set the load line (droop), when IDROOP
pin is tied to FB pin.
does that mean I solder all 3 together and put a 50k ohm resistor in between vdiff and FB? (resistance to ground was ~40K ohm for vdiff and FB)

Also, does the Idroop mod where I take out the resistor completely eliminate vdroop?

thanks for all your help man we are really close now
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