Originally Posted by Ecstacy
I was thinking of doing the same thing and hope to someday work for Intel, ARM, AMD, ect., but I don't even really know what the field is like (right now all I know how to do is put parts together.)
Can you explain what you do in somewhat detail and what it's like?
Well im in 3d year right now so we just started dipping into hardware design. Next semester are my computer architecture and operating systems courses and i feel like they will be much more informative. Currently the only directly applicable course is digital signal processing. We program an Alterra Cyclone 2 device on a DE2 board to simulate hardware chips. Its a whole lot of logic that we write in system verilog. Its rather difficult to get a hang of it as its a language that is used to describe how hardware will be mapped on die, not a programming language. This means everything you write will NOT be executed sequentially like in c or java but rather all at the same time (which makes sense because it just maps multiplexers and stuff on the die). We are given certain requirements and told to implement them in hardware. So we have to engineer a digital circuit to execute the required task and test. Simulations of the design take forever and a solid 99% of the problems we encounter are due to timing. Its silly how hard it is to get a design synchronized especially if interfacing with external SRAM or DRAM. We learned all about clock cycles, gate delays, delay propagation, and so forth. The lowest level you can imagine. There is a lot of stress put on efficient design as well. We get more grade points for better implementations of the design. There is so much more to it like power envelopes, clock skew, asynchronized clocking, physical limitations of a device. For example to interface with external SRAM the clock of the sram driver must be in synch with the SRAM speed as specified by the manufacturer with a tolerance 50 pico seconds or so. But the rest of your device can run at any clock speed you want so long as you buffer the data in/out of the SRAM. I can talk about this forever really but i think its enough for this post