Originally Posted by sccr64472
Actually, standard pc3200 DDR operates at a faster clock frequency than DDR2 667. DDR2 667 is only operating at 167 mhz, while pc3200 is operating at 200 mhz. Very common misconception.
The advantage of DDR2 over DDR SDRAM is the ability for much higher clock speeds.
A Bit of History:
With a clock frequency of 100/133 MHz, "SDR-SDRAM" transfers data on every rising edge of the clock pulse (Sin Wave Function) thus achieving an effective 100/133 MHz data transfer rate.
Unlike SDR, both DDR and DDR2 are double pumped; they transfer data on the rising and falling edge of the clock, at points of 0.0V and 2.5V (1.8V for DDR2), achieving an effective rate of 200/266/333 etc.... MHz (and a theoretical bandwidth of 1.6 GB/s .... etc) with the same clock frequency. DDR2's clock frequency is further boosted by electrical interface improvements, on-die termination, prefetch buffers and off-chip drivers. However, latency is greatly increased as a trade-off. DDR2 Prefetch buffer is 4 bits wide, whereas DDR is 2 bits wide & DDR3 is 8 bits wide.
Power savings are achieved primarily due to an improved manufacture process, resulting in a drop in operating voltage (1.8 V compared to DDR's 2.5 V). The lower memory clock frequency could also help â€” DDR2 can use a real clock frequency 1/2 that of SDRAM whilst maintaining the same bandwidth).
- DDR2-400: DDR-SDRAM memory chips specified to run at 100 MHz, I/O clock at 200 MHz
- DDR2-533: DDR-SDRAM memory chips specified to run at 133 MHz, I/O clock at 266 MHz
- DDR2-667: DDR-SDRAM memory chips specified to run at 166 MHz, I/O clock at 333 MHz
- DDR2-800: DDR-SDRAM memory chips specified to run at 200 MHz, I/O clock at 400 MHz
- DDR2-1000: DDR-SDRAM memory chips specified to run at 250 MHz, I/O clock at 425 MHz.
Moving on to the Future:
- PC2-3200: DDR2-SDRAM memory stick specified to run at 200 MHz using DDR2-400 chips, 3.200 GB/s bandwidth
- PC2-4200: DDR2-SDRAM memory stick specified to run at 266 MHz using DDR2-533 chips, 4.267 GB/s bandwidth
- PC2-5300: DDR2-SDRAM memory stick specified to run at 333 MHz using DDR2-667 chips, 5.333 GB/s bandwidth
- PC2-6400: DDR2-SDRAM memory stick specified to run at 400 MHz using DDR2-800 chips, 6.400 GB/s bandwidth
DDR III is likely to be called DDR III SDRAM (Double Data Rate Three Synchronous Dynamic Random Access Memory), is the name of the new DDR memory standard that is being developed as the successor to DDR2 SDRAM.
The memory comes with a promise of a power consumption reduction of 40% compared to current commercial DDR2 modules, due to DDR III's 90 nanometer fabrication technology, allowing for lower operating currents and voltages (1.5V, compared to DDR2's 1.8V or DDR's 2.5V). "Dual-gate" transistors will be used to reduce leakage current.
DDR3 Prefetch Buffer width is 8 bit, whereas DDR2 is 4 bit, and DDR is 2 bit.
Theoretically, these modules could transfer data at the effective clockrate of 400-800 MHz (for a bandwidth of 800-1600 Mb/s), compared to DDR2's current range of 200-533 MHz (400-1066 Mb/s) or DDR's range of 100-300 MHz (200-600 Mb/s). To date, such bandwidth requirements have been mainly on the graphics market, where vast transfer of information between framebuffers is required.
Prototypes were announced in early 2005, while DDR3 specification is expected to be publicly available in mid 2006. Supposedly, Intel has preliminarily announced that they expect to be able to offer support for it near the end of 2007. AMD's roadmap indicates their own adoption of DDR3 to come in 2008.
Spec standards (not finalized yet)
- DDR3-800 : DDR-SDRAM memory chips specified to run at 100 MHz, I/O clock at 400 MHz
- DDR3-1067: DDR-SDRAM memory chips specified to run at 133 MHz, I/O clock at 533 MHz
- PC3-6400: DDR3-SDRAM memory stick specified to run at 400 MHz using DDR3-800 chips, 6.40 GB/s bandwidth
- PC3-8500: DDR3-SDRAM memory stick specified to run at 533 MHz using DDR3-1067 chips, 8.53 GB/s bandwidt
Thus sccr64472 is correct. The error lies in seeing the quad pumped rise and fall multiplied frequency as the actualized frequency when it is not.