Nothing is "crippled", why would you build an engineering sample without all of the functionality?
Engineering samples are built for validation and testing, NOT for performance. You want as many samples as possible to do all of your test so you shoot for high yields, which generally implies low clock speed.
Performance is based on:
The microcode in the silicon
The compiler updates
The OS optimizations
Performance tuning by engineers
When you are looking at the alleged sample performance what you are seeing is a big bowl of dough that has not been baked into bread.
There are too many people on the internet making stupid comments about BD performance based on engineering results that might or might not be real.
Everyone needs to take it down a notch because what you are seeing, if you are actually seeing real results, is not indicitive of the final performance. You should all be smart enough to understand this, but somehow I keep having to explain this over and over.