The Bulldozer Blog is Live - Page 43  

Man this sucks.

Haha

Well played.

With AVX support added with SP1 on Windows 7 SB chips have seen double the performance in pure GFlops. Since Bulldozer also supports this instruction set - as well as some other ones... What is the benefit in increased FP calculations to the everyday user, and what other benefits does the change to 256 bit (2x126 on bulldozer - however can be combined correct?) and the AVX instruction set provide?

Yah, my old 1090T was getting 76 on DDR2 (while others were getting 80/82 on ddr3), but the best 980x we've seen around here got 100.

Clearly for $230 vs $1000+ thats a huge price vs performance ratio in AMD favor.

Can you explain the AVX Instruction set a little better for us, and what exactly it means to us the end user at home?

Does AVX only affect the FP calculations, or does it affect other things such as SSE 4.2? On the Intel side of things we've already seen the affects of the increased FP capabilities in raw tests such as LinX or IntelBurnTest. We were getting around 70 GFlops on 4 cores (at 5GHz lol not retail speed), however when SP1 came out with updated linpacks we've seen that shoot up drastically, I myself have reached 133 GFlops with just 4 cores.

What does any of this mean to the home end user though? It seems something more related to server work loads or I dare even say, gpu based workloads. Aside from the AVX instruction (which seems to again be started at server/business) there isn't a whole lot more being offered by either company in the way of performance advancement. Don't get me wrong, I know you guys will be quite a bit faster than you are now, but it seems we really aren't that far from were we were a few years ago. Instead of going up, we're going outward... Instead of faster core calculations we're getting more cores. And one of the biggest problems with that is the fact that most software today can't use more than 2, others up to 4, but for the average user x6 x8 is near pointless and offers no noticeable performance gain over their previous x2/x4 chips.

Everything seems to be geared towards using less power, but I still can't beam anyone up, and I'm not hugging any trees these days. Is the high end high performance desktop era ending, only to be replaced by slower.. less exciting products like the iPad?
Edited by BallaTheFeared - 1/18/11 at 11:15am

For the average home user, AVX simply put means nothing. Most people wont even use that feature, the feature will of course be implemented in apps whos purpose is dealing with heavy FPU calculations, like encoding, photoshop calcs(I think are fpu based) etc...

MOST consumers only care about how fast their perceivable speed of the dang internet is and how fast they can get their emails. And if the computer will keep the cursor moving consistently and blinking while typing out a letter in a word processor.

The reason for the change in focus is...like stated above, speed is pretty much where it needs to be for average joe, it was there a long time ago. The reason for spreading out, is because although there is the speed...people want to be able to do more at once on their PC.
This is where multi core setups come in handy.
Thats also why the market is focusing more and more on smaller more power effecient yet slower devices....because average joe has had their speed expectations met long ago. So sacrificing some raw computing power for mobility and smaller energy consumption envelopoes is where its headed.

Luckily for the average population, there is still much competition between AMD and Intel, which is why there is still a surge for faster / more capable processors...because their marketings are effective at telling people they need to do more, do it faster and do it now...and the population accepts this , buys and hence the R&D leads to better , faster products.

Now the one question I have about AVX is...MUST your OS support it before any of your apps can utilize it? Or must apps only be recompiled / optimized and they can take advantage of it??


I like the way is implimenting their AVX...in the event you have a 256bit AVX code...the "flex fp" will merge its 2 128bit units together to a single 256bit and simultaneously crunch out 2 halves of that instruction. But, when only legacy SSE code is being ran(cant believe its legacy already) the 2 FMACs will function independently being able to pull off similar IPC(I believe thats correct) as it could with AVX.

Intels AVX implementation is a little bit more wacky but essentially the kinda thing. Their FPU ports werent exactly widened to 256bit...but when it senses 256bit AVX code, it splits 128bit to the FP port and 128bit of it to the exec unit on same port. Whether or not this hampers some of the code running in the exec units when AVX is in use...Im not really clear on. But either way, its kinda a shared resource design as well.

For general FPU layout, I believe its right in saying Intel has 3 ports which can execute different types of FPU calculations simultaneously...whereas AMD's 2 FMAC pipes are more flexible, they can execute ANY type of FPU simultaneously.
Intel's can peek at 3 IPC FP while AMD's can peak at 2 IPC FP/sec.
Too bad AMD didnt enlist the help of their 128bit MMX SIMD pipes(how intel did) in the FPU cluster to assist w/ 256bit AVX code...then they would have the upper hand in FPU for sure!
AT LEAST, thats how I understand it =P Im still learning all this stuff so if anyone has some more correct insight, please explain =)
Edited by GenTarkin - 1/18/11 at 3:58pm

first bulldozer bench.....????

I think i'm having a coronary from laughing so much.

No, I'm talking about the wait.