Originally Posted by pauldovi
Mine is at 3-3-3-4.
I am hoping to get it up to 3-2-2-3.
DDR2 @ 3 - 3 - 3 - 4 is actually running on dual sine curves of 1.5 - 1.5 - 1.5 - 2 and addition of the velocities of the two sine curves bring about the 3 - 3 - 3 - 4.
Remember when DDR first came about in comparison to SDR? SDR = 133MHz (max spec) and DDR doubled that with great latencies. The difference was that each stream was on a different part of the sine curve. One transferred on the top and one transferred on the bottom.
Now DDR2 has dual streams on both top and bottom and each stream must be kept distant and distinct from the other partner stream. But if you were to have a full use of the theoretical transfer limits then you would see what Intel is doing and where they are going. Alas, there is no ability yet and until we see 1666 or 2000 (minimum) transfer rates from the FSB we will not get the full benefit of the technology. By then we will no doubt be on another (DDR3/4 LOL) platform that we will not fully utilize either.
LOL Today seems to be a memory day for me.