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[PCPER] Bulldozer at ISSCC 2011 - The Future of AMD Processors - Page 7

post #61 of 64
I've never really understood CPU cache for the different levels, is more always better?
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Koneko
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post #62 of 64
Quote:
Originally Posted by Phoenixlight View Post
I've never really understood CPU cache for the different levels, is more always better?
Different levels of cache are just like saying where they are located on the die. Cache is on die storage. Being that it's on die it can opereate at extreme speeds. So typically the more cache the more data the cores can process at a time. It's something like this

Level 1: Instruction's for each Cores
Level 2: Storage for each Cores
Level 3: Storage for all Cores
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post #63 of 64
Oh ok cool
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Koneko
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post #64 of 64
Quote:
Originally Posted by hajile View Post
According to Anandtech in The RV870 Story: AMD Showing up to the Fight AMD can keep secrets. (the complete article is definitely well worth reading)
That story could almost be a movie!
Worth reading!!!
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