TREF is the # of clock cycles between RAM refreshes. (Information in RAM is stored in capacitors and decays/disipates over time.. requiring periodic refresh of information before it disappears)
Lower # of clock cycles is less stringent and should be more easily handled... but the more often you refresh, the more of your time you take up doing it instead getting down to business of getting and changing data. So, for optimal performance, the TREF should be as large as your memory can handle. (it typically accounts for 2-4% of memory time)
So, whats the deal with "200Mhz 7.8us" vs "166Mhz 7.8us"?
Suppose that the absolute latest that you can deley RAM refresh is 5.0us. Well, that will translate to different number of clock cycles dependent on the frequency of the chips. It has nothing to do with multipliers, fsb, htt, command rate or anything else. In its infinite wisdom the memory controller periodically cycles through all the memory banks and refreshes their data contents.
Your ram spec should say a refresh interval time, eg 7.8uS or 15.6uS. And 200Mhz = 5nano-seconds, 250Mhz = 4nano-seconds, 300Mhz = 3.3nano-seconds, nano-seconds x clock cycles = Refresh rate.
Now, Clock cycles = Refresh rate / nano-seconds, sooooo! Clock cycles = Your refresh rate (7.8 or 15.6) / (1/memory speed)
Example:
Clock cycles = 7.8 / (1/300)
Clock cycles = 2340
Then check for the closest value to 2340 in the BIOS
all indications I've seen point to that TREF has negligible impact on performance, and unless incorrectly set to begin with, would not improve overclockability.
Here's a chart: (Assumes a 1:1 divider. With diferent divider, use memory frequency as FSB in the chart.
Tref VALUES FOR FSB:
TREF 15.6 TREF 7.8 TREF 3.9 TREF 1.95
FSB SET FSB SET FSB SET FSB SET
66.0,1032,132.0,1032,265.0,1032,796,1552
75.0,1168,150.0,1168,299.5,1168,1058,2064
83.0,1296,166.0,1296,332.0,1296,1329,2592
98.5,1536,197.0,1536,394.0,1536,1600,3120
99.5,1552,199.0,1552,398.0,1552,1863,3632
100.0,1560,200.0,1560,400.0,1560,-,-
116.0,1816,233.0,1816,466.0,1816,-,-
131.0,2048,263.0,2048,525.0,2048,-,-
132.0,2064,265.0,2064,529.0,2064,-,-
150.0,2336,299.5,2336,599.0,2336,-,-
164.0,2560,328.0,2560,656.0,2560,-,-
166.0,2592,332.0,2592,665.0,2592,-,-
197.0,3072,394.0,3072,800.0,3120,-,-
200.0,3120,400.0,3120,931.0,3632,-,-
233.0,3632,466.0,3632,1058.0,4128,-,-
236.0,3684,472.0,3684,-,-,-,-
265.0,4128,529.0,4128,-,-,-,-
269.0,4196,538.0,4196,-,-,-,-
299.5,4672,599.0,4672,-,-,-,-
302.0,4708,-,-,-,-,-,-
(Use the Tref 7.8 column for the ASUS A8N32-SLI Deluxe.)
Tref VALUES FOR FSB:
TREF 15.6 TREF 7.8 TREF 3.9 TREF 1.95 <Memory's spec.
FSB SET FSB SET FSB SET FSB SET < Set tREF to this for this FSB
66 1032 132 1032 265 1032 796 1552
7511681501168299.5116810582064
8312961661296332129613292592
98.515361971536394153616003120
99.515521991552398155218633632
100156020015604001560--
116181623318164661816--
131204826320485252048--
132206426520645292064--
1502336299.523365992336--
164256032825606562560--
166259233225926652592--
197307239430728003120--
200312040031209313632--
2333632466363210584128--
23636844723684----
26541285294128----
26941965384196----
299.546725994672----
3024708------
Edited by billbartuska - 10/30/08 at 10:09pm
Lower # of clock cycles is less stringent and should be more easily handled... but the more often you refresh, the more of your time you take up doing it instead getting down to business of getting and changing data. So, for optimal performance, the TREF should be as large as your memory can handle. (it typically accounts for 2-4% of memory time)
So, whats the deal with "200Mhz 7.8us" vs "166Mhz 7.8us"?
Suppose that the absolute latest that you can deley RAM refresh is 5.0us. Well, that will translate to different number of clock cycles dependent on the frequency of the chips. It has nothing to do with multipliers, fsb, htt, command rate or anything else. In its infinite wisdom the memory controller periodically cycles through all the memory banks and refreshes their data contents.
Your ram spec should say a refresh interval time, eg 7.8uS or 15.6uS. And 200Mhz = 5nano-seconds, 250Mhz = 4nano-seconds, 300Mhz = 3.3nano-seconds, nano-seconds x clock cycles = Refresh rate.
Now, Clock cycles = Refresh rate / nano-seconds, sooooo! Clock cycles = Your refresh rate (7.8 or 15.6) / (1/memory speed)
Example:
Clock cycles = 7.8 / (1/300)
Clock cycles = 2340
Then check for the closest value to 2340 in the BIOS
all indications I've seen point to that TREF has negligible impact on performance, and unless incorrectly set to begin with, would not improve overclockability.
Here's a chart: (Assumes a 1:1 divider. With diferent divider, use memory frequency as FSB in the chart.
Tref VALUES FOR FSB:
TREF 15.6 TREF 7.8 TREF 3.9 TREF 1.95
FSB SET FSB SET FSB SET FSB SET
66.0,1032,132.0,1032,265.0,1032,796,1552
75.0,1168,150.0,1168,299.5,1168,1058,2064
83.0,1296,166.0,1296,332.0,1296,1329,2592
98.5,1536,197.0,1536,394.0,1536,1600,3120
99.5,1552,199.0,1552,398.0,1552,1863,3632
100.0,1560,200.0,1560,400.0,1560,-,-
116.0,1816,233.0,1816,466.0,1816,-,-
131.0,2048,263.0,2048,525.0,2048,-,-
132.0,2064,265.0,2064,529.0,2064,-,-
150.0,2336,299.5,2336,599.0,2336,-,-
164.0,2560,328.0,2560,656.0,2560,-,-
166.0,2592,332.0,2592,665.0,2592,-,-
197.0,3072,394.0,3072,800.0,3120,-,-
200.0,3120,400.0,3120,931.0,3632,-,-
233.0,3632,466.0,3632,1058.0,4128,-,-
236.0,3684,472.0,3684,-,-,-,-
265.0,4128,529.0,4128,-,-,-,-
269.0,4196,538.0,4196,-,-,-,-
299.5,4672,599.0,4672,-,-,-,-
302.0,4708,-,-,-,-,-,-
(Use the Tref 7.8 column for the ASUS A8N32-SLI Deluxe.)
Tref VALUES FOR FSB:
TREF 15.6 TREF 7.8 TREF 3.9 TREF 1.95 <Memory's spec.
FSB SET FSB SET FSB SET FSB SET < Set tREF to this for this FSB
66 1032 132 1032 265 1032 796 1552
7511681501168299.5116810582064
8312961661296332129613292592
98.515361971536394153616003120
99.515521991552398155218633632
100156020015604001560--
116181623318164661816--
131204826320485252048--
132206426520645292064--
1502336299.523365992336--
164256032825606562560--
166259233225926652592--
197307239430728003120--
200312040031209313632--
2333632466363210584128--
23636844723684----
26541285294128----
26941965384196----
299.546725994672----
3024708------
Edited by billbartuska - 10/30/08 at 10:09pm





