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post #121 of 239 (permalink) Old 07-11-2019, 03:12 AM
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Quote: Originally Posted by gupsterg View Post
Same here. Initially preset was The Stilt 3466MHz timings, then other timings dropped lower.



Will be trying 3600MHz C14 on Zen 2 and moar once I finish other testing.

Arctic Silver 5, spread by strip of plastic card. I once tried Hydronaut, was so awful to spread, after that experienced I couldn't be bothered to try any other.

Same HW except CPU, room is ~24C R5 3600 screenie, ~22C R7 2700X, PBO+100MHz vs PE: Default PBO: Enabled, pretty much same RAM timings.



Best I had 3666MHz on 2700X was ~4000% in RT, got several ~3000% passes.

Wait, i missed what cpu cooler you are using. Temp is outstanding even without an undervolt. Must be a combo of spreading the paste, cooler, bios version/settings, chip driver, and silicon.

Dam, 1600 to 1800. My Flares should do as well. I have not crossed upon proof that 3200 to 3600 will make a significant lift in performance on the Ryzen 3000.

If there is no significant effect of going 3600MHz on the ram, then there is no reason to oc or there is no reason to buy expensive ram kits. Most reviewers are using 3200 CL16.

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post #122 of 239 (permalink) Old 07-11-2019, 10:05 AM
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Quote: Originally Posted by rdr09 View Post
Wait, i missed what cpu cooler you are using. Temp is outstanding even without an undervolt. Must be a combo of spreading the paste, cooler, bios version/settings, chip driver, and silicon.

Dam, 1600 to 1800. My Flares should do as well. I have not crossed upon proof that 3200 to 3600 will make a significant lift in performance on the Ryzen 3000.

If there is no significant effect of going 3600MHz on the ram, then there is no reason to oc or there is no reason to buy expensive ram kits. Most reviewers are using 3200 CL16.
Custom WC, linked thread in sig OP has info .

3600MHz 1:1 MEMCLK:FCLK was too easy IMO. So regardless of gains I'd be trying that. SOC was measured on DMM when everything was stock, I saw ~1.010V IIRC, manually setting 1.025V matched that reading taken at defaults/auto. CLDO_VDDG stock is 0.950V, I bumped to 0.985V, VDIMM only needed to be 1.355V. So everything is so close to defaults I just would not be tempted to be a lower than 3600MHz . I'd be tempted to tighten as much as I could from The Stilt's 3466MHz timings I have been using.

AFAIK 3200MHz C14 Samsung B die is highly regarded by The Stilt, so defo your in good place. I used 3600C15 4000C18 with the 2700X, as I gained nothing more than what I did with 3200C14 kit I sold those on.

Any how here is 3666MHz 1:1 MEMCLK:FCLK, after quite a day of rinse repeat I am happy with this profile.



I did upload whilst that screen video capture was going on. I stopped at 3K%.

Spoiler!


I am now retesting with PBO+125MHz.

Spoiler!
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post #123 of 239 (permalink) Old 07-11-2019, 10:25 AM
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Quote: Originally Posted by gupsterg View Post
Custom WC, linked thread in sig OP has info .

3600MHz 1:1 MEMCLK:FCLK was too easy IMO. So regardless of gains I'd be trying that. SOC was measured on DMM when everything was stock, I saw ~1.010V IIRC, manually setting 1.025V matched that reading taken at defaults/auto. CLDO_VDDG stock is 0.950V, I bumped to 0.985V, VDIMM only needed to be 1.355V. So everything is so close to defaults I just would not be tempted to be a lower than 3600MHz . I'd be tempted to tighten as much as I could from The Stilt's 3466MHz timings I have been using.

AFAIK 3200MHz C14 Samsung B die is highly regarded by The Stilt, so defo your in good place. I used 3600C15 4000C18 with the 2700X, as I gained nothing more than what I did with 3200C14 kit I sold those on.

Any how here is 3666MHz 1:1 MEMCLK:FCLK, after quite a day of rinse repeat I am happy with this profile.



I did upload whilst that screen video capture was going on. I stopped at 3K%.



I am now retesting with PBO+125MHz.

Voltage is still good. That's 3600X territory. You got skilz and that motherboard is showing its worth.

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post #124 of 239 (permalink) Old 07-11-2019, 01:12 PM
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What is the IPC gain from Pinnacle Ridge to Matisse excluding AVX 256bit workloads?
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post #125 of 239 (permalink) Old 07-11-2019, 02:00 PM
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Quote: Originally Posted by gupsterg View Post
Custom WC, linked thread in sig OP has info .

3600MHz 1:1 MEMCLK:FCLK was too easy IMO. So regardless of gains I'd be trying that. SOC was measured on DMM when everything was stock, I saw ~1.010V IIRC, manually setting 1.025V matched that reading taken at defaults/auto. CLDO_VDDG stock is 0.950V, I bumped to 0.985V, VDIMM only needed to be 1.355V. So everything is so close to defaults I just would not be tempted to be a lower than 3600MHz . I'd be tempted to tighten as much as I could from The Stilt's 3466MHz timings I have been using.

AFAIK 3200MHz C14 Samsung B die is highly regarded by The Stilt, so defo your in good place. I used 3600C15 4000C18 with the 2700X, as I gained nothing more than what I did with 3200C14 kit I sold those on.

Any how here is 3666MHz 1:1 MEMCLK:FCLK, after quite a day of rinse repeat I am happy with this profile.



I did upload whilst that screen video capture was going on. I stopped at 3K%.



I am now retesting with PBO+125MHz.

Hey i have 3200cl16 hynix m-die running on intel system. Do you think can i overclock it to 3600 c16 or c17 with ryzen 3000 ?
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post #126 of 239 (permalink) Old 07-11-2019, 07:21 PM
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Quote: Originally Posted by gupsterg View Post
Does PBO overdrive work on R5 3600 with UEFI 2406 AEGSA 1.0.0.2, YES!


*** edit ***

Matisse Hypeship are coming to dock…

Gupsterg, quoting you in my article and btw good job. Due to review launch, I did not bother to test throughly PBO options but you've confirmed what AMD marketing has been saying. This could not be done on NPRP bios, as reported as TheStilt, me and other reviewers. Basically I said, PBO is broken or does nothing. I do not know if C7H has voltage reading points, but if it does, do you mind measuring idle and load voltages using PBO, greatly appreciate it. Good luck on your tests. With this new information I'll flashback F1 BIOS on Xtreme and see if I can make PBO work.
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post #127 of 239 (permalink) Old 07-12-2019, 01:59 AM
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Quote: Originally Posted by gupsterg View Post
Custom WC, linked thread in sig OP has info .

3600MHz 1:1 MEMCLK:FCLK was too easy IMO. So regardless of gains I'd be trying that. SOC was measured on DMM when everything was stock, I saw ~1.010V IIRC, manually setting 1.025V matched that reading taken at defaults/auto. CLDO_VDDG stock is 0.950V, I bumped to 0.985V, VDIMM only needed to be 1.355V. So everything is so close to defaults I just would not be tempted to be a lower than 3600MHz . I'd be tempted to tighten as much as I could from The Stilt's 3466MHz timings I have been using.

AFAIK 3200MHz C14 Samsung B die is highly regarded by The Stilt, so defo your in good place. I used 3600C15 4000C18 with the 2700X, as I gained nothing more than what I did with 3200C14 kit I sold those on.

Any how here is 3666MHz 1:1 MEMCLK:FCLK, after quite a day of rinse repeat I am happy with this profile.



I did upload whilst that screen video capture was going on. I stopped at 3K%.



I am now retesting with PBO+125MHz.

Thanks for sharing gupsterg. I've no idea when my cpu will be here but you're saving me (lots of us!) lots of time when it does arrive. Very frustrated I can't really contribute yet! Hopefully I'll get it by tomorrow...

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post #128 of 239 (permalink) Old 07-12-2019, 01:59 AM
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Quote: Originally Posted by rdr09 View Post
Voltage is still good. That's 3600X territory. You got skilz and that motherboard is showing its worth.
Yes it verging on 3600X territory.

Quote: Originally Posted by fursko View Post
Hey i have 3200cl16 hynix m-die running on intel system. Do you think can i overclock it to 3600 c16 or c17 with ryzen 3000 ?
I'm sorry I have only used Samsung B die single side/ranked with Ryzen. Back in Mar 17 only then did I use some Crucial (Micron) & Corsair (Hynix) and they were lower end/speed kits. IIRC 2400MHz and they worked as they should, as at that time so much of the UEFI was lacking in options I really didn't tinker with it much. By the time more of the options came out I had sold that kit and moved to B die.

Quote: Originally Posted by ReDXfiRe View Post
Gupsterg, quoting you in my article and btw good job. Due to review launch, I did not bother to test throughly PBO options but you've confirmed what AMD marketing has been saying. This could not be done on NPRP bios, as reported as TheStilt, me and other reviewers. Basically I said, PBO is broken or does nothing. I do not know if C7H has voltage reading points, but if it does, do you mind measuring idle and load voltages using PBO, greatly appreciate it. Good luck on your tests. With this new information I'll flashback F1 BIOS on Xtreme and see if I can make PBO work.
No problem, glad it was useful to you .

There are benchmarks in this post with PBO+75MHz.

Here is some additional info that you may find useful or not.

Within spoiler are some UEFI screens, the zip has what I use as base profile (ie stock) and the other has all settings for PBO+75MHz 3600MHz using The Stilt 3466MHz timings for Samsung B die. The OC txt only lacks the settings for PBO which the screenshot is detailing.

Spoiler!


I reran RT this morning to get you DMM readings from the C7H Probeit points and power readings from wall plug meter. The power readings are for complete PC excluding screen. I should have perhaps set a fixed fan/pump profile, so do bare in mind power reading will be ever so slightly affected by that IMO.

Where CPU is stated stock I still had RAM OC'd to 3600MHz, SOC voltage is as it would be at UEFI defaults, CLDO_VDDG is 0.985V vs 0.950V of stock, VDIMM is set as 1.355V.

Stock: idle is ~0.920V steady, Kahru RAM Test loading CPU VCORE has swinging read, min ~1.302V to max ~1.360V, but it is more so closer to the 1.30V end than ~1.36.

PBO: idle is ~0.920V steady, Kahru RAM Test loading CPU VCORE has swinging read, min ~1.344V to max ~1.381V, but it is more so closer to the 1.344V end than ~1.381V.

Idle power reading is ~73-75W (slight swing) for stock & PBO. Under load stock is ~110W with swing upto ~120W, more so stays towards the ~110W side. Under load PBO is ~115W with swing upto ~125W, more so stays towards the ~115W side.

Below is RM for when on PBO+75MHz 3600S, red lined items do not match manual set values, EDC was 90A and SOC 1.025V.

Spoiler!


Below is RM CPU stock but RAM 3600S, here only SOC voltage is out.

Spoiler!


Below is RAM test runs screenies for this mornings readings of DMM/Watt meter.

Spoiler!


Hope this helps and all the best Gup .

Quote: Originally Posted by crakej View Post
Thanks for sharing gupsterg. I've no idea when my cpu will be here but you're saving me (lots of us!) lots of time when it does arrive. Very frustrated I can't really contribute yet! Hopefully I'll get it by tomorrow...
NP , hope you get yours soon .

Last edited by gupsterg; 07-12-2019 at 02:14 AM.
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post #129 of 239 (permalink) Old 07-12-2019, 03:26 AM
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Hi The Stilt. Long time I don't see your Posts after you left Anandtech, had to stalk you a bit to find where you were posting.


I see that you're focusing on the CPU side of things. Do you have any data regarding Matisse IO chiplet? The IO die seems to hold a lot of secrets since it is supposed to be the same design than what is used for the X570 Chipset. Given than in Socket AM4 package and in Chipset package it offers two extremely different feature sets, I find it far more interesing than the CPU chiplet itself which shouldn't vary between Matisse, ThreadRipper and EPYC 7000.

Based on what we saw previously with Zeppelin, Socket AM4 pinout seems to be limited to how many features it can expose compared to what is really in the die. For example, Zeppelin in Socket AM4 package can expose only 24 PCIe Lanes and 4 USB, whereas in the single die EPYC Embedded 3200 series, it could do the full 32 PCIe Lanes + 4 USB. It also has a builtin 10G MACs, but AMD didn't said how it was multiplexed. Same happens with Raven Ridge, which in the Ryzen Embedded V1000 series seems to expose 6 USB whereas in AM4 only 4 (Albeit it has less PCIe Lanes), and it also has the 10G MACs.
Based on AMD slides about X570: https://hexus.net/tech/features/main...pset-examined/
...Matisse IO chiplet seems to have at least 20 PCIe (In AM4 it exposes 24, 16 + 4 + 4), 12 USB, and 4 dedicated SATA. What I'm curious about, is the absolute maximum possible lane configuration (A la Intel Chipset Flex IO) that we could see in an EPYC Embedded product with a new pinout that exposes all what the IO chiplet is capable of.

I have recently been ranting about how I dislike Socket AM4 itself due to forcing you to use a Chipset, which in Zen generation is merely a glorified PCIe Switch with builtin SATA and USB Controllers, and how for mITX sized builds an embedded Zen counterpart actually makes more sense. Given the fact that Matisse IO chiplet seems to be wider than Zeppelin die IO, to me it makes sense for certain builds to kick out the Chipset from the platform and go full Zen 2 SoC. So far, there seems to be little interest in such products. I'm highly interesed on whenever you find such a product viable. I'm willing to sacrifice the upgradeable Socket just to expose more IO from the Processor package.
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post #130 of 239 (permalink) Old 07-12-2019, 04:02 AM
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@FJSAMA

I wanna thank you for looking at my screenie shots and data closely . I fully appreciate your private message pointing out the issue of CLDO_VDDP when I started using 3666MHz .

@The Stilt

I had set a lot of voltages manually for my profiles as didn't want an [Auto] rule spiking something. I had left CLDO_VDDP: [Auto] as did not think an [Auto] rule would be present on it. It bounces to ~1.1V if left on [Auto] when I use just 3666MHz MEMCLK & FCLK, is this supposed happen? below 3600MHz it is ~0.900V.

RM system UEFI defaults/stock

Spoiler!


RM system 3600MHz MEMCLK/FCLK

Spoiler!


RM system 3666MHz MEMCLK/FCLK

Spoiler!


RM system 3666MHz MEMCLK/FCLK manually set CLDO_VDDP.

Spoiler!


Is also VDDP 1.05V on Matisse? on [Auto] 3666MHz profile I see 1.05V in ASUS Turbo V Core.

Spoiler!


*** edit ***

Stock is 1.05V as well.

Spoiler!

Last edited by gupsterg; 07-12-2019 at 04:47 AM.
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