Hi The Stilt. Long time I don't see your Posts after you left Anandtech, had to stalk you a bit to find where you were posting.
I see that you're focusing on the CPU side of things. Do you have any data regarding Matisse IO chiplet? The IO die seems to hold a lot of secrets since it is supposed to be the same design than what is used for the X570 Chipset. Given than in Socket AM4 package and in Chipset package it offers two extremely different feature sets, I find it far more interesing than the CPU chiplet itself which shouldn't vary between Matisse, ThreadRipper and EPYC 7000.
Based on what we saw previously with Zeppelin, Socket AM4 pinout seems to be limited to how many features it can expose compared to what is really in the die. For example, Zeppelin in Socket AM4 package can expose only 24 PCIe Lanes and 4 USB, whereas in the single die EPYC Embedded 3200 series, it could do the full 32 PCIe Lanes + 4 USB. It also has a builtin 10G MACs, but AMD didn't said how it was multiplexed. Same happens with Raven Ridge, which in the Ryzen Embedded V1000 series seems to expose 6 USB whereas in AM4 only 4 (Albeit it has less PCIe Lanes), and it also has the 10G MACs.
Based on AMD slides about X570: https://hexus.net/tech/features/main...pset-examined/
...Matisse IO chiplet seems to have at least 20 PCIe (In AM4 it exposes 24, 16 + 4 + 4), 12 USB, and 4 dedicated SATA. What I'm curious about, is the absolute maximum possible lane configuration (A la Intel Chipset Flex IO) that we could see in an EPYC Embedded product with a new pinout that exposes all what the IO chiplet is capable of.
I have recently been ranting about how I dislike Socket AM4 itself due to forcing you to use a Chipset, which in Zen generation is merely a glorified PCIe Switch with builtin SATA and USB Controllers, and how for mITX sized builds an embedded Zen counterpart actually makes more sense. Given the fact that Matisse IO chiplet seems to be wider than Zeppelin die IO, to me it makes sense for certain builds to kick out the Chipset from the platform and go full Zen 2 SoC. So far, there seems to be little interest in such products. I'm highly interesed on whenever you find such a product viable. I'm willing to sacrifice the upgradeable Socket just to expose more IO from the Processor package.