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post #1031 of 9864 (permalink) Old 05-11-2018, 02:36 AM
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Quote: Originally Posted by Mumak View Post
Check HWiNFO build 3435, it adds reporting of Core Performance Order (Pinnacle Ridge only).
Not sure if this will be of any use for you guys, maybe...
Updated yeaterday but with way xfr2 works not much use for it tbh since it does not boost best cores constantly but keeps core rotation at least with process lasso 🙂
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post #1032 of 9864 (permalink) Old 05-11-2018, 03:09 AM
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anyone dealt with blackscreen with code 8 on the board?
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post #1033 of 9864 (permalink) Old 05-11-2018, 03:28 AM
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Morning peeps .

Well quite liking the ACB 4.075GHz OC, performance seems good. The other aspects are improved temps, lower voltage used on average and increased MHz for ACB. Minor possible loss on 1T performance (gotta try some SuperPi to see this better).

Spoiler!


Moved on to testing 3466MHz The Stilt whilst on 4.075GHz ACB. I have decided to bump VID for OC from tested 1.281V to 1.287V to guard against any issues which my testing of ~5hrs may not have revealed. SOC I was tempted to bump again only +12.5mV from last used but decided I'll go with a +18.75mV. So currently my SOC voltage/RAM MHz attained is looking like this:-

3200MHz with 0.900V set in UEFI, used The Stilt 3200MHz Safe timings, but TRC 44 TRFC 256 (VDIMM: 1.35V).
3333MHz with 0.912V set in UEFI, used The Stilt 3333MHz Fast timings (VDIMM: 1.37V).
3400MHz with 0.925V set in UEFI, used The Stilt 3466MHz timings (VDIMM: 1.37V).
3466MHz with 0.943V set in UEFI, used The Stilt 3466MHz timings (VDIMM: 1.37V).

Notes: All of above 1T GDM: Off, starting point of 0.900V was just picked, 3466MHz still under testing.

@toxick

OMG, I know my C6H, C7H and ZE have been really clean, soldering looked all sound, out of all 3 board only 1 has 1 slightly skewed inductor placement.

@crakej

I wouldn't spend too much time chasing getting GDM: Off working.

All I can say is I used 5 differing CPUs on C6H and all accepted 1T GDM: Off, all reached 3333MHz and 3 reached 3466MHz, 1 reached ~3500MHz 2T C16. Same RAM kit and another used on TR+ZE has also worked 1T GDM: Off on upto 3466MHz The Stilt. The C7H has had the F4-3200C14D-16GTZ now upto 3466MHz 1T GDM: Off The Stilt setup.

@Mumak

Thank you as always. VCORE and SOC SVI2 looks on the £ to me , DRAM from SIO chip I adjusted a few days ago in HWINFO and is sound so far.

UEFI is set at VID: 1.287V SOC: 0.943V DRAM: 1.37V, polling rate: 750ms

Spoiler!


@spyshagg

Code 8 on C7H was instability due to targeted setup, if occurs on a tested OC profile then something was overlooked and instability occurred. It could be various things related to setup, that just made instability occur.

Last edited by gupsterg; 05-11-2018 at 04:56 AM.
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post #1034 of 9864 (permalink) Old 05-11-2018, 03:42 AM
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Quote: Originally Posted by gupsterg View Post
@spyshagg

Code 8 on C7H was instability due to targeted setup, if occurs on a tested OC profile then something was overlooked and instability occurred. It could be various things related to setup, that just made instability occur.
I see.

It started to happen after testing some tighter subtimings on my stable profile. Blackscreens and HCI errors started to pop.
I rolled back to the stable profile and it kept happening.

I asked on another thread if somehow ram IC's degrade when testing unstable timings.
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post #1035 of 9864 (permalink) Old 05-11-2018, 04:04 AM
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I don't think RAM IC degrade with timings they can't sustain, pretty sure of that; increased voltage is it AFAIK.

Another aspect (which I fully don't understand or had time to look in to) is some IMC will not like DRAM voltage too high. Seen this mentioned by a few who had several CPUs to bin/use. It's similar to how The Stilt shared his experience that excessive SOC voltage leads to negative RAM MHz attainment.
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post #1036 of 9864 (permalink) Old 05-11-2018, 04:20 AM
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Well some retention effect must have been in place, as my fastest stable profile became unstable after tightening some subtimings. I'm now doing memory training with my stable profile with a slower speed to see If it fixes it. So far so good.


Yes, in my MFR DR hynix I get negative scaling above 1.4v. It seems heat related.

SoC is strange in a different way. Lower values help me with boot stability, but high values are still required for my fastest preset to work.

980mv 3200mhz = boots fine
1.137mv 3200mhz = no boot
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post #1037 of 9864 (permalink) Old 05-11-2018, 04:24 AM
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Quote: Originally Posted by gupsterg View Post
Morning peeps .

Well quite liking the ACB 4.075GHz OC, performance seems good. The other aspects are improved temps, lower voltage used on average and increased MHz for ACB. Minor possible loss on 1T performance (gotta try some SuperPi to see this better).



Moved on to testing 3466MHz The Stilt whilst on 4.075GHz ACB. I have decided to bump VID for OC from tested 1.281V to 1.287V to guard against any issues which my testing of ~5hrs may not have revealed. SOC I was tempted to bump again only +12.5mV from last used but decided I'll go with a +18.75mV. So currently my SOC voltage/RAM MHz attained is looking like this:-

3200MHz with 0.900V set in UEFI, used The Stilt 3200MHz Safe timings, but TRC 44 TRFC 256 (VDIMM: 1.35V).
3333MHz with 0.912V set in UEFI, used The Stilt 3333MHz Fast timings (VDIMM: 1.37V).
3400MHz with 0.925V set in UEFI, used The Stilt 3466MHz timings (VDIMM: 1.37V).
3466MHz with 0.943V set in UEFI, used The Stilt 3466MHz timings (VDIMM: 1.37V).

Notes: All of above 1T GDM: Off, starting point of 0.900V was just picked, 3466MHz still under testing.

@toxick

OMG, I know my C6H, C7H and ZE have been really clean, soldering looked all sound, out of all 3 board only 1 has 1 slightly skewed inductor placement.

@crakej

I wouldn't spend too much time chasing getting GDM: Off working.

All I can say is I used 5 differing CPUs on C6H and all accepted 1T GDM: Off, all reached 3333MHz and 3 reached 3466MHz, 1 reached ~3500MHz 2T C16. Same RAM kit and another used on TR+ZE has also worked 1T GDM: Off on upto 3466MHz The Stilt. The C7H has had the F4-3200C14D-16GTZ now upto 3466MHz 1T GDM: Off The Stilt setup.

@Mumak

Thank you as always. VCORE and SOC SVI2 looks on the £ to me , DRAM from SIO chip I adjusted a few days ago in HWINFO and is sound so far.

UEFI is set at VID: 1.287V SOC: 0.943V DRAM: 1.37V, polling rate: 750ms



@spyshagg

Code 8 on C7H was instability due to targeted setup, if occurs on a tested OC profile then something was overlooked and instability occurred. It could be various things related to setup, that just made instability occur.
Bit high temps and volts imo man, what cooler are you running btw?

They seem to have fixed the voltage readings finally! I am getting +- 0,10mv difference between hardwareinfo64 and probelt.

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post #1038 of 9864 (permalink) Old 05-11-2018, 04:30 AM
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Quote: Originally Posted by gupsterg View Post
I don't think RAM IC degrade with timings they can't sustain, pretty sure of that; increased voltage is it AFAIK.

Another aspect (which I fully don't understand or had time to look in to) is some IMC will not like DRAM voltage too high. Seen this mentioned by a few who had several CPUs to bin/use. It's similar to how The Stilt shared his experience that excessive SOC voltage leads to negative RAM MHz attainment.
Sure do my kit does not like volts pass 1.425-1.440 starts poping errors when on lower its all fine even tho i have them very cool.

Ill have play with SoC and memory after work when working out
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post #1039 of 9864 (permalink) Old 05-11-2018, 04:37 AM
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Quote: Originally Posted by spyshagg View Post
I see.

It started to happen after testing some tighter subtimings on my stable profile. Blackscreens and HCI errors started to pop.
I rolled back to the stable profile and it kept happening.

I asked on another thread if somehow ram IC's degrade when testing unstable timings.
Wrote this a few times , you can try to reflash your Bios and set your settings who has worked before.
I have several test scenarios where the bios got messed up while i did a lot of testings and tweakings. Stable profiles got messud up.
After reflashing bios all perfect again!

Quote: Originally Posted by lordzed83 View Post
Sure do my kit does not like volts pass 1.425-1.440 starts poping errors when on lower its all fine even tho i have them very cool.

Ill have play with SoC and memory after work when working out
Can agree this! I have test cases where higher mem voltages gave me errors. Lowering fixed those!

@gupsterg Nice results mate! Whats difference between those 2 screenies. Pstates vs PE Mode?

Quote: Originally Posted by lordzed83 View Post
LLC4
Hmm makes sense!


Last edited by majestynl; 05-11-2018 at 04:43 AM.
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post #1040 of 9864 (permalink) Old 05-11-2018, 05:00 AM
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wrong screenie in post 1033, originally posted 4.0GHz R7 1800X C6H vs stock 2700X C7H

Updated it now to left side as 2700X C7H stock, PE is set to [Default], right is ACB 4.075GHz, both using same RAM setup, etc, room temp variance between both Y-Cruncher runs 0.3C.

@hurricane28

ThermalRight Archon IB-E X2, lapped base, AS5. Seems right for load.

@lordzed83

Cool, look forward to results.

@majestynl

Sorry chap, just updated post to correct screenie. Look forward to your view/comment.
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