AGESA FW stack patched bioses for 3rd gen - Page 53 - Overclock.net - An Overclocking Community

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AGESA FW stack patched bioses for 3rd gen

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post #521 of 526 (permalink) Old 11-08-2019, 02:21 AM - Thread Starter
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Quote: Originally Posted by tsamolotoff View Post
Such as? You are saying this for N-th post, but you still don't have an example of these magical workloads which "really utilize" YMMs and actually do some kind of sensible work (apparently, rendering is not a 'real work' ).

Also, I can say for sure that the 'real-life' linear solvers (and various FFT applications) are actually 100% memory bound and stress CPU much less than any raytracing renderers if core count is greater than memory channel count. Your super-high loads in sparse matrix permutations (and i'm pretty sure extra 50% can be handled without problem) are probably only happening if your dataset is very small and has no traction to real life data.
Ok, if you insist that the examples I gave have no real-word use and are merely power viruses thats absolutely fine by me.
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post #522 of 526 (permalink) Old 11-08-2019, 02:57 AM - Thread Starter
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Quote: Originally Posted by Guido Medina View Post
If that's not the issue do you think a patched 1.0.0.3ABBA could work? if so I'm willing to test it if you patch it for me please,
I got reports of people using MSI X470 that upgraded to 1.0.0.4 which they already released and that fixed such issue,
at the moment I'm using the patched version that you keep updated on the 1st page of this thread, which I think it is for 1.0.0.3

TBH I'm not much into overclocking but a patched micro-code and stuff sounds good to me so if you have some time and are willing to do it I'm more than willing to test it ;-)
Again here is the link for the current MSI X370-GAMING-PRO bios http://download.msi.com/bos_exe/mb/7A33v4IN.zip
The bios you linked is already at 1.0.0.3ABBA level and going above that is impossible, since 1.0.0.3 and 1.0.0.4 use incompatible blocks (customization).
Since there are 1.0.0.3ABBA bioses that work and 1.0.0.4B bioses that don't work, its extremely unlikely that the issue anything related to the firmware stack itself.
Most likely some configuration changes done by the ODM are to blame and to those I cannot do anything, since they're mostly proprietary code (ODM specific).

Such is the state of RDR2 at least currently, that you don't miss out anything because of this issue...
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post #523 of 526 (permalink) Old 11-08-2019, 04:39 AM
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Nvm.

Last edited by tlstls; 11-08-2019 at 01:53 PM.
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post #524 of 526 (permalink) Old 11-09-2019, 03:05 AM
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post #525 of 526 (permalink) Old 11-10-2019, 02:30 AM - Thread Starter
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Quote: Originally Posted by gupsterg View Post
@The Stilt

VDDG CCD & IOD

i) When de-synced what would be stock for each?

ii) Have you noted any benefit from de-syncing?
No idea to be honest.
Current SMU versions only allow reading a single value.
The old VDDG option defaulted to 0.950V and it would be pretty safe to assume that the new one does too.
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post #526 of 526 (permalink) Old 11-10-2019, 03:19 AM
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Quote: Originally Posted by The Stilt View Post
No idea to be honest.
Current SMU versions only allow reading a single value.
The old VDDG option defaulted to 0.950V and it would be pretty safe to assume that the new one does too.
I had the same assumption on default value, shame SMU isn't showing the readings separately, hopefully AMD rectify that in the future. Thanks for reply .
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