Originally Posted by Korennya
Used your calculator and plugged in every detail i could figure out on every page. 3400 passed memtest86 on first try. Running on a c6h (6301 bios) and a 1st gen ryzen 1600x that's doing 4.0ghz at the same time. Pretty good for 1st gen if i'm not mistaken.
Anyway. I could use your thoughts. It's only stable in slots 2/4.. What can I do to get it stable in slots 1/3?
Is this where the DDR tune 1-4 might be useful? Ignore where it says 2DPC-SR. I had 4 sticks in there, but there's only 2 right now. I hasn't gone back to 1DPC-SR since i put the 2 extra in even though they're not in there currently. I figure if we can figure out why the first two slots aren't stable, then I might have a chance getting all 4 to run at 3400.
CH6 uses the T-topology, for it there is no difference where memory is installed. But according to the laws of physics, the load must be installed at the end of the line, i.e. in slots 2 and 4
when you install all 4 modules in the system, the stability will increase, because the empty slots have electromagnetic interferences and there is no load
Originally Posted by DDDSS
Memory controller, I think...
I didn't do it in safe mode, but I was sure to close all programs and services that weren't needed to minimize variance.
By the way, the "further tightened timings" look like this. Any suggestions on this? Which timings should I try to push further, or what timings are mismatched that increases the previously mentioned variance in latency between tests.
The operability of the memory controller is designed for 3 years using the maximum voltage of 1.2-1.25 volts. Within 3 years there will be a gradual degradation in the region of 0.01-0.03 volts
I do not like understated values for tRFC, tWRWRSD, tWRWRDD, tRDRDSD and tRDRDDD. Perhaps this is the reason for such results.
There is a concept - the golden mean, I try to always stick to it. Too low values degrade performance similarly too high. [IMG class=inlineimg]/forum/images/smilies/wink.gif[/IMG]
Originally Posted by Saiger0
for this awesome awesome tool [IMG class=inlineimg]/forum/images/smilies/smile.gif[/IMG]
I have a 16gb flare x (3200 cl14) kit running at 3400mhz at 1.4v with slightly thighter timings than the fast preset. 3466 at cl 14 spits out errors really fast so i will keep 3400 and try to tighten it as much as possible.
My question is which timings do I start to tighten first? Will I even "see" any "improvement" that is worth the hustle?
(running 2700x at 4.2ghz with 1.35v on a x470 gaming pro carbon. 1.0125 soc)
your result is gorgeous, I think you need to stay on it. In the near future I will update the presets, wait, it will be easier to configure the system
Originally Posted by redtopracer
I'll give the higher RTT PARK settings a try as well as the timings a try.
I've tried all the cad bus settings in the calculator to help stabilize 3466, but I can't get them to stop throwing errors. Best results are errors in first 10% lol.
Ive been testing cldp0_vddp settings and I think the memory straps stop right after 3400. So far 866 and 913 have eased booting issues at 3400 but 3466 still refuses to stabilize at acceptable timings.
I'm actually chasing down YouTube problems right now. YouTube flat out freezes in chrome even at stock. Mozilla does the same as well but only at the 3400 settings that tested stable. Games and movies do not crash it and CPU crypto mining doesn't either.
In all honesty this just might be it for these sticks. Should have gotten the uhq b dies instead of cheaping out and getting the HQ ones.
I received a notification that my Flare X 3200CL14 sets have already been delivered to my city, in the near future I will try to give an assessment of the quality of this memory. Perhaps it is not a UHQ, but most likely the problem of the architecture of the memory controller + motherboard topology
Hynix CJR i already have [IMG class=inlineimg]/forum/images/smilies/smile.gif[/IMG]