[AMD] AMD Financial Analyst Day 2015 - Page 26 - Overclock.net - An Overclocking Community

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[AMD] AMD Financial Analyst Day 2015

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post #251 of 283 (permalink) Old 05-07-2015, 04:27 PM - Thread Starter
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Quote:
Originally Posted by SkateZilla View Post

Its funny how users interprhet that interview as AMD copy and pasted parts of architectures lol.

This isnt something you can simply copy/pastes peices together.
Not copy but re-use as guidelines. It's hard but less work than to do something from scratch.
If you weren't referencing to my post then NP. Don't want to be misinterpreted that's all.
Quote:
Originally Posted by Themisseble View Post

My logic is OFF?
Of course core size does not directly correlate to Clock percentage. It is design which does. But saying that ZEN wont hit 3.5GHz is stupid.
They said they will put best of both. So jaguar is small and fast while vishera is really good at hitting 5GHz.
It will be closer to 4GHz that to 2GHz I'm quite sure about that so 3GHz+ is what it is at.
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post #252 of 283 (permalink) Old 05-07-2015, 09:29 PM
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Originally Posted by ebduncan View Post

Not really.

Little is known about the scalability with Samsungs 14nm FinFets. Simply put there is no "safe" way to estimate what Zen will be clocked at. We will see how these parts do in clock speed once we get them in our hands to play with.

If AMD says its getting back into the high end market and firmly believes it. Then I have little doubt they will be able to compete in the key areas. Honestly a Excavator core FX chip would have be relatively good. AMD has managed 10-15% more IPC per generation.

Time will tell.

Agreed, though I have more faith in AMD's arch design in Zen, than I do in Samsung's ability to deliver expected metrics as designed at 14nm. Even Intel, with their massive R&D budget and world-class fabs, has/had been having fits with 14nm. Time will certainly tell.

Does FOLDING make you feel MAGICAL? Of COURSE it does!

"It may not seem logical, but trust me. I know where I'm going. And it's far."


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post #253 of 283 (permalink) Old 05-07-2015, 10:36 PM
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Originally Posted by btupsx View Post

Agreed, though I have more faith in AMD's arch design in Zen, than I do in Samsung's ability to deliver expected metrics as designed at 14nm. Even Intel, with their massive R&D budget and world-class fabs, has/had been having fits with 14nm. Time will certainly tell.

The Exynos 7420 is already a thing, and it puts the other A5x socs to shame.

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post #254 of 283 (permalink) Old 05-07-2015, 10:53 PM
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Granted. However, the Exynos is produced on LPE, is ARM based, and is inherently meant to be low power. Too many unknown variables to say with any vague certainty that everything translates over as intended on LPP.

Does FOLDING make you feel MAGICAL? Of COURSE it does!

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post #255 of 283 (permalink) Old 05-08-2015, 12:10 AM
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Quote:
Originally Posted by EniGma1987 View Post

No Serios, that answer Keller gave was and I quote: "So AMD has two families of processors today, The Bulldozer family focused on really high frequency, Jaguar family super small cores. Now in our new generation what I told my team is we got to take the DNA of both, the best of both, and put it there. So this is really nice, we know how to do high frequency design, we know how to do dense design, ARM gives us inherent architectural efficiency, and the combination is pretty good".
The question was specifically on K12 and how the design was going for the ARM processor. In no way was the high frequency talk in relation to Zen or that Zen would be a high frequency design.
That would mean AMD would have to front the cash to Samsung and GF for designing a specific tweak to the node and bringing a facility online to run the process. AMD does not have that kind of cash nor has anyone in the industry even hinted at this going on. There will NOT be a special node process just for Zen. AMD used to do things like this back in the A64 days and through Brisbane, back when AMD owned all the foundries. However, AMD cannot do these continued tweaks to nodes now because they do not own the fabs and they do not have the funds to do so.
So for you it makes a lot of sense to integrate the best "DNA" features of their x86 designs ONLY into creating a new ARM core but not intro creating a new X86 core(it's not even necesary for an ARM core to clock as high as 5ghz and I don't even think it can). He said our new generation for a reason.
Also lets forget the fact that he mentioned multiple times that his team reused what they know from the current X86 architectures into creating the new cores.

What you are saying is frequency scaling is something they've ignored when creating Zen?? That is impossible.
Even if we take as an example Kaveri which can't OC as good as Richland because of the node is based on it can still reach something like 4.7ghz.
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post #256 of 283 (permalink) Old 05-08-2015, 01:51 AM
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You are still ignoring the history and trying to wrestle off the laws of physics.

Despite I think highly of JK he is just one man.
It´s not like he is drawing superior cores in his private study with a charcoal while smoking a Cuban cigar.
Code:

Northwood

L2 Latency = 18 cycles
BMP = 20 cycles
HSF = 3.4GHz
HOF = 5.23GHz

Prescott / Cedar Mill

L2 Latency = 28 cycles
BMP = 31 cycles
HSF = 3.8GHz
TDF = 10GHz
HOF = 8.54GHz

Conroe & Penryn

L2 Latency = 14 cycles
BMP = 15 cycles
HSF = 3.06GHz
HOF = 6.82GHz

Sandy Bridge & Ivy Bridge & Haswell

L2 Latency = 11 cycles
BMP = 14 cycles
HSF = 3.5GHz & 3.5GHz & 4.0GHz
HOF = 6.04GHz & 7.18GHz & 7.19GHz

--------------

AMD 10h & 12h

L2 Latency = 12 cycles
BMP = 10 cycles
HSF = 3.7GHz & 3.0GHz
HOF = 7.38GHz & 6.2GHz

AMD 15h

L2 Latency = 20 cycles (BD, PD) 19 cycles (SR, XV)
BMP = 20 cycles
HSF = 4.7GHz
TDF = 5GHz++
HOF = 8.72GHz

AMD 16h

L2 Latency = 25 cycles
BMP = 14 cycles
HSF = 2.4GHz
HOF = 3.17GHz

HSF = Highest Shipping Frequency
TDF = Target Design Frequency
HOF = Highest Overclocked Frequency

Now tell me what Prescott and AMD 15h have in common?
Then repeat that for the "high IPC" designs.
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post #257 of 283 (permalink) Old 05-08-2015, 02:13 AM
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I also see there Sandy Bridge & Ivy Bridge & Haswell. They all can get past 4.5ghz with OC.

Keller is one man that has 2 teams, I've never said he is doing all by himself and I don't wrestle anything.
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post #258 of 283 (permalink) Old 05-08-2015, 03:06 AM
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it is quite difficult for a desktop unlocked chip to NOT get pass 4GHz these days & most of them cross 4.5GHz mark.

So IMO why wouldnt zen @ 14nm be factory clock at 3.5GHz & OCable to 4-4.5GHz.

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post #259 of 283 (permalink) Old 05-08-2015, 04:58 AM
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I was responding to this:
Quote:
I wouldn´t expect Zen to reach any higher than 3.5GHz even in optimal conditions.

I estimate between 3.5-4ghz base clocks for their top models.
Also Bulldozer was not designed to be a speed demon just to reach higher clocks that Stars.
The A8-3850 on the same 32nm SOI couldn't get near 4ghz although that wasn't a problem for Bulldozer CPUs so CPU architecture is important.
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post #260 of 283 (permalink) Old 05-08-2015, 05:47 AM
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Quote:
Originally Posted by Serios View Post

I was responding to this:
I estimate between 3.5-4ghz base clocks for their top models.
Also Bulldozer was not designed to be a speed demon just to reach higher clocks that Stars.
The A8-3850 on the same 32nm SOI couldn't get near 4ghz although that wasn't a problem for Bulldozer CPUs so CPU architecture is important.

Llano was broken but also gimped by the manufacturing process in the same exact way the first Bulldozer CPUs were.
The hardware division unit was broken and the frequency capabilities were badly neutered by the L2 cache.
In 12h the L2 size was doubled from 512KB to 1024KB per core but the latency was left intact.

If Llano was re-taped out by using the same now much more mature 32nm SHP SOI process the results would be very different in terms of the maximum clock.

If AMD wasn´t targeting high frequencies with 15h family why did they double the length of the pipeline and increase the L2 latency by 67%?
The L2 latency could be partitially explained with it´s increased size however the length of the pipeline cannot. Unless Bulldozer was designed by complete morons the design was definitely targeted for extremely high frequencies, most likely past 6GHz.
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