More I look into the chosen process the more worried I get
BEML comparison between the previously used and current processes:
GlobalFoundries 32nm SHP PD-SOI = 11 (STR, BD, PD)
GlobalFoundries 28nm HPP = 9 - 15 (XV - SR)
GlobalFoundries (SEC) 14nm LPP FinFET = 11
Intel 14nm Gen. 2 FinFET = 13
Intel 22nm Gen. 1 TG HKMG FinFET = 9
TSMC 28nm HP = 12
TSMC 28nm HPL = 11
ST 28nm FD-SOI = 10
Intel said they had to increase the BEML count from 9 to 13 when moving from 22nm to 14nm in order to tackle the process issues.
The Samsung 14nm LPP has up to 11 layers so I wonder how it manages with a design with: roughly five times bigger in size, 40-60x higher power consumption and (hopefully) with twice as high operating frequency.
Also something good to read http://www.soitec.com/pdf/WP_handel-jones.pdf
Never thought I said it, but I am starting to agree with Hector (HR) in the matter of having own fabs