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[AnandTech] AMD is participating in US DOE new Supercomputer project

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post #21 of 22 (permalink) Old 05-08-2019, 10:01 AM
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post #22 of 22 (permalink) Old 05-12-2019, 07:35 AM
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After Watching this about Milan and the possibility that it will include 15 Chiplets and maybe SMT4, I think [my Imagination] I Have an Idea where AMD is going with it's future(Maybe Custom design?) HPC EPYC design on 7nm+:
1)Each CPU chiplet will be 6C/24T to save space/power while giving similar or better then 8c/16t performance.
2)Adding 4 custom Instinct GPU chiplets.
3)Adding 2 custom AI accelerator [Asics] chiplets.
4)1 I/O chiplet with HBM memory stack.

So the final EPYC Milan(?) can be HPC beast with:
  • 48C/192T Zen CPU cores.
  • 4 custom Instinct GPUs.
  • 2 AI accelerator Asics.
  • 1 I/O Chiplet with HBM 3D staking .


EDIT: I see that there was already great article on such HPC APU design:
https://www.overclock.net/forum/225-...lops-200w.html
So after reading some of it I changed my illustration:
No CPU Chiplet ontop of I/O:[Took Vega Pro 20CU image and placed the HBM on top and shrank it to 7nm+ level]
IMO the GPU's could take ~150W + 75W~100W rest of the CPU+I/O= around 250W TDP.


Or CPU Chiplets ontop of I/O:





And 8 Milans could be installed in Cray’s Shasta 1U with Direct Liquid Cooling:

https://www.anandtech.com/show/13616...liquid-cooling
Do you think that such chiplet design could be beneficial for HPC clients?

Last edited by Hwgeek; 05-13-2019 at 12:41 AM.
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