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post #308 of (permalink) Old 06-10-2017, 11:04 AM - Thread Starter
gupsterg
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It's been interesting to get more into RAM timings. I viewed link, then found this info
Quote:
True latency (ns) = clock cycle time (ns) x number of clock cycles (CL)

*clock cycle time (ns) = 1/((the speed your running your ram at/2)/1000)

So basically then I setup rig as below using The Stilt's timings:-


3.8_3200C14S_setting.txt 19k .txt file


HCI Memtest pass.





So I was using manual timings, changing RAM MHz only, so ns will be differing even if timings same.

Clock cycle time = 2400MHz: ~0.83ns, 2800MHz: ~0.71ns, 3200MHz: ~0.63ns.
True Latency using CL14 = 2400MHz: ~11.62ns, 2800MHz: ~9.94ns, 3200MHz: ~8.82ns.



RAW data / XLS which is screenie is above in this ZIP. In ZIP there are screenies of Ryzen Timings Checker. The tRFC is 333 for all setups, but if we apply the calc above we see it matches tRFC (ns) shown in RTC.

tRFC: 333 results in 277.5ns @ 2400MHz, 237.857ns @ 2800MHz, 208.125ns @ 3200MHz.

*** edit ****

3333MHz added.



*** edit 2 ***

3333MHz Fast added.



RAW data zip
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