Originally Posted by The Stilt
Swapped in the R7 1700 CPU, which has the MEMCLK hole located in the 3212.8 - 3347.2MHz region on dual rank modules and at default CLDO_VDDP voltage. I've usually used 96Ohm ProcODT on B-die dual rank modules, since it seems to provide the best cold booting ability. However it seems that with certain CPU, motherboard and DRAM configurations (even within the same exact spec) 96Ohm ProcODT might be too high and cause signaling issues (extremely random and < 80 in size errors in HCI Memtest). There seems to be some correlation with the memory timings as well, especially with the tWR value.
In some cases it might be that the system will require greater than 80Ohm ProcODT in order to be able to cold boot properly, but the next available option (96Ohm) is too high to maintain the signal integrity. In these cases I would suggest that you move the DIMMs for the normal A2 & B2 slot pair to A1 & B1 slots, since the slots closer to the CPU seem to be able to handle lower ProcODT (80Ohms) than the slots further away from the CPU.
- A2 & B2 slots populated
- ProcODT 80Ohms
- VDDCR_SoC 1.05000V
- DRAM Voltage & Boot Voltage 1.39000V (1.404V actual, keep the runtime and boot options synced
- CAD Controls "Auto" (0-0/32, 0-0/32, 0-0/32, 24/24/24/24Ohm)
- Rtt_Nom = Disabled, Rtt_Wr = Disabled, Rtt_Park = RZQ/5 (48Ohm) - i.e. "Auto"
- CLDO_VDDP = 975mV (to push the MEMCLK hole further away from the current operating frequency, somewhat enhances cold boot capability)
These settings are pretty fast for a rather low quality B-die DR modules: