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post #7836 of (permalink) Old 01-01-2019, 06:26 PM
sdch
just some dude
 
Join Date: Jul 2014
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Intel Memory Overclocking Quick Reference

Quick Gains:
  1. Raise frequency, but not to the detriment of CL. Target a frequency/CL combination that makes sense for both transfer rate and latency.
  2. Lower CL (drives RTLs lower), and set tRCD/tRP accordingly.
  3. Lower CR if possible (drives RTLs lower), but not to the detriment of other timings.
  4. Lower tRFC.
  5. Lower tFAW (and tRRD_S with it, see below).
  6. Raise tREFI.
Then work on the other timings. Tight 2nd/3rd timings can have meaningful results.

Voltages:

Timings and "Rules":

Primary Timings:
  • CL: Start with a safe frequency/CL combination and adjust from there.
  • tRCD/tRP: Try 0-2 above CL (Samsung B-die) or 1-5 above CL (other ICs).
  • tRAS: CL + tRCD + tRTP (Source) or CL + tRCD + 2 (Source and Diagram). Min: 28. (Source: ASRock UEFI description)
  • CR: Try 1, otherwise leave at 2.

Secondary Timings:
  • tWR: Leave on Auto and control by tWRPRE until desired value reached. Manually set after that. (Raja: 16, Try: 9-16)
  • tRFC: Lower as much as possible. JEDEC default for 8Gb ICs: 0.350*XXXX/2 for DDR4-XXXX. (Raja: 350-360, Try: <=default)
  • tRRD_L: Min spacing is 6. (Raja: 6, Try: 6-8)
  • tRRD_S: Min spacing is 4. (Raja: 4, Try: 4-6)
  • tWTR: Min spacing is possibly 4. (Raja: 4, Try: 1-4)
  • tWTR_L: Leave on Auto and control by tWRRD_sg until desired value reached. Manually set after that. (Raja: 8, Try: 6-8)
  • tWTR_S: Leave on Auto and control by tWRRD_dg until desired value reached. Manually set after that. (Raja: 6, Try: 1-6)
  • tRTP: Min spacing is supposed to be 4, but this seems to actually be 6 with modern systems due to memory densities. (Raja: 8, Try: 6-8)
  • tFAW: Min is 4*tRRD_S. (Raja: 16-24, Try: 16-28)
  • tCWL/tWL: Set to 0-3 lower than CL. (Raja: tCWL = CL, Try: 9-16)

Third Timings:
  • tREFI: Raise as much as possible. JEDEC default: 7.8*XXXX/2 for DDR4-XXXX. (Raja: 11400-16667, Try: default, 2*default, or max it out)
  • tCKE: JEDEC sets this to 5-7. (Raja: 6-7, Try: Auto or 6-7)
For all the remaining third timings, I just start with Raja's values and adjust from there. Remember that tWTR_L/tWTR_S are controlled by tWRRD_sg/tWRRD_dg. Raja's values (and ranges to try in parenthesis):
  • tRDRD_sg: 6 (6-7)
  • tRDRD_dg: 4 (4)
  • tRDRD_dr: 6 (5-6)
  • tRDRD_dd: 6 (5-6)
  • tRDWR_sg: 15 (12-16)
  • tRDWR_dg: 15 (12-16)
  • tRDWR_dr: 16 (12-16)
  • tRDWR_dd: 16 (12-16)
  • tWRRD_sg: 35 (<35) (drives tWTR_L)
  • tWRRD_dg: 29-35 (<35) (drives tWTR_S)
  • tWRRD_dr: 8 (5-8)
  • tWRRD_dd: 8 (5-8)
  • tWRWR_sg: 6 (6-7)
  • tWRWR_dg: 4 (4)
  • tWRWR_dr: 8 (5-8)
  • tWRWR_dd: 8 (5-8)

Misc. Timings:
  • tWRPRE: 4 + tWR + tCWL. Min: 23, Max: 96. (Source) (Raja: 31)
  • tRC: tRAS + tRP. (only on some UEFIs, e.g. Gigabyte)

General:
Another trick is to see what the default/JEDEC timings are for DDR4-2133/DDR4-2400/DDR4-2666/etc. by setting everything to Auto (except frequency) and taking some notes. Many of the values end up being the same as the above and it gives insight to what can be adjusted further.

RTLs/IOLs:
RTLs/IOLs should align on their own, if not it's a training issue. If VDIMM/VCCIO/VCCSA adjustments don't help, you can also try the following, in order, one at a time:
  1. Manually set IOL Offsets, then save and reboot and inspect RTLs/IOLs
  2. Manually set IOLs, then save and reboot and inspect RTLs
  3. Manually set RTLs, and hope the system still boots
Remember, if you change memory frequency, CL, or CR, the RTLs change so you'd have to start these steps over from Auto.


Links:

Recommended Software:Other Software:Specifications:Guides:
edit: formatting and more details.

Last edited by sdch; 05-03-2019 at 06:31 PM.
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