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post #4131 of (permalink) Old 03-17-2019, 02:11 AM - Thread Starter
1usmus
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It is time to tell you about the features that will appear in Ryzen 3000


Spoiler!


Translation into simple language. We have:

1) New memory controller with partial error correction for nonECC memory
2) Desktop processor with two (2 CCD) chiplets on board, 32 threads maximum
3) New MBIST (Memory built-in self-test)
4) Core watchdog - is a fail/safe function used to reset a system in case the microprocessor gets lost due to address or data errors
5) XFR - at the moment I do not see anything special about it, the algorithm and limits have been updated. Scalar Controll come back with new processors.
6) Updated core control has a symmetric configuration of the active cores . In 2CCD configurations, each chiplet has its own RAM channel in order to minimize latency to memory access. 1 channel on 8 cores will be a bottleneck if you use the system in the default state.

UPD: point number 6 is questionable, perhaps there will be a special long-range interface for connecting a chiplet with IO

This is not all information which I will gladden you in the near future

Stand#1 Ryzen Threadripper 2990WX + Liqtech 240 * MSI MEG X399 CREATION * G.Skill [email protected] * Sapphire Vega 64 NITRO+ * Corsair HX750i * Samsung 960 PRO * Benq BL3201PT
Stand#2 Ryzen 2700X + NZXT Kraken x62 * MSI X470 Gaming M7 AC * G.Skill [email protected]3666CL14 * MSI GTX 1080 Ti GAMING X * Corsair HX750i * Samsung 970 PRO
DRAM Calculator for Ryzen™ 1.5.1 by me + TM 5 0.12 1usmus config v3 (memory test)
How to update BIOS correctly + Unlocked AMD_CBS for Ryzen motherboard

Last edited by 1usmus; 03-18-2019 at 12:30 AM.
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