Overclock.net - An Overclocking Community - View Single Post - [TPU] AMD Readies Three HEDT Chipsets: TRX40, TRX80, and WRX80
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post #9 of (permalink) Old 08-30-2019, 10:54 AM
Hey I get one of these!
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Quote: Originally Posted by EniGma1987 View Post
Given the package size and inherent cost of it along with the larger IO die, I would not expect any CPU under 16 cores for the new threadrippers. I would bet the TRX40 platform will have 16, 24, 32 count processors available, while the TRX80 would support the same as well as 40, 48 56, and 64 count processors (or possibly removing the 40 and 56 count models to cut down on SKUs). Going in groups of 8 since each die is 8 cores, and all defective dies with less functional cores are most likely used for Ryzen processors.
I would also expect barebones base price MBs for this to start around $300-350, given the huge socket cost, the extra memory traces needed, and the extra routing of PCIE traces for additional lanes. Typical middle of the road boards will probably be $500-600 given the prices we are seeing for the 4.0 compatible boards already.
Just so you are aware, not all Epyc 2 chips have all eight dies on them, or at least not all eight active.


256MB L3 is 8 die, 192MB is 6 die, 128MB is 4 die, and 64MB is 2 die. You'll also notice that EPYC 2 is available all the way down to 8 cores, and that they have several different configurations for the same core counts, like the $450 1P 8c/16t/64MB vs the $575 2P 8c/16t/128MB.

Either way they can still only operate at a minimum of a core disabled per CCX, NOT per CCD. In a 8-die chip they can only operate in 16/32/48/64, so a 40 or 56-core chip would not be possible. Same with the 6-die chips running in 12/24/48.


I dunno if I want a 2die or 4 die version of TR3's 16/32t chip.

On the one hand, 4 die (like the 7302P) is much less thermal density, more cache, and possibly better bined cores. On the other hand, more cores enabled per CCX (like the 7282) would be better for latency if all else is equal and lower power over all.

Clearly AMD believes that more dies and cache is better as they do charge more for them, but my desktop workload doesn't overlap much with my server workloads. Hmm...

Quote: Originally Posted by Particle View Post
This isn't an argument about anything you've said, but just for clarity: The sockets are SP3 (server) and TR4 (HEDT).

To clarify my post; TR3 = Threadripper 3000 series.

AMD did not make this easy on us. Ryzen vs Zen, TR4 for the TR socket, "Ryzen 3" vs Ryzen 3/5/7. Confusion everywhere.

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