Originally Posted by guttheslayer
Vega 20 is actually a 360mm^2 chip. Because its size is smaller than the original 484mm ^2, assuming they managed to maintain the same yield, you can effectively extract 36% more die per wafer, offset by the 70% increase in cost per wafer means each V20 die cost 25% more than each Vega 64 die.
GPU chip +25% in cost
Memory +100% in cost (2 stack -> 4 stack HBM)
Design +240% in cost.
Vega 20 is really going to be expensive. I would say a gaming version could easily exceed $1000 given Vega 64 pricing.
But the good news is wccftech maths is completely wrong. At 2.8X more density from 14nm -> 7nm transition. Vega 20 actually pack 2.08X more transistors. This coupled with margin of error from pixel estimation, could easily mean Vega 20 actually pack 128 CUs or 8096 Streams processors.
In that case, having a boost speed of 1.9 GHz means the card could easily exceed 30 TFLOP of SP compute.
This is pure wccftech clickbait and the source is too.
The thing that AMD has given us so far for performance for vega 7nm is 2x performance per watt increase or 1.35x increase in performance. Not both according to wizzard who asked AMD. As a result, the later is likely the max and with some overclocking.
I would say the actual performance of vega 7nm is somewhere around 15 tflops to 16 tflops at stock settings considering real vega performance is around 1.5ghz or 12tflops when running at stock.
What wccftech forgets is that to get higher frequency, you need to add to the pipeline to accommodate the extra frequency. This is why the gtx 1080 has less cores than the gtx 980 ti but slightly more transistors even those the later has a 384bit memory controller.
They frequency jump is not free with the performance node increase and the pipeline has to be extended which enlarges each core and offsets some of the frequency jump. In addition, this is a professional card. What this means is large memory caches which don't shrink well with the process. Add in the double precision and potentially tensor cores, the 360mm2 die size and we are likely to see a modest increase in core count if any at all. This is very early 7nm on a complex node that was meant for low power applications like cell phone SOC. As a result, I suspect AMD had to be conservative with the design for now meaning the transistor density is not maxed out.