Has nothing to do with the space required by just the microcodes (which are just 4KB in size), but the fact that supporting multiple designs inflates the bios size significantly.
Currently the AM4 boards need to support four, at least partially different designs (15h Bristol Ridge, 17h Zeppelin B1, 17h Raven Ridge and 17h Zeppelin B2). Each of them require different SMU, PSP and PMU firmwares along with the different
AGESA modules. The firmwares themselves are typically several hundreds of KBs alone, per design.
Generally there is a lot of room for optimizations (vendor code wise), so I cannot quite see the flash size becoming a real issue any time soon.
Also at AGESA compile time, the ODMs can exclude support for certain (obsolete) designs (e.g. Bristol Ridge) not worth of supporting to reduce the final image size.