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post #4121 of 4135 (permalink) Old 06-30-2019, 08:57 PM
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I'm not sure on the STRIX boards but the main advantage of the Hero over the STRIX is the use of a heatpipe and 10K hour FP caps as well as debug LED: layout is more or less the same. Prime -A and STRIX are more or less the same other than audio , the powerstages are upped from 45A Onsemi ones to 50A Vishay ones.


I don't know that much about the RGB syncing stuff since I turn off all RGB features on my boards and peripherals but I can tell you that buying a STRIX GPU probably isn't worth the price premium over the MSI GPU. There's probably better ways to get things to be the same color though.

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post #4122 of 4135 (permalink) Old 07-01-2019, 12:06 AM
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Quote: Originally Posted by AlphaC View Post
Wouldn't it be better to test with MCE-like clocks? I don't think anyone sane buying a $400 Gene is going to be running 4.7GHz @ 1.2V. Maybe 5.0-5.1GHz with AVX offset.


Also is that a typo? Should be SDS1104X-E, no?



Good to see some results though
Quote: Originally Posted by Falkentyne View Post
Sweet Mother of God.
That Siglent looks so much better than the Rigol and that scope TIN (on the gamersnexus video with Steve) had with the GPU loadline thing!
Thank you Elmor!

With you and buildzoid's video, this is scope heaven !
*edit*
Just read your post again.
Those spikes and dips are just sitting idle in the BIOS?

Oh dear... 80mv dip at LLC8 at idle... :/
The dip with prime95 FMA3 running would probably by guessing be close to 150mv (!!)
That's scary....
It's possible to test with tougher settings, but the point was to visualize how the transients look in practice and what impact different load-line levels has. With higher currents (frequency + voltage), the signal will look the same but have larger undershoot/overshoot. The load is periodical at 60 Hz due to CPU interrupts when running tasks like updating the GUI. It's difficult to get a good capture when running something like Prime95, the signal is too noisy and irregular. It's also not an instantaneous load as it takes time to prepare data sets, initialize threads etc.

In this test case, the load is only for ~150 µs. At Level 1 the load-line is set to 2.08 mohm, (1.200-1.060)/0.00208 = 67A load step.

I did a short re-test at 5.2 GHz with 1.500V set point, in this case the load step is (1.500-1.290)/0.00208 = 101A. I had to change the vertical scale to 50 mV/div for these measurements so the amplitude is scaled down by 2.5 times.







edit: Yes, SDS1104X-E is correct.

Last edited by elmor; 07-01-2019 at 12:12 AM.
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post #4123 of 4135 (permalink) Old 07-01-2019, 12:38 AM
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Quote: Originally Posted by elmor View Post
It's possible to test with tougher settings, but the point was to visualize how the transients look in practice and what impact different load-line levels has. With higher currents (frequency + voltage), the signal will look the same but have larger undershoot/overshoot. The load is periodical at 60 Hz due to CPU interrupts when running tasks like updating the GUI. It's difficult to get a good capture when running something like Prime95, the signal is too noisy and irregular. It's also not an instantaneous load as it takes time to prepare data sets, initialize threads etc.

In this test case, the load is only for ~150 µs. At Level 1 the load-line is set to 2.08 mohm, (1.200-1.060)/0.00208 = 67A load step.

I did a short re-test at 5.2 GHz with 1.500V set point, in this case the load step is (1.500-1.290)/0.00208 = 101A. I had to change the vertical scale to 50 mV/div for these measurements so the amplitude is scaled down by 2.5 times.







edit: Yes, SDS1104X-E is correct.
Thank you very much for your hard work, Elmor.

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post #4124 of 4135 (permalink) Old 07-01-2019, 03:46 AM
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Quote: Originally Posted by elmor View Post
It's possible to test with tougher settings, but the point was to visualize how the transients look in practice and what impact different load-line levels has. With higher currents (frequency + voltage), the signal will look the same but have larger undershoot/overshoot. The load is periodical at 60 Hz due to CPU interrupts when running tasks like updating the GUI. It's difficult to get a good capture when running something like Prime95, the signal is too noisy and irregular. It's also not an instantaneous load as it takes time to prepare data sets, initialize threads etc.

In this test case, the load is only for ~150 µs. At Level 1 the load-line is set to 2.08 mohm, (1.200-1.060)/0.00208 = 67A load step.

I did a short re-test at 5.2 GHz with 1.500V set point, in this case the load step is (1.500-1.290)/0.00208 = 101A. I had to change the vertical scale to 50 mV/div for these measurements so the amplitude is scaled down by 2.5 times.
Great stuff elmor! What's the horizontal axis scale? 1 Microsecond per grid box?

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post #4125 of 4135 (permalink) Old 07-01-2019, 05:46 AM
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Quote: Originally Posted by Luck100 View Post
Great stuff elmor! What's the horizontal axis scale? 1 Microsecond per grid box?
Each division (grid box) is 20us horizontally and 50mV vertically (20mV in the first set).
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post #4126 of 4135 (permalink) Old 07-01-2019, 11:41 PM
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Well, the MSI Z390 Ace VRM seems plenty for 24/7 clocks at least.

I'm running a 9900K not delidded (yet) at 5.025Ghz core, 4.7Ghz cache, 1.315v with stock SA, IO and 1.36v VDIMM. LLC Level 5, didn't touch the response times of the DigitALL Power settings yet.

In Prime95 with AVX and FMA3 enabled on small FFT the CPU sits in the high 80's with a power draw of about 235-240w and VRM (MOS sensor in Hwmonitor) gets up to about 90c after 30 minutes and stays there. This is with totally zero airflow in the VRM sinks as the rad and fans covers them partially.

Gaming runs them around 60-65c MOS temp and high 60's for the CPU as well. (~150w load)

So far, no thermal issues.

EDIT: 5.025 is hard to get 100% stable so far as it seems to need a tad more for 100% stability. It BSOD's with a PAGE_FAULT after 10-15 min of Prime AVX/FMA3 and is also prime to giving WHEA errors in games. They will both go away at 1.33v but CPU gets up to 93c and that also makes it unstable due to heat.

I'm settling in on 4.925Ghz @ 1.248v, 4.625Ghz cache, 3000Mhz RAM @ 12-15-15-35-400-1T with 24960 tREFI 1.36v and 0.960 SA 1.050 IO. Temps stay in the low 80's then.

MOSFETS peak at 80c and stabilize at 78-79c according to the boards sensors. This is still with no airflow over them at all. If i point a fan at them they drop to high 60's.
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post #4127 of 4135 (permalink) Old 07-16-2019, 09:23 PM
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Quote: Originally Posted by WannaBeOCer View Post
That was completely at stock without enabling XMP. I believe the CPU was running at 3.6Ghz on all eight cores at stock with MCE disabled. Here's mine set to 5.1Ghz but the CPU runs at 5Ghz cause of some sort of AVX offset that I can't modify.
This is with the Studio Nvidia drivers that do better with Cinebench.




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post #4128 of 4135 (permalink) Old 07-20-2019, 01:29 PM
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I have a 9900K and two motherboards, a Z370 with 4 vcore phase doublers with no current balancing and a Z390 with 5 vcore phase doublers with current balancing.

I would like to know how much sustained current draw each motherboard is capable of, assuming that the VRM heatsinks are capable of doing their job.

The problem is I have no idea how efficient either board's VRM is.

1. EVGA Z370 CLASSIFIED K

VCC Controller - Infineon IR35201 (4+2)
VCC Doubler - 4 x Infineon IR3599 (interleaving only, no current balancing)
VCC DrMOS - 8 x Infineon TDA88240 35A
VCC Inductor - Unknown

VCCGT Controller - Infineon IR35201 (4+2)
VCCGT DrMOS - 2 x Infineon TDA88240 35A
VCCGT Inductor - Unknown

VCCIO & VCCSA Controller - Infineon IR35204 (1 x VCSSA power phase & 1 x VCCIO power phase)
VCCIO & VCCSA DrMOS - 2 x Infineon TDA88240 35A
VCCIO & VCCSA Inductor - Unknown

VDDR Controller - uPI SEMI uP1537P single-phase PWM controller with integrated driver
VDDR MOSFET - 1 x ONSemi NTMSF4C024N Lowside MOSFET (Single N−Channel Power MOSFET 30 V, 76 A, 4.00mΩ)
VDDR MOSFET - 1 x ONSemi NTMFS4C029N Highside MOSFET (Single N−Channel Power MOSFET 30 V, 46 A, 5.88mΩ)
VDDR Inductor - Unknown

2. GIGABYTE Z390 UD

VCC Controller - Intersil ISL69138 (5+2)
VCC Doubler - 5 x Intersil ISL6617A (with current balancing)
VCC Driver - 10 x Intersil ISL6625A
VCC Highside MOSFET - 10 x ONSemi 4C10N 46A
VCC Lowside MOSFET - 10 x ONSemi 4C06N 69A
VCC Inductor - 10 x Vishay PowerPak ~60A

VCCGT Controller - Intersil ISL69138 (5+2)
VCCGT Driver - 2 x Intersil ISL6596
VCCGT Highside MOSFET - 2 x ONSemi 4C10N (small package)
VCCGT Lowside MOSFET - 2 x ONSemi 4C06N (small package)
VCCGT Inductor - 2 x Vishay PowerPak ~60A

VCCIO & VCCSA Controller - 2 x Richtek RT8120D
VCCIO & VCCSA Lowside MOSFET - 2 x ONSemi 4C06N
VCCIO & VCCSA Highside MOSFET 2 x NIKOSEM PK6H6BA N-Channel Enhancement Mode MOSFET 30V 46A
VCCIO & VCCSA Inductor - Unknown

VDDR Controller - Richtek RT8120D
VDDR Lowside MOSFET - 3 x ONSemi 4C06N 30V 69A
VDDR Highside MOSFET 1 x NIKOSEM PK6H6BA N-Channel Enhancement Mode MOSFET 30V 46A
VDDR Inductor - 2 x Vishay Powerpak R50

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post #4129 of 4135 (permalink) Old 07-20-2019, 01:53 PM
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The EVGA Z370 one is markedly better. TDA88240 35A is a top tier powerstage albeit in 35A rating (some of the best are the TDA21472 70A). 4C10N+4C06N are run of the mill powerpaks (discrete high + low mosfet)

Powerstages tend to be around 90-92% efficient at the 35A tier, while that 4C10N+4C06N solution will be around 88-89% at best (and that doesn't count the driver losses).

Current balance is achieved at the PWM side for the EVGA board via the IR35201 PWM.


To be fair though, the Z390 UD is a budget level board, the Z370 Classified is a top tier from EVGA (supposed to be on par with at least upper midrange from other vendors such as Z370 Hero / Taichi / Aorus Pro).

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Last edited by AlphaC; 07-20-2019 at 02:09 PM.
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post #4130 of 4135 (permalink) Old 07-20-2019, 02:19 PM
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Thank you for your fast and detailed reply and the notes on efficiency, I should have checked the data sheet for the IR35201 regarding current balancing.

Do you have any idea how much sustained current each board could pull from the PSU?

Cheers.

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