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post #3231 of 4279 (permalink) Old 10-17-2016, 11:56 PM - Thread Starter
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@Energylite

I can confirm MAX ASIC Temp ie Target GPU Temperature in OverDrive page will apply on modification of 295x2 ROM smile.gif .

I can confirm that on several different ROMs I sent Enterprise it applied to his system smile.gif .

Try any of the below to resolve your issue:

i) Restore driver to factory defaults via "Preferences" on main Crimson driver control panel.

ii) Uninstall driver from windows control panel, then run DDU, then reinstall driver.
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post #3232 of 4279 (permalink) Old 10-18-2016, 01:01 AM
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Warning: Spoiler! (Click to show)
Hi I have some questions about this VoltageObjectInfo table guide:
I see that hawaii, fiji, polaris, and tonga (I have a 380) gpus have a table in VOI table like this:

01 07 0C 00 XX 00 00 00 00 00 00 00 <--01 VDDC + 07 SVID2 voltage + usSize + usLoadLine_PSI + ucSVDGpioId +ucSVDGpioId + ulReserved

The XX values for the respective gpus are 0A, 06, 06, 0E.

Tonga have a second table like this: 05 07 0C 00 0E 00 00 00 00 00 00 00 <--05 VDDGXF + 07 SVID2 voltage + usSize + usLoadLine_PSI + ucSVDGpioId +ucSVDGpioId + ulReserved

The table structure is: Warning: Spoiler! (Click to show)
ATOM_VOLTAGE_OBJECT_HEADER_V3 sHeader = new ATOM_VOLTAGE_OBJECT_HEADER_V3(); // voltage mode = VOLTAGE_OBJ_SVID2
// 14:7 PSI0_VID
// 6 PSI0_EN
// 5 PSI1
// 4:2 load line slope trim.
// 1:0 offset trim,
ShortStructure usLoadLine_PSI = new ShortStructure();
// GPU GPIO pin Id to SVID2 regulator VRHot pin. possible value 0~31. 0 means GPIO0, 31 means GPIO31
ByteStructure ucSVDGpioId = new ByteStructure(); //0~31 indicate GPIO0~31
ByteStructure ucSVCGpioId = new ByteStructure(); //0~31 indicate GPIO0~31
LongStructure ulReserved = new LongStructure();
@Override
public List getSubStructureList() {
System.out.println("ATOM_SVID2_VOLTAGE_OBJECT_V3 getSubStructureList()");
List list = new ArrayList();
list.add(sHeader);
list.add(usLoadLine_PSI);
list.add(ucSVDGpioId);
list.add(ucSVCGpioId);
list.add(ulReserved);
return list;
}
@Override
public void fillSubListDescriptions() {
sHeader.setName("ATOM_VOLTAGE_OBJECT_HEADER_V3");
sHeader.setDescription("voltage mode = VOLTAGE_OBJ_SVID2");
usLoadLine_PSI.setName("LoadLine_PSI");
ucSVDGpioId.setName("SVDGpioId");
ucSVDGpioId.setDescription("GPU GPIO pin Id to SVID2 regulator VRHot pin. possible value 0~31. 0 means GPIO0, 31 means GPIO31");

ucSVCGpioId.setName("SVCGpioId");
ucSVCGpioId.setDescription("GPU GPIO pin Id to SVID2 regulator VRHot pin. possible value 0~31. 0 means GPIO0, 31 means GPIO31");

ulReserved.setName("Reserved");
super.fillSubListDescriptions();

You can see at the table structure that the values of usLoadLine_PSI (XX value) are // 14:7 PSI0_VID, // 6 PSI0_EN, // 5 PSI1, // 4:2 load line slope trim, // 1:0 offset trim.

PSI acording according to my NCP81022 voltage controller: https://media.digikey.com/pdf/Data%20Sheets/ON%20Semiconductor%20PDFs/NCP81022.pdf is Power State Indicator.

But I don't know what that usLoadLine_PSI (XX value) is doning. Does somebody knows what is that value?.

Maybe is 06 PSI0_EN or 0A PSI0_VID enabling some thing related to LoadLine control vis I2C?

And what is VDDGXF voltage?

Edited:

Please prevent me from doing a madness changing these values biggrin.gif.

About the VDDGXF voltage I only know that acording to The Stilt: https://www.overclock.net/t/1606214/personal-comparison-of-stock-480-vs-max-oc-480/10#post_25374786 it is a secondary power planes of the card: "the secondary power planes of the card (VDDCI, VDDGFX)".
And that acording to this link: http://www.hardware.fr/news/14085/amd-leve-voile-carrizo-cote-technique.html provided by Ansau is a "dedicated supply voltage for the gpu", on carrizo.

Nope I was wrong, sorry biggrin.gif .

The // 14:7 PSI0_VID, // 6 PSI0_EN, // 5 PSI1, // 4:2 load line slope trim, // 1:0 offset trim, values are the bits for the two bytes of the usLoadLine_PSI, so acording to the datasheets:

For Tonga 00 0E is:

0000 0000 0000 1110

offset trim 10= 2 Use initial offset
load line slope trim 011=3 LL slope 38.7%

For hawwaii 00 0A is:

0000 0000 0000 1010

offset trim 10= 2 Use initial offset
load line slope trim 010=2 LL slope -20%

For fiji and Polaris 00 06 is:

0000 0000 0000 0110

offset trim 10= 2 Use initial offset
load line slope trim 001=1 LL slopr -40%

What do you thing about this, is it blocking the load line slope and the offset to these values?
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post #3233 of 4279 (permalink) Old 10-18-2016, 09:40 AM - Thread Starter
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post #3234 of 4279 (permalink) Old 10-18-2016, 10:35 AM
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Originally Posted by gupsterg View Post

I'm lost mate redface.gif , so no idea redface.gif .

OK thanks thumb.gif.

For exaple this is the value for fiji VOI table:

34 01 03 01 01 03 82 00 08 96 60 00 00 00 00 00
14 00 29 00 29 00 26 00 2A 00 A3 00 2B 00 31 00
58 00 02 00 24 00 1C 00 61 00 03 00 62 00 7D 00
4D 00 60 00 15 00 FF 00 2D 00 A1 00 2E 00 1F 00
2F 00 31 00 30 00 38 00 59 00 02 00 63 00 61 00
64 00 68 00 4E 00 60 00 16 00 20 00 33 00 74 00
34 00 6F 00 31 00 07 00 32 00 FC 00 E4 00 00 00
3D 00 55 00 E4 00 01 00 6D 00 FF 00 8D 00 04 00
8E 00 FC 00 FF 00 01 07 0C 00 06 00 00 00 00 00
00 00 04 03 22 00 15 96 A2 00 00 00 00 00 D4 00
95 00 D5 00 95 00 D6 00 95 00 D7 00 95 00 D3 00
40 00 FF 00 02 07 0C 00 0E 00 00 00 00 00 00 00
07 03 22 00 15 96 A4 00 00 00 00 00 D4 00 8B 00
D5 00 8B 00 D6 00 8B 00 D7 00 8B 00 D3 00 40 00
FF 00 06 03 16 00 14 96 62 00 01 00 00 00 00 00
01 00 01 00 6C 00 FF 00 08 00 3C 00 00 08 00 00
07 00 00 00 00 00 00 00 00 00 01 00 00 00 01 00
02 00 00 00 02 00 03 00 00 00 03 00 04 00 00 00
04 00 05 00 00 00 05 00 06 00 00 00 06 00 07 00
00 00 07 00

So 00 06 is:

0000 0000 0000 0110

Names for these bits are // 14:7 PSI0_VID, // 6 PSI0_EN, // 5 PSI1, // 4:2 load line slope trim, // 1:0 offset trim

Acording to ir3535b datasheets pg 20 in LoadLine trimp you can see that values for it are : desabled -40 -20 0 +20 +40 +60 +80 so maybe they are 0 1 2 3 4 5 6 7.
And Offset Trim values are: unchanged, disabled + 25 -25, and acordig to pg 39 in 81022 datasheets in Vout Trim, bit values are: 2, 0, 3, 1.

I know, if I'm not wrong, that on hawaii, fiji and polaris Load Line Slope only can be enabled/disabled. On tonga can't be enabled/disabled or changed.

So perhaps these values are blocking Load Line Slope or offset (Vout Trim).

And I don't want to test it without experts opinions thumb.gif
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post #3235 of 4279 (permalink) Old 10-18-2016, 10:58 AM
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Hey again so Im here to feedback what I had after those first flashs

As @gupsterg said to me before i added +10 on TDC lim and increase the temp asiic ( both bios for master/slave are at the page 323) and everything was going great till the computer crashed in game
when i restarted the computer, I've a message from the crimson software which said "the radeon Wattman profil was reset to defaut values because of a System problem" (I don't remember the exact words but it the same message, I think rolleyes.gif)

So i tried with an other bios with again +10 on TDC ( so at all +20) and I got the same problem
Finally i've setup the defaut values on TDC and max asiic temp increased and i had the same problem as before when the computer shut down.

Positiv point ! biggrin.gif
I've saved a pict when i was testing/playing at GTA with the first bios test with +10 at TDC and this is what i have


Edit: I don't know what was the problem with Wattman confused.gif

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post #3236 of 4279 (permalink) Old 10-18-2016, 11:08 AM - Thread Starter
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AFAIK in the example VOI you have posted IR3567B programming is the red outlined section, the 82h (blue boxed hex) denotes where the i2c programming ends (or starts which ever way you look at wink.gif ). You will find FCh (blue box) is at 0x82 if you paste the VOI in an hex editor. The FF just outside of red border is marker for end, I basically use FF 00 01 07 in a way.

I don't know how to set what is shown on page 20 of IR3565B datasheet, but deeper-blue gained LLSlope registers (from a source, not The Stilt but another experienced source wink.gif ), they are registers 24 25 and follow what is on page 36 of PDF AFAIK, you'll see them in his VRM-Tool. AFAIK members are changing LLSlope, I'm thinking we perhaps should ask there if members have changed it, I have not played with reg 24 & 25 as has no need for it.
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post #3237 of 4279 (permalink) Old 10-18-2016, 11:45 AM
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Originally Posted by gupsterg View Post

@mynm





AFAIK in the example VOI you have posted IR3567B programming is the red outlined section, the 82h (blue boxed hex) denotes where the i2c programming ends (or starts which ever way you look at wink.gif ). You will find FCh (blue box) is at 0x82 if you paste the VOI in an hex editor. The FF just outside of red border is marker for end, I basically use FF 00 01 07 in a way.

I don't know how to set what is shown on page 20 of IR3565B datasheet, but deeper-blue gained LLSlope registers (from a source, not The Stilt but another experienced source wink.gif ), they are registers 24 25 and follow what is on page 36 of PDF AFAIK, you'll see them in his VRM-Tool. AFAIK members are changing LLSlope, I'm thinking we perhaps should ask there if members have changed it, I have not played with reg 24 & 25 as has no need for it.

Ok thanks thumb.gif. In AtomBiosReader https://github.com/Hedzin/AtomBiosReader the sections are diferent, I don't know. Ok, so I was wrong and LLSlope can be changed on IR3565B, I don't see that at WattTool so I was thinking that IR3565B could't change it.
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post #3238 of 4279 (permalink) Old 10-18-2016, 12:31 PM - Thread Starter
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I will ask deeper-blue if LLSlope is confirmed as changable, I never asked yet, we have spoke in the past on HWBot forum, I have also given him editable access to registers mapping for IR356xB on googledocs.

I have tried to apply info from linux driver, this is as far as I got.
Warning: Spoiler! (Click to show)
Code:
typedef struct  _ATOM_VOLTAGE_OBJECT_INFO_V3_1
{
  ATOM_COMMON_TABLE_HEADER   sHeader;
  ATOM_VOLTAGE_OBJECT_V3     asVoltageObj[3];   //Info for Voltage control
}ATOM_VOLTAGE_OBJECT_INFO_V3_1;

typedef struct _ATOM_COMMON_TABLE_HEADER
{
  USHORT usStructureSize;
  UCHAR  ucTableFormatRevision;   //Change it when the Parser is not backward compatible
  UCHAR  ucTableContentRevision;  //Change it only when the table needs to change but the firmware
                                  //Image can't be updated, while Driver needs to carry the new table!
}ATOM_COMMON_TABLE_HEADER;

typedef union _ATOM_VOLTAGE_OBJECT_V3{
//   ATOM_GPIO_VOLTAGE_OBJECT_V3 asGpioVoltageObj;
  ATOM_I2C_VOLTAGE_OBJECT_V3 asI2cVoltageObj;
//   ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 asLeakageObj;
//   ATOM_SVID2_VOLTAGE_OBJECT_V3 asSVID2Obj;
}ATOM_VOLTAGE_OBJECT_V3;

typedef struct _ATOM_VOLTAGE_OBJECT_HEADER_V3{
   UCHAR    ucVoltageType;                            //Indicate Voltage Source: VDDC, MVDDC, MVDDQ or MVDDCI
   UCHAR    ucVoltageMode;                            //Indicate voltage control mode: Init/Set/Leakage/Set phase
   USHORT   usSize;                                   //Size of Object
}ATOM_VOLTAGE_OBJECT_HEADER_V3;

//ucVoltageType
#define VOLTAGE_TYPE_VDDC                    1
#define VOLTAGE_TYPE_MVDDC                   2
#define VOLTAGE_TYPE_MVDDQ                   3
#define VOLTAGE_TYPE_VDDCI                   4
#define VOLTAGE_TYPE_VDDGFX                  5
#define VOLTAGE_TYPE_PCC                     6

#define VOLTAGE_TYPE_GENERIC_I2C_1           0x11
#define VOLTAGE_TYPE_GENERIC_I2C_2           0x12
#define VOLTAGE_TYPE_GENERIC_I2C_3           0x13
#define VOLTAGE_TYPE_GENERIC_I2C_4           0x14
#define VOLTAGE_TYPE_GENERIC_I2C_5           0x15
#define VOLTAGE_TYPE_GENERIC_I2C_6           0x16
#define VOLTAGE_TYPE_GENERIC_I2C_7           0x17
#define VOLTAGE_TYPE_GENERIC_I2C_8           0x18
#define VOLTAGE_TYPE_GENERIC_I2C_9           0x19
#define VOLTAGE_TYPE_GENERIC_I2C_10          0x1A


// ATOM_VOLTAGE_OBJECT_HEADER_V3.ucVoltageMode
#define VOLTAGE_OBJ_GPIO_LUT                 0        //VOLTAGE and GPIO Lookup table ->ATOM_GPIO_VOLTAGE_OBJECT_V3
#define VOLTAGE_OBJ_VR_I2C_INIT_SEQ          3        //VOLTAGE REGULATOR INIT sequece through I2C -> ATOM_I2C_VOLTAGE_OBJECT_V3
#define VOLTAGE_OBJ_PHASE_LUT                4        //Set Vregulator Phase lookup table ->ATOM_GPIO_VOLTAGE_OBJECT_V3
#define VOLTAGE_OBJ_SVID2                    7        //Indicate voltage control by SVID2 ->ATOM_SVID2_VOLTAGE_OBJECT_V3
#define VOLTAGE_OBJ_EVV                      8
#define VOLTAGE_OBJ_PWRBOOST_LEAKAGE_LUT     0x10     //Powerboost Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3
#define VOLTAGE_OBJ_HIGH_STATE_LEAKAGE_LUT   0x11     //High voltage state Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3
#define VOLTAGE_OBJ_HIGH1_STATE_LEAKAGE_LUT  0x12     //High1 voltage state Voltage and LeakageId lookup table->ATOM_LEAKAGE_VOLTAGE_OBJECT_V3

typedef struct  _VOLTAGE_LUT_ENTRY
{
    USHORT     usVoltageCode;               // The Voltage ID, either GPIO or I2C code
    USHORT     usVoltageValue;              // The corresponding Voltage Value, in mV
}VOLTAGE_LUT_ENTRY;

typedef struct  _ATOM_I2C_VOLTAGE_OBJECT_V3
{
   ATOM_VOLTAGE_OBJECT_HEADER_V3 sHeader;    // voltage mode = VOLTAGE_OBJ_VR_I2C_INIT_SEQ
   UCHAR  ucVoltageRegulatorId;              //Indicate Voltage Regulator Id
   UCHAR  ucVoltageControlI2cLine;
   UCHAR  ucVoltageControlAddress;
   UCHAR  ucVoltageControlOffset;
   UCHAR  ucVoltageControlFlag;              // Bit0: 0 - One byte data; 1 - Two byte data
   UCHAR  ulReserved[3];
   VOLTAGE_LUT_ENTRY asVolI2cLut[1];         // end with 0xff
}ATOM_I2C_VOLTAGE_OBJECT_V3;


Example VoltageObjectInfo table:-

Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F

00000000  78 00 03 01 01 03 16 00 08 96 60 00 00 00 00 00  x........–`.....
00000010  32 00 BC 00 26 00 60 00 FF 00 01 07 0C 00 0A 00  2.¼.&.`.ÿ.......
00000020  00 00 00 00 00 00 04 07 0C 00 0E 00 00 00 00 00  ................
00000030  00 00 02 00 24 00 00 04 00 00 00 80 10 00 00 00  ....$......€....
00000040  00 00 1E 05 00 00 10 00 46 05 00 80 00 00 DC 05  ........F..€..Ü.
00000050  00 80 10 00 0E 06 06 03 22 00 0C 96 A6 00 00 00  .€......"..–¦...
00000060  00 00 D4 00 A2 00 D5 00 A2 00 D6 00 A2 00 D7 00  ..Ô.¢.Õ.¢.Ö.¢.×.
00000070  A2 00 D3 00 40 00 FF 00                          ¢.Ó[email protected]ÿ.

USHORT  usStructureSize         :       78 00
UCHAR   ucTableFormatRevision   :       03
UCHAR   ucTableContentRevision  :       01
UCHAR   ucVoltageType           :       01      (VDDC)
UCHAR   ucVoltageMode           :       03      (VOLTAGE_OBJ_VR_I2C_INIT_SEQ)
USHORT  usSize                  :       16 00   (size of object from ucVoltageType & end with "FF 00", also use as a pointer to the last I2C value)
UCHAR   ucVoltageRegulatorId    :       08      //Indicate Voltage Regulator Id
UCHAR   ucVoltageControlI2cLine :       96
UCHAR   ucVoltageControlAddress :       60
UCHAR   ucVoltageControlOffset  :       00
UCHAR   ucVoltageControlFlag    :       00      // Bit0: 0 - One byte data; 1 - Two byte data
UCHAR   ulReserved[3]           :       00 00 00

USHORT  usVoltageCode           :       32 00              // The I2C code                 |
USHORT  usVoltageValue          :       BC 00             // The corresponding I2C value  |--> asVolI2cLut[1];         // end with 0xff

usVoltageCode & usVoltageValue will repeat until 0xff , so at 01 07 0C another section has started??
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post #3239 of 4279 (permalink) Old 10-18-2016, 12:48 PM
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post #3240 of 4279 (permalink) Old 10-18-2016, 01:23 PM - Thread Starter
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NP smile.gif , will report to you if I see any info in relation to discussion smile.gif .

@Energylite

I will look to see what I setup for Enterprise and report back smile.gif . Have you enabled "extend official overclocking limits" in MSI AB? if so to do not use this feature. It copies PowerPlay of whatever ROM was on card when it was enabled and then this copy of PowerPlay in registry will take precedent over ROM PowerPlay (even if you flash new one).
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