Would appreciate help in finding / editing the voltage offset in the RX480 Bios - Page 7 - Overclock.net - An Overclocking Community

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Would appreciate help in finding / editing the voltage offset in the RX480 Bios

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post #61 of 218 (permalink) Old 04-10-2017, 11:40 AM
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Wow, my Xfx's watttool screen looks the same (NA for the sensors), but changing states in bios , and then in wattool changing P1 for memory makes things work, ie. the card undervolts smile.gif
I downloaded the grotoc bios just to find the data you made the screenshot, so i can figure out offsets in other bioses, especially for my tricky xfx smile.gif
Guessing from the position on your pic that is the beginning of the powerplay table right ? Also structure size is 77 bytes so that should be it smile.gif
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post #62 of 218 (permalink) Old 04-10-2017, 12:03 PM
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Quote:
Originally Posted by doktor83 View Post

Wow, my Xfx's watttool screen looks the same (NA for the sensors), but changing states in bios , and then in wattool changing P1 for memory makes things work, ie. the card undervolts smile.gif
I downloaded the grotoc bios just to find the data you made the screenshot, so i can figure out offsets in other bioses, especially for my tricky xfx smile.gif
Guessing from the position on your pic that is the beginning of the powerplay table right ? Also structure size is 77 bytes so that should be it smile.gif

Yes it's in powerplay, but maybe it could be better to change the pointer 0B, or whatever the value you have, to 01 o 00, so it will use the DPM 0 or DPM 1 voltage. My 380 is using a 01 value so it's using DPM 1 voltage.
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post #63 of 218 (permalink) Old 04-10-2017, 12:38 PM
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Just for people to view wink.gif .
Quote:
Originally Posted by hellm View Post

If u don't change this byte from 0F to 0B, memcontroller voltage will be the same as vcore.
Some customs have this value already set, else i wouldn't know about it.

pptable_v1_0.h

usMvdd is what Polaris owners see as 1000mV in WattMan.
Code:
typedef struct _ATOM_Tonga_MCLK_Dependency_Table {
00      UCHAR ucRevId;
02      UCHAR ucNumEntries;                                                                             /* Number of entries. */
        ATOM_Tonga_MCLK_Dependency_Record entries[1];                           /* Dynamically allocate entries. */
} ATOM_Tonga_MCLK_Dependency_Table;

typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
00      UCHAR  ucVddcInd;       /* Vddc voltage */
52 03   USHORT usVddci;
00 00   USHORT usVddgfxOffset;  /* Offset relative to Vddc voltage */
E8 03   USHORT usMvdd;
30 75 00 00     ULONG ulMclk;
00 00   USHORT usReserved;
} ATOM_Tonga_MCLK_Dependency_Record;

        typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
0F      UCHAR  ucVddcInd;       /* Vddc voltage */
B6 03   USHORT usVddci;
00 00   USHORT usVddgfxOffset;  /* Offset relative to Vddc voltage */
E8 03   USHORT usMvdd;
40 0D 03 00     ULONG ulMclk;
00 00   USHORT usReserved;
} ATOM_Tonga_MCLK_Dependency_Record;
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post #64 of 218 (permalink) Old 04-10-2017, 12:41 PM
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Any word on Atom Polaris Bios reader? Would be real interesting to get into hex modding the usVddcOffset... On Tonga, altering usMvdd didn't do much. Though down-volting the Hawaii/ Grenada does wonders... Actually more performance at less clock on less voltage and a cooler card...

BTW I can barely see what I'm typing at 5120x2880 desktop res on RX 480 haha thumb.gif

Dell Precision T7500 : Dual Xeon X5675 @ 3.536Ghz X 24 Threads : 48 Gigabytes : Cinebench R15 : 1505 : AMD R9 390X 8GB @ 1173Mhz 1350mv 57599 Power Limit @ 1250Mhz memory error free on tight timings / since 1500mhz+ had errors galore
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post #65 of 218 (permalink) Old 04-10-2017, 12:57 PM
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Latest AIDA64 when doing Video Debug > ATI GPU Registers :-
Code:
------[ PowerPlay7 BIOS Info ]------

Max GPU Clock      = 2000 MHz
Max Memory Clock   = 500 MHz
PowerControl Limit = 50%
SCLK DPM0 =  300 MHz
SCLK DPM1 =  512 MHz
SCLK DPM2 =  724 MHz
SCLK DPM3 =  892 MHz
SCLK DPM4 =  944 MHz
SCLK DPM5 =  984 MHz
SCLK DPM6 = 1018 MHz
SCLK DPM7 = 1050 MHz
MCLK DPM0 =  500 MHz  (VDDCI: 1.00000 V)
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post #66 of 218 (permalink) Old 04-10-2017, 03:07 PM
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Quote:
Originally Posted by gupsterg View Post

Just for people to view wink.gif .
pptable_v1_0.h

usMvdd is what Polaris owners see as 1000mV in WattMan.
Code:
typedef struct _ATOM_Tonga_MCLK_Dependency_Table {
00      UCHAR ucRevId;
02      UCHAR ucNumEntries;                                                                             /* Number of entries. */
        ATOM_Tonga_MCLK_Dependency_Record entries[1];                           /* Dynamically allocate entries. */
} ATOM_Tonga_MCLK_Dependency_Table;

typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
00      UCHAR  ucVddcInd;       /* Vddc voltage */
52 03   USHORT usVddci;
00 00   USHORT usVddgfxOffset;  /* Offset relative to Vddc voltage */
E8 03   USHORT usMvdd;
30 75 00 00     ULONG ulMclk;
00 00   USHORT usReserved;
} ATOM_Tonga_MCLK_Dependency_Record;

        typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
0F      UCHAR  ucVddcInd;       /* Vddc voltage */
B6 03   USHORT usVddci;
00 00   USHORT usVddgfxOffset;  /* Offset relative to Vddc voltage */
E8 03   USHORT usMvdd;
40 0D 03 00     ULONG ulMclk;
00 00   USHORT usReserved;
} ATOM_Tonga_MCLK_Dependency_Record;

Quote:
Originally Posted by gupsterg View Post

Latest AIDA64 when doing Video Debug > ATI GPU Registers :-
Code:
------[ PowerPlay7 BIOS Info ]------

Max GPU Clock      = 2000 MHz
Max Memory Clock   = 500 MHz
PowerControl Limit = 50%
SCLK DPM0 =  300 MHz
SCLK DPM1 =  512 MHz
SCLK DPM2 =  724 MHz
SCLK DPM3 =  892 MHz
SCLK DPM4 =  944 MHz
SCLK DPM5 =  984 MHz
SCLK DPM6 = 1018 MHz
SCLK DPM7 = 1050 MHz
MCLK DPM0 =  500 MHz  (VDDCI: 1.00000 V)

Yes thanks, that's it, 0F is UCHAR ucVddcInd, is vddc indicator and is 15. So in that case I guess is Red highlight value 7e 04, with 0B, 11, it will be green highlight value b6 03:
Warning: Spoiler! (Click to show)

I don't know if usMvdd is what Polaris owners see as 1000mV in WattMan, but I have tested it and it isn't in Tonga, and I can chage it in the bios like I said. And in AIDA I don't see the same values for the vddci than those I see in HWinfo.

But at least WattTool and bios editor memory voltage aren't the same.
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post #67 of 218 (permalink) Old 04-12-2017, 05:12 PM
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I would like to ask you for help me with adding offset to this bios:
saphire480_4g_elpida_bios_no_offset.zip 109k .zip file
I will be so much gratefull for any hints (I am newbie in hex-editing so I would like to get step-by-step info how to add offset for this case, especially how to add tables, how to calculate it etc )

PS:
I set -100mv offset in hex and 890mv static in pbe (it shouldn't even start with this setting but.. as v-core is limited by v-ram... that must be higher voltages in real )
what is strange I have another card.. she has 100mv offset too
but..
she hangs on powerstage 4 (which I set at 980mv in PBE) but works at 990mV
so what's real values?
how to calculate it?
Attached Files
File Type: zip saphire480_4g_elpida_bios_no_offset.zip (109.4 KB, 5 views)
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post #68 of 218 (permalink) Old 04-13-2017, 04:27 AM
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Adam, did you try it this way ?

https://www.youtube.com/watch?v=sc5qFEIMYTs&feature=youtu.be

It should work on Polaris too, as Gupsterg said.
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post #69 of 218 (permalink) Old 04-13-2017, 05:04 AM
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I know this manua but I am afraid I break something..
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post #70 of 218 (permalink) Old 04-13-2017, 05:06 AM
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Try it on a dual bios card first, if you have one smile.gif
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