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  Topic Review (Newest First)
10-21-2019 09:45 AM
neurotix
Quote: Originally Posted by The Stilt View Post
Nothing I can share at the moment, as they're internal builds.
And making a custom 1001 based build would be a huge amount of work
Thanks for answering, understood
10-21-2019 09:15 AM
The Stilt
Quote: Originally Posted by neurotix View Post
Do you have this for the Hero (Non-Wifi)?



I'm still working on memory OC (and lowering latency) and it might be helpful. Thank you. I will flash it, test and report my results if you have it.


Also, if you don't mind, a question. I changed some setting while OCing my memory, and observed a large increase in DRAM copy bandwidth at 3800MHz/1900 Fclk- something like 64GB/sec copy, with Read and write being 60GB/sec and 58GB/sec respectively (Copy is usually around 62GB/sec now). I cannot reproduce this, and I'm on BIOS 1001, but it was an option in AMD CBS. I'm wondering if you (or anyone else) knows of what setting this might have been, I think I might have had BankGroupSwap disabled, or possibly BankGroupSwap instead of BankGroupSwap_alt


Thanks.
Nothing I can share at the moment, as they're internal builds.
And making a custom 1001 based build would be a huge amount of work
10-21-2019 06:47 AM
Reikoji
Quote: Originally Posted by MacG32 View Post
EK-Quantum Momentum ROG Crosshair VIII Hero D-RGB Monoblock

https://www.guru3d.com/news-story/ek...monoblock.html
The Formula Upgrade.
10-21-2019 03:23 AM
MacG32 EK-Quantum Momentum ROG Crosshair VIII Hero D-RGB Monoblock

https://www.guru3d.com/news-story/ek...monoblock.html
10-20-2019 02:59 PM
pantsoftime
Quote: Originally Posted by The Stilt View Post
Here is a manually updated 1001 bios with AGESA 1.0.0.4RC stack.
Thank you kindly sir. I'll give this a shot.
10-20-2019 02:24 PM
neurotix
Quote: Originally Posted by The Stilt View Post
Here is a manually updated 1001 bios with AGESA 1.0.0.4RC stack.
Again, its not complete build since the new control is not available in the existing CBS.
The CBS itself can be updated, but that would result in issues with recovery and Hii database in general, and because of that it is not done.

I've used it couple weeks now without any issues, but then again at least in my case there is no difference in behavior compared to 1.0.0.3ABBA builds either.

Note that this is an unofficial, modified bios.
It can be updated with either Flashback or Flashrom (with header stripped).

Crosshair VIII Formula - 1001MFS



Do you have this for the Hero (Non-Wifi)?



I'm still working on memory OC (and lowering latency) and it might be helpful. Thank you. I will flash it, test and report my results if you have it.


Also, if you don't mind, a question. I changed some setting while OCing my memory, and observed a large increase in DRAM copy bandwidth at 3800MHz/1900 Fclk- something like 64GB/sec copy, with Read and write being 60GB/sec and 58GB/sec respectively (Copy is usually around 62GB/sec now). I cannot reproduce this, and I'm on BIOS 1001, but it was an option in AMD CBS. I'm wondering if you (or anyone else) knows of what setting this might have been, I think I might have had BankGroupSwap disabled, or possibly BankGroupSwap instead of BankGroupSwap_alt


Thanks.
10-19-2019 03:06 PM
The Stilt
Quote: Originally Posted by pantsoftime View Post
Has anyone heard when we might see a C8F beta BIOS for 1.0.0.4? Shamino went dark over on the Asus forums and he was the one providing the beta 1.0.0.3ABBA BIOSes previously.
Here is a manually updated 1001 bios with AGESA 1.0.0.4RC stack.
Again, its not complete build since the new control is not available in the existing CBS.
The CBS itself can be updated, but that would result in issues with recovery and Hii database in general, and because of that it is not done.

I've used it couple weeks now without any issues, but then again at least in my case there is no difference in behavior compared to 1.0.0.3ABBA builds either.

Note that this is an unofficial, modified bios.
It can be updated with either Flashback or Flashrom (with header stripped).

Crosshair VIII Formula - 1001MFS
10-19-2019 12:50 PM
pantsoftime Has anyone heard when we might see a C8F beta BIOS for 1.0.0.4? Shamino went dark over on the Asus forums and he was the one providing the beta 1.0.0.3ABBA BIOSes previously.
10-19-2019 11:54 AM
The Stilt

Here is the upper part of the V/F on the best core (2) of the 3700X I used.

I recorded the peak voltage command driven by the CPU during single threaded test, run with manual affinity.
The command was read from the VRM controller (ASP1405I) side, so there is no question if the software reported values are correct or not.
No offsets (controller side) were used and the CPU operated at the stock parameters (88W PPT, 60A TDC, 90A EDC, 95°C TjMax, 100% PBO scalar).

While all of the cores within this CPUs are able to hit the advertised 4.400GHz frequency, none of them are able to sustain it.
The average frequency for the best core (2) is 4385.965MHz in the workload I used.

At stock, three of the cores (1, 5, 6) hit the Vmax limit (LUVL) of 1.50000V in an effort trying to hit the default boost frequency.
The best core (2) requires 1.48125V to do that, leaving just 18.75mV to be "spent" for Auto OC purposes, which considering the V/F curve you can now extrapolate won't be sufficient even for 4425MHz.
In fact, if you look at the 4350 - 4400MHz point, you can already see that the V/F doesn't look right since it deviates from the trend. Coincidentally, 4375MHz is the highest set frequency (due to 25MHz granularity) that the core can sustain.

When the Fmax is increased through the Auto OC offset (doesn't matter if its set to 25 or to 200MHz), the core will hit 4425MHz and 1.50000V VID request, which happens to be the Vmax (LUVL) limit as well.
Extrapolating based on the last two datapoints (4350 & 4400) the voltage required for 4425MHz would be 1.496875V, which due to the 6.25mV VID granularity is 1.50000V. And since the two last datapoints are lower than they should be (due to 4.4GHz not being sustained), and because the V/F keeps deteriorating even further with the increasing frequency, the actual requirement to sustain 4425MHz would be even higher than 1.50000V, hence out of reach.

Regarding the FIT:

Here's the behavior in Cinebench R20 NT, with 128W PPT, 100A TDC and 140A EDC limits:

100% = 5012 (score) - 1.381V Vmax (LUVL), 110.516W package power, limit reason: silicon fitness (reliability)
200% = 5034 (score) - 1.401V Vmax (LUVL), 115.825W package power, limit reason: silicon fitness (reliability)
300% = 5051 (score) - 1.413V Vmax (LUVL), 119.166W package power, limit reason: silicon fitness (reliability)

Despite I used custom tools for this, you can record the peak requested voltages with HWInfo as well, nothing wrong with that.
But if you want to see the accurate peaks the CPU is commanding, you need to use =< 250ms sample rate.
At the stock sample rate (2000ms) I saw up to 75mV lower peaks compared to the readings recorded from the VRM controller itself, at high speeds.

This is obviously just the behavior of a single CPU core of a single CPU specimen however, the theory applies to each and every Ryzen 3000-series CPU.
10-19-2019 08:47 AM
The Stilt
Quote: Originally Posted by rv8000 View Post
Makes sense, though it’s rather hard to see why certain bios settings don’t work in practice when there is no concrete way to see all limitations.

I ran several cinebench tests with 2x, 4x, 6x, 8x, and 10x, and all resulted in the same peak VID reading of 1.438, and same peak vcore of 1.425v read in hwinfo. (Peak clock of 4425)

So while I understand what you’re saying, either something is being misreported, I’m being limited by something I can’t tangibly record, or something isn’t working properly.
Did you test in multithreading workloads?
You should see significant increases from PBO scalar, when not limited by PPT/TDC/EDC.

Also, you are looking at HWInfo to determine the maximum voltage?
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