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  Topic Review (Newest First)
11-08-2019 05:44 AM
KyadCK
Quote: Originally Posted by VeritronX View Post
I was only guessing pcie4 might have been one reason for the decision to break support, and power was just an example of why other sockets had done so in the past. Now we can see some of the new socket's motherboard spec:



Looks like they've changed the rules for how pci-e lane pins are used, and routed them differently on the motherboard side after the socket.. I'd have to find the same slide for previous gen to compare better.
Every generation of Ryzen used PCI-e for the chipset if it had one.

The chipset gets NVMe RAID support because the chipset is literally the IO die from Ryzen/TR, but on the MB, so it can do everything the IO die can.
11-08-2019 02:42 AM
VeritronX
Quote: Originally Posted by KyadCK View Post
Explain 3900X on B350 then. The board, and even the chipset, do not need to support PCI-e 4.0 for the CPU to work in the socket. It can run in 3.0, just like when you put Ryzen3 in a Pre-X570 AM4 board.

Power is not a valid argument either, as 7nm draws far less per-core of it than 14/12nm did, and nearly all of the X399 boards are severely overbuilt.

As a reminder, the rumor is that TX40 will be a 4-channel board that supports up to 32-cores. X399 is a 4-channel board that already supports 32 higher power consuming cores.
I was only guessing pcie4 might have been one reason for the decision to break support, and power was just an example of why other sockets had done so in the past. Now we can see some of the new socket's motherboard spec:



Looks like they've changed the rules for how pci-e lane pins are used, and routed them differently on the motherboard side after the socket.. I'd have to find the same slide for previous gen to compare better.
11-05-2019 09:02 AM
ilmazzo
Quote: Originally Posted by looniam View Post
two atoms are walking down the street.

one says "oh snap, I lost an electron!"

the other asks "are you sure?"

"yeah, I'm positive"
bipolar humour!!!!!
11-05-2019 05:44 AM
KyadCK
Quote: Originally Posted by VeritronX View Post
There may not be a physical compatibility problem, but that does not mean they are compatible. TR4 does not have the same requirements of the motherboard as SP3, so motherboards made to the TR4 spec do not meet the spec for an SP3 cpu and are not considered a valid configuration.

Most of the reason for a new socket designation and forced break in compatibility is because the design spec for the motherboard side has been changed.

You see this with socket 1151, the power spec was changed in line with the higher boosting power requirements on the 6 and 8 core chips, which meant that motherboards designed for the 4 core cpu spec weren't considered compatible.. but if you remove all the safety and validation checks those chips can boot and run on a board that's built well enough to not be damaged by the extra load. But the boosting behavior of those newer chips on older boards is wrong, it doesn't boost properly at stock.

If I had to guess, I'd say the design spec for SP3 motherboards had pci-e requirements good enough for pci-e 4, but the spec for TR4 probably didn't in an effort to make the boards less expensive.
Explain 3900X on B350 then. The board, and even the chipset, do not need to support PCI-e 4.0 for the CPU to work in the socket. It can run in 3.0, just like when you put Ryzen3 in a Pre-X570 AM4 board.

Power is not a valid argument either, as 7nm draws far less per-core of it than 14/12nm did, and nearly all of the X399 boards are severely overbuilt.

As a reminder, the rumor is that TX40 will be a 4-channel board that supports up to 32-cores. X399 is a 4-channel board that already supports 32 higher power consuming cores.
11-05-2019 01:23 AM
VeritronX
Quote: Originally Posted by KyadCK View Post
Ah now I understand the confusion. You think there is a compatibility problem.

There is not one. This has already been proven. Case closed.
There may not be a physical compatibility problem, but that does not mean they are compatible. TR4 does not have the same requirements of the motherboard as SP3, so motherboards made to the TR4 spec do not meet the spec for an SP3 cpu and are not considered a valid configuration.

Most of the reason for a new socket designation and forced break in compatibility is because the design spec for the motherboard side has been changed.

You see this with socket 1151, the power spec was changed in line with the higher boosting power requirements on the 6 and 8 core chips, which meant that motherboards designed for the 4 core cpu spec weren't considered compatible.. but if you remove all the safety and validation checks those chips can boot and run on a board that's built well enough to not be damaged by the extra load. But the boosting behavior of those newer chips on older boards is wrong, it doesn't boost properly at stock.

If I had to guess, I'd say the design spec for SP3 motherboards had pci-e requirements good enough for pci-e 4, but the spec for TR4 probably didn't in an effort to make the boards less expensive.
11-04-2019 11:39 PM
Nizzen Is this guru3d forums?
11-04-2019 11:11 PM
looniam
Quote: Originally Posted by Imouto View Post
Today OCN sets a new low: "Less electrons".

I'm out of here because this can only end with me laughing my way into a permaban.
two atoms are walking down the street.

one says "oh snap, I lost an electron!"

the other asks "are you sure?"

"yeah, I'm positive"
11-04-2019 11:50 AM
KyadCK
Quote: Originally Posted by EniGma1987 View Post
I'm not confused at all. I am just taking pleasure in trying to lead you around to understanding the compatibility issue, and finally grasping an understanding of it while doing so in the most (insert word we aren't supposed to say on these forums here) way possible since that is how you have chosen to start the conversation and thus have it presented back to you in the same manner.
Ah now I understand the confusion. You think there is a compatibility problem.

There is not one. This has already been proven. Case closed.
11-04-2019 11:18 AM
Imouto
Quote: Originally Posted by EniGma1987 View Post
Oh? If you will remember correctly, that argument was (and apparent still is?) about the velocity of electricity in a vacuum not being the same as the velocity of electricity through a medium such as copper wire, and whether the amount it slows down as wires get into nanoscale sizes and there is less electrons and resistance is rising substantially starts to matter at all in CPU design. I claimed the velocity does change substantially and comes into play, you claimed that current speed and wave speed are different things over and over and over like you got stuck in a loop. Which had no bearing on the topic being discussed and you didn't seem to be able to move past that. Still dont seem to be able to actually.
Today OCN sets a new low: "Less electrons".

I'm out of here because this can only end with me laughing my way into a permaban.
11-04-2019 10:58 AM
EniGma1987
Quote: Originally Posted by KyadCK View Post
I do not know how to help you farther as I do not know where you are confused.
I'm not confused at all. I am just taking pleasure in trying to lead you around to understanding the compatibility issue, and finally grasping an understanding of it while doing so in the most (insert word we aren't supposed to say on these forums here) way possible since that is how you have chosen to start the conversation and thus have it presented back to you in the same manner.




Quote: Originally Posted by Imouto View Post
You are talking with the same guy that kept going and going mistaking the current drift velocity with the speed of a electromagnetic signal. It took pages to talk him out of his mistake.

He's not worth it, really.
Oh? If you will remember correctly, that argument was (and apparent still is?) about the velocity of electricity in a vacuum not being the same as the velocity of electricity through a medium such as copper wire, and whether the amount it slows down as wires get into nanoscale sizes and there is less electrons and resistance is rising substantially starts to matter at all in CPU design. I claimed the velocity does change substantially and comes into play, you claimed that current speed and wave speed are different things over and over and over like you got stuck in a loop. Which had no bearing on the topic being discussed and you didn't seem to be able to move past that. Still dont seem to be able to actually.
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