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Discussion Starter · #1 ·
My copy of GPU-Z (version 2.51.0) reports Bus Interface as "PCIe 4.0 @ 8x" on my PCIe 5.0 Slot / PCIe 4.0 GPU. My ASUS ROG Extreme Z790 has a PCIe 5.0 x16 Bus Interface and my RTX 4090 has a PCIe 4.0 x16 Bus Interface, I'm crystal there. Reporting confusion .. is GPU-Z picking up on the "x8" on the PCIe 5.0 side and reporting it as PCIe 4.0 "x8" and if so what is the actual bandwidth to the RTX 4090?

Yesterday I watched a video posted by Der8auer on YouTube entitled "I tried to repair my RTX 4090 and killed it :(" where we are using the same MOBO using different RTX 4090s and both of us have the same reporting of "PCIe 4.0 @ 8x." Also obviously I double checked the "shared" limits for my MOBO. I'm using the DDR4 DIMM.2_SLOT with 2x M.2 drives and the M.2_1(SOCKET3) with an M.2 all M.2's are PCIe 4.0 types. Manual: M.2_1 shares bandwidth with PCIEX16(G5)_2. When M.2_1 is enabled, PCIEX16(G5)_2 will be disabled. The RTX 4090 is installed in the PICEX16(G5)_1.

=> While typing this I have to see if there's a PCIe 4 .0 (G4) / PCIe 5.0 (G4) BIOS selection. Unfortunately the manual doesn't list BIOS entries to search handily.
=> Reporting bug or what?
=> What is my actual bandwidth to the RTX 4090?

So my question is has anyone with a Z790 MOBO experienced the same problem? My hope is the RTX 4090 is getting x8 of PCIe 5.0 bandwidth and GPU-Z can't report it properly. However, x8 of PCIe 4.0 bandwidth to my RTX 4090 is problem if accurate.

GPU-Z TechPowerUp
CPU-Z Intel Core i9 13900K @ 5501.32 MHz - CPU-Z VALIDATOR

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You probably have something else plugged into the motherboard stealing lanes from the GPU. It could also be a bad mount of the CPU, missing pin(s) causing dropped PCIe lanes.

It is NOT the GPU getting x8 of PCIe 5.0 bandwidth. It cannot work that way, the 4090 does not support PCIe 5.0 and cannot use PCIe 5.0 lanes at all (it would get 0 MB/s bandwidth for a PCIe 5.0 lane). Each PCIe lane is its own wire with very different signals running on them, it is not something abstract that could combine/split up like that.
 

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Discussion Starter · #4 ·
You probably have something else plugged into the motherboard stealing lanes from the GPU. It could also be a bad mount of the CPU, missing pin(s) causing dropped PCIe lanes.

It is NOT the GPU getting x8 of PCIe 5.0 bandwidth. It cannot work that way, the 4090 does not support PCIe 5.0 and cannot use PCIe 5.0 lanes at all (it would get 0 MB/s bandwidth for a PCIe 5.0 lane). Each PCIe lane is its own wire with very different signals running on them, it is not something abstract that could combine/split up like that.
I seriously doubt it's CPU pins (I'd bet serious money) and if it were (I had a stroke) I'd probably get, almost 100%, a host of other POST ERROR CODES and/or POST FAILURES. LOL not my first PC. Der8auer and I both have the SAME EXACT ASUS Z790 Extreme but different RTX 4090's AND SAME PCIe 4.0 x8 per GPU-Z. As far as "stealing" bandwidth I have x2 USB 3.2 Gen 1 headers connected and x1 USB 3.2 Gen 2 (USB-C) connected. That's it. I can RTFM.

So it's either a GPU-Z Bug or ==>> ASUS Extreme BIOS BUG. I'm probably going to try it in my old PC, but what's the point. I'm going on statistical probability.

Old PC:
GPU-Z TechPowerUp
CPU-Z Intel Core i7 12700K @ 4700 MHz - CPU-Z VALIDATOR
 

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Discussion Starter · #7 ·
To confirm, do you have a M.2 drive in the first slot?
I have a total of three (3) M.2's installed. all are PCIe 4.0 types. A Samsung installed in the M.2_1 (SOCKET3) and Crucial two (2) in the DDR4 DIMM.2_SLOT. The M.2_1 (SOCKET3) is a PCIe 5 slot which is located above (under the OLED) the GPU PCIEX16(G5)_1 slot. The reason I chose all of those slots is so I can have access once I install all the EK blocks .. i.e. easy access!
 

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I have a total of three (3) M.2's installed. all are PCIe 4.0 types. A Samsung installed in the M.2_1 (SOCKET3) and Crucial two (2) in the DDR4 DIMM.2_SLOT. The M.2_1 (SOCKET3) is a PCIe 5 slot which is located above (under the OLED) the GPU PCIEX16(G5)_1 slot. The reason I chose all of those slots is so I can have access once I install all the EK blocks .. i.e. easy access!
So I would suggest to again RTFM like you said you know how to do.

M.2_1 shares bandwidth with PCIEX16(G5)_2. When M.2_1 is enabled,
PCIEX16(G5)_2 will be disabled


Since you have a M.2 drive in that slot, you are getting halved lanes because it shares GEN 5 lanes.
It does not matter that you have a gen 4 drive.

So the issue is not a bios bug or a gpu-z bug, only user error lol
 

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Discussion Starter · #10 ·
So I would suggest to again RTFM like you said you know how to do.

M.2_1 shares bandwidth with PCIEX16(G5)_2. When M.2_1 is enabled,
PCIEX16(G5)_2 will be disabled


Since you have a M.2 drive in that slot, you are getting halved lanes because it shares GEN 5 lanes.
It does not matter that you have a gen 4 drive.

So the issue is not a bios bug or a gpu-z bug, only user error lol
LMAO .. only one problem with your theory the GPU is installed in as I said "The RTX 4090 is installed in the PICEX16(G5)_1. 1" .. not in PCIEX16(G5)_2.
 

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LMAO .. only one problem with your theory the GPU is installed in as I said "The RTX 4090 is installed in the PICEX16(G5)_1. 1" .. not in PCIEX16(G5)_2.
Please read carefully.

PCIEX16(G5)_2 AND M.2_1 SHARE BANDWIDTH WITH PCIEX16(G5)_1

You cannot use EITHER of those if you want PCIEX16(G5)_1 to have full x16 bandwidth.
 

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WOW .. NO! Here's a copy of the page and below that at 10 minutes using a different MOBO.

View attachment 2585691
View attachment 2585692
Are you purposely trying to pull out rebuttals? der8auer's issue and your issue isn't the same thing.

He has a faulty GPU and you have reading comprehension issues.

12/13th gen only have 16X Gen 5 PCIe lanes.
Tell me exactly how you think you are going to have 16x lanes to GPU and 4x lanes to a M.2 Gen 5 slot when there's only 16 available..

Answer is it's not possible so that's why the board internally switches the GPU to 8x when it detects either M.2_1 or 16x Gen5_2 slot is used.
16 + 4 != 16

Beyond that, if you still don't get it then oh well.
 

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Discussion Starter · #15 ·
Are you purposely trying to pull out rebuttals? der8auer's issue and your issue isn't the same thing.

He has a faulty GPU and you have reading comprehension issues.

//

Answer is it's not possible so that's why the board internally switches the GPU to 8x when it detects either M.2_1 or 16x Gen5_2 slot is used.
16 + 4 != 16
Der8auer damaged his GPU by heating it up in an effort for fix a "problem' that I don't think he had. Burn this into your head .. my GPU is installed in the slot PICEX16(G5)_1 not (_2) which is the bottom PCIe x16 length slot. PICEX16(G5)_2 is Disabled. The shared bandwidth of the Samsung in M.2_1 only effects PICEX16(G5)_2.

Look and re-read my original post and then look at the page of the manual and if necessary the actual picture I posted of my PC to see for yourself.
 

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Der8auer damaged his GPU by heating it up in an effort for fix a "problem' that I don't think he had. Burn this into your head .. my GPU is installed in the slot PICEX16(G5)_1 not (_2) which is the bottom PCIe x16 length slot. PICEX16(G5)_2 is Disabled. The shared bandwidth of the Samsung in M.2_1 only effects PICEX16(G5)_2.

Look and re-read my original post and then look at the page of the manual and if necessary the actual picture I posted of my PC to see for yourself.
It doesn't matter what GPU slot you are using if you have an SSD using the Gen 5 capable M2 slot regardless of motherboard. Intel has no dedicated Gen 5 lanes for an SSD. If you are using the purely Gen 4 M2 slots (which are usually chipset on Z790) then you won't have this happen.
 

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Discussion Starter · #18 ·
It doesn't matter what GPU slot you are using if you have an SSD using the Gen 5 capable M2 slot regardless of motherboard. Intel has no dedicated Gen 5 lanes for an SSD. If you are using the purely Gen 4 M2 slots (which are usually chipset on Z790) then you won't have this happen.
It's a definite possibility that it's not properly documented. IF ASUS is using the M.2_1(SOCKET3) effectively as "Dual VGA" then yep x8/x8 PCIe and can only utilize a "PCIe lane" regardless of its actual bandwidth. The test would be to move the M.2_1(SOCKET3) to e.g. M.2_2(SOCKET3) or M.2_3(SOCKET3).

Per Intel https://www.intel.com/content/www/u...-36m-cache-up-to-5-80-ghz/specifications.html
PCI Express Revision
5.0 and 4.0
PCI Express Configurations ‡
Up to 1x16+4, 2x8+4
Max # of PCI Express Lanes
20

‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
 

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Discussion Starter · #19 ·
Never use the Gen 5 slot because it will use lanes from your PCIEX16 slot regardless if your M2 is GEN 4. T
Well "never" I wouldn't go that far. The problem is accessibility especially once you add water blocks. The M.2_1(SOCKET3) and DIMM.2 locations are easy access for upgrades and or failures without draining a loop. It's a reasonable assumption and a poorly integrated once not to mention poorly documented.
 

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He ASSUMED the problem was from the GPU. Since we have the same ASUS Extreme Z790, it's probably the ASUS BIOS.
That’s freakin’ sad if true, also, you’re not related to Jaquavey by any chance?
 
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