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Robotic Chemist
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I didn't say it was completely stock. I said scalar, boost max, and CPU voltage were stock. We have people running around with 10x scalar, positive vcore offset, and maxed LLC - that's going to be way more wearing on the CPU than leaving those things alone.
On my 5950X I see about the same voltages, etc. no matter what I set the scaler or boost max to. Once PBO is set to motherboard limits changing those does not change what my CPU does. Using +200 boost max seems to cause it to run slightly slower. :unsure:

I was simply pointing out that you can get these CPUs to run a very aggressive voltage/load with a curve optimized PBO, more than you might expect. A positive voltage offset or crazy LLC settings would be pushing harder, but you can get a very strong push (high voltages) out of PBO without messing with those too.

Because that's how power delivery works. Those are motherboard delivery specs to let the CPU know what's available. Surely the VRMs are not able to deliver the same continuous current as they are able to deliver peak/spike current. So if someone is just running with these numbers at maxed values so as to be "uncapped", then that's fine and dandy. But running TDC higher than EDC makes no sense whatsoever - which is exactly what I said in my original post.
Huh? The point of TDC is to drop the power so you do not overwhelm the cooling (maybe VRM cooling, but it is about cooling). The is why it exists. The VRMs are so overkill on X570 OC boards that they aren't even a concern. You would destroy the CPU before they even get hot.

Running a TDC below EDC makes no sense whatsoever, at least not on a custom water cooled system with overkill VRMs. What do you gain?

Why? It doesn't appear to be too much for AMD at bone stock settings, so why do you feel it's too much for you?
Well, I get better benchmark scores for one. Also, lower temps. A negative curve offset causes the CPU to use higher clocks and more voltage for higher power loads (as does PBO itself), so I like to drop that some. I have run without the voltage offset. Without the offset I need to use slightly higher (less negative) curve offsets to be stable; performance is only a tiny bit better in pure single threaded benchmarks (~1 point in CBr20) and worse in multicore benchmarks.

But the problem I've noticed is that's everyone is all about what boost speed they're getting and judging their OC on that, rather than about what performance numbers they're achieving.
I don't think that is true. It is well known you need to benchmark Ryzen to validate an OC. It is easy to get it to clock higher but score worse, as you have seen.

But most of the time clocks do equal performance.
 

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hi, thank you so much for your quick reply!
. You need to set it based on stability testing of each core using CoreCycler. If you give it too much negative curve offset, you'll lose performance. You mentioned that you ran Corecycler, what settings did you run it on? ///////
I just ran Corecycler with AVX2, and started with 3 minutes per core to get the rough instabilities out. Where a core fails the test, I increase the Curve optimiser for that failed core by +5 and run Corecycler again. Once you are able to run Corecycler for a while without getting errors (maybe 2-3 hours), then set it to run the default 6 minutes per core and let it do its full test.

what do you mean by settings please?
Your Curve Optimizer settings per core with -25 on best cores, -21 on secondary and -30 on other cores is not correct for stability. It will end up with errors and software crashing.

My settings are (with the best cores in brackets): -25, +10, [-20], [0], -30, -25, -30, -25, -15, -25, -30, -15
The difference is quite wide to get stability, so you cannot just use general curve optimizer settings like what you have.

Looking at your Zentimings screenshot, I'd look at testing 3800 / 1900 memory clocks first to see if it improves Aida64 results and latency. tRFC and other subtimings can also be optimized further, but I'd use 3800/1900 first.
 

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I just ran Corecycler with AVX2, and started with 3 minutes per core to get the rough instabilities out. Where a core fails the test, I increase the Curve optimiser for that failed core by +5 and run Corecycler again. Once you are able to run Corecycler for a while without getting errors (maybe 2-3 hours), then set it to run the default 6 minutes per core and let it do its full test.


Your Curve Optimizer settings per core with -25 on best cores, -21 on secondary and -30 on other cores is not correct for stability. It will end up with errors and software crashing.

My settings are (with the best cores in brackets): -25, +10, [-20], [0], -30, -25, -30, -25, -15, -25, -30, -15
The difference is quite wide to get stability, so you cannot just use general curve optimizer settings like what you have.

Looking at your Zentimings screenshot, I'd look at testing 3800 / 1900 memory clocks first to see if it improves Aida64 results and latency. tRFC and other subtimings can also be optimized further, but I'd use 3800/1900 first.
with the core optimizer settings that I wrote you I get no errors in corecycler, or any other software. I encountered sudden pc restarts but I increased CPU LLC to lvl 2 and it's gone now, I also disabled C states and DF in bios

I tried 3800 mhz/ 1900 fclk but the latency gets even worse, at 75-76 ns
 

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Quick question, as I am working my CO settings and something just dawned on me, running corecycler prime95 huge all fft:

This is the first cycle and:
my core 0 ( second best core ccd 1 set to -7 ) runs all FFT in 12mn
my core 8 ( -17, second best ccd2 ) runs it in 17mn
my core 1 ( -2, best core ccd1 ) runs all fft in 14mn
core 9 ( -17 ) runs in 16mn
core 2 ( -30 ) runs in 16mn too
core 10 ( -30 ) runs in 14mn,
the other still waiting for the results.

Why such a variance between the cores ?

Is it CCD/CO applied related ( IE if I put a lower undervolt it will run faster ? ) or just core related ?

Instead of trying to go the lowest stable possible, should I aim to find the fastest all FFT times ?

As a quick note, I was fully stable on -5 core 0, 0 core 1, -15 core 8-9-15 and -20 all. I am just working on pushing that down.
 

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Probably because each core works (boosts) to different frequency and that is why is finishing the cycle for different time.
 

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Robotic Chemist
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That wouldn't make sense, 12 v.s. 17 min is 42% slower, that would be a HUGE clock speed difference. Normal variance between cores cannot explain that.

I think it is something else, but how are you measuring "runs it in X minutes" with CoreCycler? Don't you simply tell it how long to run on each core?
 

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That wouldn't make sense, 12 v.s. 17 min is 42% slower, that would be a HUGE clock speed difference. Normal variance between cores cannot explain that.

I think it is something else, but how are you measuring "runs it in X minutes" with CoreCycler? Don't you simply tell it how long to run on each core?
No, I let prime95 compute all the FFTs ( Runtime Auto ), so I can tell how long it runs per core to compute all of them. and there's indeed a great variance, I cannot explain though by just the CO offset or some boost clock difference.

I had a core at -30 complete in 14mn while the supposed second best core ccd2 completes in 17mn at -17.

full log:
11:14:35 - Iteration 1
----------------------------------
11:14:35 - Set to Core 0 (CPU 0)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
11:26:07 - Set to Core 8 (CPU 16)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
11:43:17 - Set to Core 1 (CPU 2)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
11:58:14 - Set to Core 9 (CPU 18)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
12:14:11 - Set to Core 2 (CPU 4)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
12:30:21 - Set to Core 10 (CPU 20)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
12:44:30 - Set to Core 3 (CPU 6)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
13:01:03 - Set to Core 11 (CPU 22)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
13:16:24 - Set to Core 4 (CPU 8)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
13:31:45 - Set to Core 12 (CPU 24)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
13:47:07 - Set to Core 5 (CPU 10)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
14:00:51 - Set to Core 13 (CPU 26)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
14:17:37 - Set to Core 6 (CPU 12)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
14:32:46 - Set to Core 14 (CPU 28)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
14:48:31 - Set to Core 7 (CPU 14)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
15:03:04 - Set to Core 15 (CPU 30)
Running until all FFT sizes have been tested...
All FFT sizes have been tested for this core, continuing to the next one
 

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I tried 3800 mhz/ 1900 fclk but the latency gets even worse, at 75-76 ns
My RAM set up is different to yours (I run B-die instead of your Micron E-die), but you can try some tighter subtimings at 3600/1800 MHz. I get 57.3 ns with only 3600/1800 MHz and I'm running only 2T. Granted I am running 4x16GB B-die sticks which is a silly thing to do as it needs 1.46V to even POST. However, with 1.46V, it passes the memory testing that I use (TM5, OCCT Extreme Large). 1.45V won't post for me.
 

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My RAM set up is different to yours (I run B-die instead of your Micron E-die), but you can try some tighter subtimings at 3600/1800 MHz. I get 57.3 ns with only 3600/1800 MHz and I'm running only 2T. Granted I am running 4x16GB B-die sticks which is a silly thing to do as it needs 1.46V to even POST. However, with 1.46V, it passes the memory testing that I use (TM5, OCCT Extreme Large). 1.45V won't post for me.
My RAM set up is different to yours (I run B-die instead of your Micron E-die), but you can try some tighter subtimings at 3600/1800 MHz. I get 57.3 ns with only 3600/1800 MHz and I'm running only 2T. Granted I am running 4x16GB B-die sticks which is a silly thing to do as it needs 1.46V to even POST. However, with 1.46V, it passes the memory testing that I use (TM5, OCCT Extreme Large). 1.45V won't post for me.
okay, but my read/write/copy is higher than yours, wouldn't this make also a difference in tasks or gaming?
 

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X570 AORUS ULTRA | 5950X | F43600C-32Gb | 2070 Super | Intel 900P | 970 EVO+1TB | 3 x 2GbHD | HX1200
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PPT - 200
TDC - 130
EDC - 130
CO best 2 cores -9 & -8
All other cores -30
2518484
2518485
 

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Single core test and it is 63c with default bios. Pc shutdown instantly when run multicore.
Might be thermal shutdown? What cooler are you using? What motherboard?
 

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Custom loop and dark hero. I got code 00 at first post and now after change ram slot and remount block Im able to post but system will shut down when run max core and I cant even post with 1800fclk and 3600 ram.
 

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Robotic Chemist
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Try turning off monitoring for both CPU temperatures (top two temps) in the Monitoring section of BIOS.
 

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Robotic Chemist
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Quick question, as I am working my CO settings and something just dawned on me, running corecycler prime95 huge all fft:

This is the first cycle and:
my core 0 ( second best core ccd 1 set to -7 ) runs all FFT in 12mn
my core 8 ( -17, second best ccd2 ) runs it in 17mn
my core 1 ( -2, best core ccd1 ) runs all fft in 14mn
core 9 ( -17 ) runs in 16mn
core 2 ( -30 ) runs in 16mn too
core 10 ( -30 ) runs in 14mn,
the other still waiting for the results.

Why such a variance between the cores ?
That's normal. Because CCD1's cores are set to run as high a clock as possible using as high a voltage that is needed. CCD2 on the other hand is set to run at almost the same speeds, but try to do so with lower voltage to reduce power consumption. Hence the actual work that CCD2 cores will do is much lower than CCD1.
 
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okay, but my read/write/copy is higher than yours, wouldn't this make also a difference in tasks or gaming?
That's one aspect, but I would expect your latency to be in the low 60's range. Sometimes subtimings that are too tight/aggressive can increase latency too.
 
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