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I'll test traditional instead of 19-21 for latency, but yeah, I change a lot of hidden things you can with A210. I won't be home from work for 8 hours or so though to test. :(

Edit: I'll share my BIOS settings when I get home.
2489115


2489116


Code:
SiSoftware Sandra

Benchmark Results
Aggregate Inter-Thread Bandwidth : 178.51GB/s
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Benchmark Results
Average Inter-Thread Latency : 40.1ns (9.5ns - 61.9ns)
Inter-Thread (same Core) Latency : 9.7ns
Inter-Core (same Module) Latency : 20.8ns
Inter-Module (same Package) Latency : 58.8ns
Results Interpretation : Lower Scores mean Better Performance.
Decimal Numeral System (base 10) : 1s = 1000ms, 1ms = 1000µs, 1µs = 1000ns, etc.

Performance per Thread
Aggregate Inter-Thread Bandwidth : 5.58GB/s
No. Threads : 32
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Performance vs. Power
Processor(s) Power : 105.00W
Aggregate Inter-Thread Bandwidth : 1740.91MB/s/W
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 3.82ns/W
Results Interpretation : Lower Scores mean Better Performance.

Capacity vs. Power
Total Cache Size : 707.05kB/W
Results Interpretation : Higher Scores mean Better Performance.

Performance vs. Speed
Aggregate Inter-Thread Bandwidth : 37.12MB/s/MHz
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 0.08ns/MHz
Results Interpretation : Lower Scores mean Better Performance.

Detailed Results
Processor Affinity : U0-U1 U2-U3 U4-U5 U6-U7 U8-U9 U10-U11 U12-U13 U14-U15 U16-U17 U18-U19 U20-U21 U22-U23 U24-U25 U26-U27 U28-U29 U30-U31
U0-M0C0T0 <> U2-M0C1T0 Data Latency : 22.1ns
U0-M0C0T0 <> U4-M0C2T0 Data Latency : 21.9ns
U0-M0C0T0 <> U6-M0C3T0 Data Latency : 21.8ns
U0-M0C0T0 <> U8-M0C4T0 Data Latency : 20.8ns
U0-M0C0T0 <> U10-M0C5T0 Data Latency : 20.8ns
U0-M0C0T0 <> U12-M0C6T0 Data Latency : 20.5ns
U0-M0C0T0 <> U14-M0C7T0 Data Latency : 20.2ns
U0-M0C0T0 <> U16-M1C0T0 Data Latency : 60.3ns
U0-M0C0T0 <> U18-M1C1T0 Data Latency : 60.7ns
U0-M0C0T0 <> U20-M1C2T0 Data Latency : 60.4ns
U0-M0C0T0 <> U22-M1C3T0 Data Latency : 60.6ns
U0-M0C0T0 <> U24-M1C4T0 Data Latency : 59.7ns
U0-M0C0T0 <> U26-M1C5T0 Data Latency : 60.3ns
U0-M0C0T0 <> U28-M1C6T0 Data Latency : 59.3ns
U0-M0C0T0 <> U30-M1C7T0 Data Latency : 59.9ns
U0-M0C0T0 <> U1-M0C0T1 Data Latency : 9.6ns
U0-M0C0T0 <> U3-M0C1T1 Data Latency : 22.2ns
U0-M0C0T0 <> U5-M0C2T1 Data Latency : 21.9ns
U0-M0C0T0 <> U7-M0C3T1 Data Latency : 21.8ns
U0-M0C0T0 <> U9-M0C4T1 Data Latency : 20.8ns
U0-M0C0T0 <> U11-M0C5T1 Data Latency : 20.8ns
U0-M0C0T0 <> U13-M0C6T1 Data Latency : 20.5ns
U0-M0C0T0 <> U15-M0C7T1 Data Latency : 20.2ns
U0-M0C0T0 <> U17-M1C0T1 Data Latency : 60.5ns
U0-M0C0T0 <> U19-M1C1T1 Data Latency : 60.6ns
U0-M0C0T0 <> U21-M1C2T1 Data Latency : 60.4ns
U0-M0C0T0 <> U23-M1C3T1 Data Latency : 60.6ns
U0-M0C0T0 <> U25-M1C4T1 Data Latency : 59.8ns
U0-M0C0T0 <> U27-M1C5T1 Data Latency : 60.3ns
U0-M0C0T0 <> U29-M1C6T1 Data Latency : 59.4ns
U0-M0C0T0 <> U31-M1C7T1 Data Latency : 59.9ns
U2-M0C1T0 <> U4-M0C2T0 Data Latency : 21.7ns
U2-M0C1T0 <> U6-M0C3T0 Data Latency : 22.9ns
U2-M0C1T0 <> U8-M0C4T0 Data Latency : 21.1ns
U2-M0C1T0 <> U10-M0C5T0 Data Latency : 22.1ns
U2-M0C1T0 <> U12-M0C6T0 Data Latency : 20.4ns
U2-M0C1T0 <> U14-M0C7T0 Data Latency : 20.9ns
U2-M0C1T0 <> U16-M1C0T0 Data Latency : 56.7ns
U2-M0C1T0 <> U18-M1C1T0 Data Latency : 56.5ns
U2-M0C1T0 <> U20-M1C2T0 Data Latency : 57.0ns
U2-M0C1T0 <> U22-M1C3T0 Data Latency : 57.4ns
U2-M0C1T0 <> U24-M1C4T0 Data Latency : 57.8ns
U2-M0C1T0 <> U26-M1C5T0 Data Latency : 57.9ns
U2-M0C1T0 <> U28-M1C6T0 Data Latency : 58.3ns
U2-M0C1T0 <> U30-M1C7T0 Data Latency : 58.0ns
U2-M0C1T0 <> U1-M0C0T1 Data Latency : 19.4ns
U2-M0C1T0 <> U3-M0C1T1 Data Latency : 10.0ns
U2-M0C1T0 <> U5-M0C2T1 Data Latency : 19.1ns
U2-M0C1T0 <> U7-M0C3T1 Data Latency : 20.7ns
U2-M0C1T0 <> U9-M0C4T1 Data Latency : 19.8ns
U2-M0C1T0 <> U11-M0C5T1 Data Latency : 21.3ns
U2-M0C1T0 <> U13-M0C6T1 Data Latency : 20.4ns
U2-M0C1T0 <> U15-M0C7T1 Data Latency : 20.9ns
U2-M0C1T0 <> U17-M1C0T1 Data Latency : 61.4ns
U2-M0C1T0 <> U19-M1C1T1 Data Latency : 61.0ns
U2-M0C1T0 <> U21-M1C2T1 Data Latency : 58.5ns
U2-M0C1T0 <> U23-M1C3T1 Data Latency : 57.6ns
U2-M0C1T0 <> U25-M1C4T1 Data Latency : 59.4ns
U2-M0C1T0 <> U27-M1C5T1 Data Latency : 58.6ns
U2-M0C1T0 <> U29-M1C6T1 Data Latency : 58.9ns
U2-M0C1T0 <> U31-M1C7T1 Data Latency : 60.3ns
U4-M0C2T0 <> U6-M0C3T0 Data Latency : 21.1ns
U4-M0C2T0 <> U8-M0C4T0 Data Latency : 21.9ns
U4-M0C2T0 <> U10-M0C5T0 Data Latency : 20.4ns
U4-M0C2T0 <> U12-M0C6T0 Data Latency : 21.4ns
U4-M0C2T0 <> U14-M0C7T0 Data Latency : 20.8ns
U4-M0C2T0 <> U16-M1C0T0 Data Latency : 60.3ns
U4-M0C2T0 <> U18-M1C1T0 Data Latency : 58.5ns
U4-M0C2T0 <> U20-M1C2T0 Data Latency : 59.9ns
U4-M0C2T0 <> U22-M1C3T0 Data Latency : 57.8ns
U4-M0C2T0 <> U24-M1C4T0 Data Latency : 58.5ns
U4-M0C2T0 <> U26-M1C5T0 Data Latency : 57.8ns
U4-M0C2T0 <> U28-M1C6T0 Data Latency : 58.2ns
U4-M0C2T0 <> U30-M1C7T0 Data Latency : 58.7ns
U4-M0C2T0 <> U1-M0C0T1 Data Latency : 19.4ns
U4-M0C2T0 <> U3-M0C1T1 Data Latency : 20.2ns
U4-M0C2T0 <> U5-M0C2T1 Data Latency : 9.9ns
U4-M0C2T0 <> U7-M0C3T1 Data Latency : 19.7ns
U4-M0C2T0 <> U9-M0C4T1 Data Latency : 20.4ns
U4-M0C2T0 <> U11-M0C5T1 Data Latency : 20.4ns
U4-M0C2T0 <> U13-M0C6T1 Data Latency : 21.3ns
U4-M0C2T0 <> U15-M0C7T1 Data Latency : 21.1ns
U4-M0C2T0 <> U17-M1C0T1 Data Latency : 57.8ns
U4-M0C2T0 <> U19-M1C1T1 Data Latency : 59.4ns
U4-M0C2T0 <> U21-M1C2T1 Data Latency : 59.9ns
U4-M0C2T0 <> U23-M1C3T1 Data Latency : 60.0ns
U4-M0C2T0 <> U25-M1C4T1 Data Latency : 59.6ns
U4-M0C2T0 <> U27-M1C5T1 Data Latency : 59.2ns
U4-M0C2T0 <> U29-M1C6T1 Data Latency : 58.4ns
U4-M0C2T0 <> U31-M1C7T1 Data Latency : 59.2ns
U6-M0C3T0 <> U8-M0C4T0 Data Latency : 20.4ns
U6-M0C3T0 <> U10-M0C5T0 Data Latency : 22.0ns
U6-M0C3T0 <> U12-M0C6T0 Data Latency : 21.1ns
U6-M0C3T0 <> U14-M0C7T0 Data Latency : 22.3ns
U6-M0C3T0 <> U16-M1C0T0 Data Latency : 58.4ns
U6-M0C3T0 <> U18-M1C1T0 Data Latency : 60.7ns
U6-M0C3T0 <> U20-M1C2T0 Data Latency : 57.8ns
U6-M0C3T0 <> U22-M1C3T0 Data Latency : 58.0ns
U6-M0C3T0 <> U24-M1C4T0 Data Latency : 58.7ns
U6-M0C3T0 <> U26-M1C5T0 Data Latency : 59.1ns
U6-M0C3T0 <> U28-M1C6T0 Data Latency : 58.6ns
U6-M0C3T0 <> U30-M1C7T0 Data Latency : 58.7ns
U6-M0C3T0 <> U1-M0C0T1 Data Latency : 19.0ns
U6-M0C3T0 <> U3-M0C1T1 Data Latency : 21.0ns
U6-M0C3T0 <> U5-M0C2T1 Data Latency : 19.7ns
U6-M0C3T0 <> U7-M0C3T1 Data Latency : 9.9ns
U6-M0C3T0 <> U9-M0C4T1 Data Latency : 20.4ns
U6-M0C3T0 <> U11-M0C5T1 Data Latency : 21.9ns
U6-M0C3T0 <> U13-M0C6T1 Data Latency : 21.1ns
U6-M0C3T0 <> U15-M0C7T1 Data Latency : 21.5ns
U6-M0C3T0 <> U17-M1C0T1 Data Latency : 57.8ns
U6-M0C3T0 <> U19-M1C1T1 Data Latency : 59.4ns
U6-M0C3T0 <> U21-M1C2T1 Data Latency : 57.2ns
U6-M0C3T0 <> U23-M1C3T1 Data Latency : 58.1ns
U6-M0C3T0 <> U25-M1C4T1 Data Latency : 60.4ns
U6-M0C3T0 <> U27-M1C5T1 Data Latency : 59.6ns
U6-M0C3T0 <> U29-M1C6T1 Data Latency : 58.6ns
U6-M0C3T0 <> U31-M1C7T1 Data Latency : 58.4ns
U8-M0C4T0 <> U10-M0C5T0 Data Latency : 20.0ns
U8-M0C4T0 <> U12-M0C6T0 Data Latency : 21.4ns
U8-M0C4T0 <> U14-M0C7T0 Data Latency : 21.1ns
U8-M0C4T0 <> U16-M1C0T0 Data Latency : 58.2ns
U8-M0C4T0 <> U18-M1C1T0 Data Latency : 58.1ns
U8-M0C4T0 <> U20-M1C2T0 Data Latency : 57.1ns
U8-M0C4T0 <> U22-M1C3T0 Data Latency : 58.8ns
U8-M0C4T0 <> U24-M1C4T0 Data Latency : 59.6ns
U8-M0C4T0 <> U26-M1C5T0 Data Latency : 58.3ns
U8-M0C4T0 <> U28-M1C6T0 Data Latency : 58.3ns
U8-M0C4T0 <> U30-M1C7T0 Data Latency : 59.2ns
U8-M0C4T0 <> U1-M0C0T1 Data Latency : 20.4ns
U8-M0C4T0 <> U3-M0C1T1 Data Latency : 20.7ns
U8-M0C4T0 <> U5-M0C2T1 Data Latency : 20.5ns
U8-M0C4T0 <> U7-M0C3T1 Data Latency : 20.4ns
U8-M0C4T0 <> U9-M0C4T1 Data Latency : 9.5ns
U8-M0C4T0 <> U11-M0C5T1 Data Latency : 19.3ns
U8-M0C4T0 <> U13-M0C6T1 Data Latency : 21.8ns
U8-M0C4T0 <> U15-M0C7T1 Data Latency : 20.8ns
U8-M0C4T0 <> U17-M1C0T1 Data Latency : 56.8ns
U8-M0C4T0 <> U19-M1C1T1 Data Latency : 57.0ns
U8-M0C4T0 <> U21-M1C2T1 Data Latency : 58.1ns
U8-M0C4T0 <> U23-M1C3T1 Data Latency : 58.8ns
U8-M0C4T0 <> U25-M1C4T1 Data Latency : 57.9ns
U8-M0C4T0 <> U27-M1C5T1 Data Latency : 58.6ns
U8-M0C4T0 <> U29-M1C6T1 Data Latency : 58.6ns
U8-M0C4T0 <> U31-M1C7T1 Data Latency : 58.7ns
U10-M0C5T0 <> U12-M0C6T0 Data Latency : 21.6ns
U10-M0C5T0 <> U14-M0C7T0 Data Latency : 20.0ns
U10-M0C5T0 <> U16-M1C0T0 Data Latency : 59.3ns
U10-M0C5T0 <> U18-M1C1T0 Data Latency : 57.0ns
U10-M0C5T0 <> U20-M1C2T0 Data Latency : 58.1ns
U10-M0C5T0 <> U22-M1C3T0 Data Latency : 59.6ns
U10-M0C5T0 <> U24-M1C4T0 Data Latency : 59.1ns
U10-M0C5T0 <> U26-M1C5T0 Data Latency : 58.5ns
U10-M0C5T0 <> U28-M1C6T0 Data Latency : 59.0ns
U10-M0C5T0 <> U30-M1C7T0 Data Latency : 57.8ns
U10-M0C5T0 <> U1-M0C0T1 Data Latency : 20.5ns
U10-M0C5T0 <> U3-M0C1T1 Data Latency : 20.3ns
U10-M0C5T0 <> U5-M0C2T1 Data Latency : 20.4ns
U10-M0C5T0 <> U7-M0C3T1 Data Latency : 20.8ns
U10-M0C5T0 <> U9-M0C4T1 Data Latency : 21.0ns
U10-M0C5T0 <> U11-M0C5T1 Data Latency : 9.7ns
U10-M0C5T0 <> U13-M0C6T1 Data Latency : 21.6ns
U10-M0C5T0 <> U15-M0C7T1 Data Latency : 20.6ns
U10-M0C5T0 <> U17-M1C0T1 Data Latency : 57.4ns
U10-M0C5T0 <> U19-M1C1T1 Data Latency : 57.8ns
U10-M0C5T0 <> U21-M1C2T1 Data Latency : 58.1ns
U10-M0C5T0 <> U23-M1C3T1 Data Latency : 58.7ns
U10-M0C5T0 <> U25-M1C4T1 Data Latency : 58.2ns
U10-M0C5T0 <> U27-M1C5T1 Data Latency : 57.9ns
U10-M0C5T0 <> U29-M1C6T1 Data Latency : 59.0ns
U10-M0C5T0 <> U31-M1C7T1 Data Latency : 58.8ns
U12-M0C6T0 <> U14-M0C7T0 Data Latency : 19.9ns
U12-M0C6T0 <> U16-M1C0T0 Data Latency : 59.2ns
U12-M0C6T0 <> U18-M1C1T0 Data Latency : 59.7ns
U12-M0C6T0 <> U20-M1C2T0 Data Latency : 58.9ns
U12-M0C6T0 <> U22-M1C3T0 Data Latency : 59.0ns
U12-M0C6T0 <> U24-M1C4T0 Data Latency : 59.2ns
U12-M0C6T0 <> U26-M1C5T0 Data Latency : 59.1ns
U12-M0C6T0 <> U28-M1C6T0 Data Latency : 59.4ns
U12-M0C6T0 <> U30-M1C7T0 Data Latency : 59.2ns
U12-M0C6T0 <> U1-M0C0T1 Data Latency : 20.7ns
U12-M0C6T0 <> U3-M0C1T1 Data Latency : 21.3ns
U12-M0C6T0 <> U5-M0C2T1 Data Latency : 21.4ns
U12-M0C6T0 <> U7-M0C3T1 Data Latency : 21.1ns
U12-M0C6T0 <> U9-M0C4T1 Data Latency : 19.1ns
U12-M0C6T0 <> U11-M0C5T1 Data Latency : 21.7ns
U12-M0C6T0 <> U13-M0C6T1 Data Latency : 9.8ns
U12-M0C6T0 <> U15-M0C7T1 Data Latency : 21.9ns
U12-M0C6T0 <> U17-M1C0T1 Data Latency : 58.1ns
U12-M0C6T0 <> U19-M1C1T1 Data Latency : 59.4ns
U12-M0C6T0 <> U21-M1C2T1 Data Latency : 59.1ns
U12-M0C6T0 <> U23-M1C3T1 Data Latency : 59.2ns
U12-M0C6T0 <> U25-M1C4T1 Data Latency : 59.0ns
U12-M0C6T0 <> U27-M1C5T1 Data Latency : 59.0ns
U12-M0C6T0 <> U29-M1C6T1 Data Latency : 58.6ns
U12-M0C6T0 <> U31-M1C7T1 Data Latency : 59.4ns
U14-M0C7T0 <> U16-M1C0T0 Data Latency : 59.7ns
U14-M0C7T0 <> U18-M1C1T0 Data Latency : 57.8ns
U14-M0C7T0 <> U20-M1C2T0 Data Latency : 59.0ns
U14-M0C7T0 <> U22-M1C3T0 Data Latency : 58.7ns
U14-M0C7T0 <> U24-M1C4T0 Data Latency : 58.9ns
U14-M0C7T0 <> U26-M1C5T0 Data Latency : 58.8ns
U14-M0C7T0 <> U28-M1C6T0 Data Latency : 58.8ns
U14-M0C7T0 <> U30-M1C7T0 Data Latency : 59.0ns
U14-M0C7T0 <> U1-M0C0T1 Data Latency : 20.4ns
U14-M0C7T0 <> U3-M0C1T1 Data Latency : 21.0ns
U14-M0C7T0 <> U5-M0C2T1 Data Latency : 21.0ns
U14-M0C7T0 <> U7-M0C3T1 Data Latency : 21.4ns
U14-M0C7T0 <> U9-M0C4T1 Data Latency : 21.1ns
U14-M0C7T0 <> U11-M0C5T1 Data Latency : 20.7ns
U14-M0C7T0 <> U13-M0C6T1 Data Latency : 21.5ns
U14-M0C7T0 <> U15-M0C7T1 Data Latency : 9.8ns
U14-M0C7T0 <> U17-M1C0T1 Data Latency : 58.7ns
U14-M0C7T0 <> U19-M1C1T1 Data Latency : 58.3ns
U14-M0C7T0 <> U21-M1C2T1 Data Latency : 59.3ns
U14-M0C7T0 <> U23-M1C3T1 Data Latency : 58.8ns
U14-M0C7T0 <> U25-M1C4T1 Data Latency : 59.5ns
U14-M0C7T0 <> U27-M1C5T1 Data Latency : 59.2ns
U14-M0C7T0 <> U29-M1C6T1 Data Latency : 58.5ns
U14-M0C7T0 <> U31-M1C7T1 Data Latency : 59.1ns
U16-M1C0T0 <> U18-M1C1T0 Data Latency : 19.2ns
U16-M1C0T0 <> U20-M1C2T0 Data Latency : 21.8ns
U16-M1C0T0 <> U22-M1C3T0 Data Latency : 21.0ns
U16-M1C0T0 <> U24-M1C4T0 Data Latency : 22.2ns
U16-M1C0T0 <> U26-M1C5T0 Data Latency : 21.0ns
U16-M1C0T0 <> U28-M1C6T0 Data Latency : 21.5ns
U16-M1C0T0 <> U30-M1C7T0 Data Latency : 20.6ns
U16-M1C0T0 <> U1-M0C0T1 Data Latency : 59.4ns
U16-M1C0T0 <> U3-M0C1T1 Data Latency : 56.4ns
U16-M1C0T0 <> U5-M0C2T1 Data Latency : 57.0ns
U16-M1C0T0 <> U7-M0C3T1 Data Latency : 58.8ns
U16-M1C0T0 <> U9-M0C4T1 Data Latency : 58.1ns
U16-M1C0T0 <> U11-M0C5T1 Data Latency : 59.3ns
U16-M1C0T0 <> U13-M0C6T1 Data Latency : 58.9ns
U16-M1C0T0 <> U15-M0C7T1 Data Latency : 59.6ns
U16-M1C0T0 <> U17-M1C0T1 Data Latency : 9.8ns
U16-M1C0T0 <> U19-M1C1T1 Data Latency : 22.3ns
U16-M1C0T0 <> U21-M1C2T1 Data Latency : 20.4ns
U16-M1C0T0 <> U23-M1C3T1 Data Latency : 19.7ns
U16-M1C0T0 <> U25-M1C4T1 Data Latency : 22.4ns
U16-M1C0T0 <> U27-M1C5T1 Data Latency : 20.5ns
U16-M1C0T0 <> U29-M1C6T1 Data Latency : 21.5ns
U16-M1C0T0 <> U31-M1C7T1 Data Latency : 20.4ns
U18-M1C1T0 <> U20-M1C2T0 Data Latency : 18.8ns
U18-M1C1T0 <> U22-M1C3T0 Data Latency : 20.4ns
U18-M1C1T0 <> U24-M1C4T0 Data Latency : 20.6ns
U18-M1C1T0 <> U26-M1C5T0 Data Latency : 20.7ns
U18-M1C1T0 <> U28-M1C6T0 Data Latency : 20.2ns
U18-M1C1T0 <> U30-M1C7T0 Data Latency : 20.7ns
U18-M1C1T0 <> U1-M0C0T1 Data Latency : 59.7ns
U18-M1C1T0 <> U3-M0C1T1 Data Latency : 59.2ns
U18-M1C1T0 <> U5-M0C2T1 Data Latency : 58.5ns
U18-M1C1T0 <> U7-M0C3T1 Data Latency : 57.8ns
U18-M1C1T0 <> U9-M0C4T1 Data Latency : 58.2ns
U18-M1C1T0 <> U11-M0C5T1 Data Latency : 58.2ns
U18-M1C1T0 <> U13-M0C6T1 Data Latency : 58.3ns
U18-M1C1T0 <> U15-M0C7T1 Data Latency : 57.2ns
U18-M1C1T0 <> U17-M1C0T1 Data Latency : 21.1ns
U18-M1C1T0 <> U19-M1C1T1 Data Latency : 9.7ns
U18-M1C1T0 <> U21-M1C2T1 Data Latency : 21.7ns
U18-M1C1T0 <> U23-M1C3T1 Data Latency : 20.4ns
U18-M1C1T0 <> U25-M1C4T1 Data Latency : 20.9ns
U18-M1C1T0 <> U27-M1C5T1 Data Latency : 21.1ns
U18-M1C1T0 <> U29-M1C6T1 Data Latency : 20.3ns
U18-M1C1T0 <> U31-M1C7T1 Data Latency : 20.3ns
U20-M1C2T0 <> U22-M1C3T0 Data Latency : 19.4ns
U20-M1C2T0 <> U24-M1C4T0 Data Latency : 20.6ns
U20-M1C2T0 <> U26-M1C5T0 Data Latency : 20.1ns
U20-M1C2T0 <> U28-M1C6T0 Data Latency : 19.6ns
U20-M1C2T0 <> U30-M1C7T0 Data Latency : 20.8ns
U20-M1C2T0 <> U1-M0C0T1 Data Latency : 56.7ns
U20-M1C2T0 <> U3-M0C1T1 Data Latency : 57.3ns
U20-M1C2T0 <> U5-M0C2T1 Data Latency : 58.3ns
U20-M1C2T0 <> U7-M0C3T1 Data Latency : 59.5ns
U20-M1C2T0 <> U9-M0C4T1 Data Latency : 57.3ns
U20-M1C2T0 <> U11-M0C5T1 Data Latency : 58.5ns
U20-M1C2T0 <> U13-M0C6T1 Data Latency : 58.6ns
U20-M1C2T0 <> U15-M0C7T1 Data Latency : 59.6ns
U20-M1C2T0 <> U17-M1C0T1 Data Latency : 21.7ns
U20-M1C2T0 <> U19-M1C1T1 Data Latency : 18.8ns
U20-M1C2T0 <> U21-M1C2T1 Data Latency : 9.7ns
U20-M1C2T0 <> U23-M1C3T1 Data Latency : 19.5ns
U20-M1C2T0 <> U25-M1C4T1 Data Latency : 20.6ns
U20-M1C2T0 <> U27-M1C5T1 Data Latency : 20.1ns
U20-M1C2T0 <> U29-M1C6T1 Data Latency : 21.9ns
U20-M1C2T0 <> U31-M1C7T1 Data Latency : 20.5ns
U22-M1C3T0 <> U24-M1C4T0 Data Latency : 20.3ns
U22-M1C3T0 <> U26-M1C5T0 Data Latency : 20.5ns
U22-M1C3T0 <> U28-M1C6T0 Data Latency : 19.4ns
U22-M1C3T0 <> U30-M1C7T0 Data Latency : 21.9ns
U22-M1C3T0 <> U1-M0C0T1 Data Latency : 56.6ns
U22-M1C3T0 <> U3-M0C1T1 Data Latency : 58.8ns
U22-M1C3T0 <> U5-M0C2T1 Data Latency : 57.5ns
U22-M1C3T0 <> U7-M0C3T1 Data Latency : 59.7ns
U22-M1C3T0 <> U9-M0C4T1 Data Latency : 58.3ns
U22-M1C3T0 <> U11-M0C5T1 Data Latency : 59.2ns
U22-M1C3T0 <> U13-M0C6T1 Data Latency : 59.0ns
U22-M1C3T0 <> U15-M0C7T1 Data Latency : 58.2ns
U22-M1C3T0 <> U17-M1C0T1 Data Latency : 18.9ns
U22-M1C3T0 <> U19-M1C1T1 Data Latency : 21.7ns
U22-M1C3T0 <> U21-M1C2T1 Data Latency : 21.0ns
U22-M1C3T0 <> U23-M1C3T1 Data Latency : 9.7ns
U22-M1C3T0 <> U25-M1C4T1 Data Latency : 20.3ns
U22-M1C3T0 <> U27-M1C5T1 Data Latency : 21.8ns
U22-M1C3T0 <> U29-M1C6T1 Data Latency : 21.0ns
U22-M1C3T0 <> U31-M1C7T1 Data Latency : 19.5ns
U24-M1C4T0 <> U26-M1C5T0 Data Latency : 20.2ns
U24-M1C4T0 <> U28-M1C6T0 Data Latency : 21.9ns
U24-M1C4T0 <> U30-M1C7T0 Data Latency : 21.4ns
U24-M1C4T0 <> U1-M0C0T1 Data Latency : 58.1ns
U24-M1C4T0 <> U3-M0C1T1 Data Latency : 57.6ns
U24-M1C4T0 <> U5-M0C2T1 Data Latency : 59.7ns
U24-M1C4T0 <> U7-M0C3T1 Data Latency : 58.5ns
U24-M1C4T0 <> U9-M0C4T1 Data Latency : 59.7ns
U24-M1C4T0 <> U11-M0C5T1 Data Latency : 58.2ns
U24-M1C4T0 <> U13-M0C6T1 Data Latency : 58.5ns
U24-M1C4T0 <> U15-M0C7T1 Data Latency : 59.6ns
U24-M1C4T0 <> U17-M1C0T1 Data Latency : 19.8ns
U24-M1C4T0 <> U19-M1C1T1 Data Latency : 21.2ns
U24-M1C4T0 <> U21-M1C2T1 Data Latency : 20.6ns
U24-M1C4T0 <> U23-M1C3T1 Data Latency : 20.4ns
U24-M1C4T0 <> U25-M1C4T1 Data Latency : 9.8ns
U24-M1C4T0 <> U27-M1C5T1 Data Latency : 21.1ns
U24-M1C4T0 <> U29-M1C6T1 Data Latency : 21.6ns
U24-M1C4T0 <> U31-M1C7T1 Data Latency : 21.0ns
U26-M1C5T0 <> U28-M1C6T0 Data Latency : 20.2ns
U26-M1C5T0 <> U30-M1C7T0 Data Latency : 21.8ns
U26-M1C5T0 <> U1-M0C0T1 Data Latency : 59.2ns
U26-M1C5T0 <> U3-M0C1T1 Data Latency : 59.2ns
U26-M1C5T0 <> U5-M0C2T1 Data Latency : 60.6ns
U26-M1C5T0 <> U7-M0C3T1 Data Latency : 58.9ns
U26-M1C5T0 <> U9-M0C4T1 Data Latency : 58.4ns
U26-M1C5T0 <> U11-M0C5T1 Data Latency : 59.0ns
U26-M1C5T0 <> U13-M0C6T1 Data Latency : 58.8ns
U26-M1C5T0 <> U15-M0C7T1 Data Latency : 58.5ns
U26-M1C5T0 <> U17-M1C0T1 Data Latency : 20.4ns
U26-M1C5T0 <> U19-M1C1T1 Data Latency : 20.5ns
U26-M1C5T0 <> U21-M1C2T1 Data Latency : 20.2ns
U26-M1C5T0 <> U23-M1C3T1 Data Latency : 21.3ns
U26-M1C5T0 <> U25-M1C4T1 Data Latency : 20.2ns
U26-M1C5T0 <> U27-M1C5T1 Data Latency : 9.8ns
U26-M1C5T0 <> U29-M1C6T1 Data Latency : 21.5ns
U26-M1C5T0 <> U31-M1C7T1 Data Latency : 22.4ns
U28-M1C6T0 <> U30-M1C7T0 Data Latency : 21.5ns
U28-M1C6T0 <> U1-M0C0T1 Data Latency : 58.9ns
U28-M1C6T0 <> U3-M0C1T1 Data Latency : 60.6ns
U28-M1C6T0 <> U5-M0C2T1 Data Latency : 58.2ns
U28-M1C6T0 <> U7-M0C3T1 Data Latency : 58.9ns
U28-M1C6T0 <> U9-M0C4T1 Data Latency : 58.5ns
U28-M1C6T0 <> U11-M0C5T1 Data Latency : 58.4ns
U28-M1C6T0 <> U13-M0C6T1 Data Latency : 59.3ns
U28-M1C6T0 <> U15-M0C7T1 Data Latency : 59.3ns
U28-M1C6T0 <> U17-M1C0T1 Data Latency : 21.4ns
U28-M1C6T0 <> U19-M1C1T1 Data Latency : 20.4ns
U28-M1C6T0 <> U21-M1C2T1 Data Latency : 22.2ns
U28-M1C6T0 <> U23-M1C3T1 Data Latency : 19.6ns
U28-M1C6T0 <> U25-M1C4T1 Data Latency : 21.5ns
U28-M1C6T0 <> U27-M1C5T1 Data Latency : 20.2ns
U28-M1C6T0 <> U29-M1C6T1 Data Latency : 9.7ns
U28-M1C6T0 <> U31-M1C7T1 Data Latency : 21.9ns
U30-M1C7T0 <> U1-M0C0T1 Data Latency : 59.6ns
U30-M1C7T0 <> U3-M0C1T1 Data Latency : 60.8ns
U30-M1C7T0 <> U5-M0C2T1 Data Latency : 58.6ns
U30-M1C7T0 <> U7-M0C3T1 Data Latency : 60.1ns
U30-M1C7T0 <> U9-M0C4T1 Data Latency : 58.8ns
U30-M1C7T0 <> U11-M0C5T1 Data Latency : 58.6ns
U30-M1C7T0 <> U13-M0C6T1 Data Latency : 59.1ns
U30-M1C7T0 <> U15-M0C7T1 Data Latency : 58.4ns
U30-M1C7T0 <> U17-M1C0T1 Data Latency : 20.3ns
U30-M1C7T0 <> U19-M1C1T1 Data Latency : 20.5ns
U30-M1C7T0 <> U21-M1C2T1 Data Latency : 20.5ns
U30-M1C7T0 <> U23-M1C3T1 Data Latency : 21.3ns
U30-M1C7T0 <> U25-M1C4T1 Data Latency : 19.7ns
U30-M1C7T0 <> U27-M1C5T1 Data Latency : 21.9ns
U30-M1C7T0 <> U29-M1C6T1 Data Latency : 20.4ns
U30-M1C7T0 <> U31-M1C7T1 Data Latency : 9.6ns
U1-M0C0T1 <> U3-M0C1T1 Data Latency : 22.7ns
U1-M0C0T1 <> U5-M0C2T1 Data Latency : 22.0ns
U1-M0C0T1 <> U7-M0C3T1 Data Latency : 19.9ns
U1-M0C0T1 <> U9-M0C4T1 Data Latency : 19.4ns
U1-M0C0T1 <> U11-M0C5T1 Data Latency : 20.8ns
U1-M0C0T1 <> U13-M0C6T1 Data Latency : 20.7ns
U1-M0C0T1 <> U15-M0C7T1 Data Latency : 20.3ns
U1-M0C0T1 <> U17-M1C0T1 Data Latency : 59.1ns
U1-M0C0T1 <> U19-M1C1T1 Data Latency : 58.5ns
U1-M0C0T1 <> U21-M1C2T1 Data Latency : 56.9ns
U1-M0C0T1 <> U23-M1C3T1 Data Latency : 57.1ns
U1-M0C0T1 <> U25-M1C4T1 Data Latency : 58.0ns
U1-M0C0T1 <> U27-M1C5T1 Data Latency : 58.3ns
U1-M0C0T1 <> U29-M1C6T1 Data Latency : 58.8ns
U1-M0C0T1 <> U31-M1C7T1 Data Latency : 57.9ns
U3-M0C1T1 <> U5-M0C2T1 Data Latency : 20.5ns
U3-M0C1T1 <> U7-M0C3T1 Data Latency : 20.9ns
U3-M0C1T1 <> U9-M0C4T1 Data Latency : 21.2ns
U3-M0C1T1 <> U11-M0C5T1 Data Latency : 21.4ns
U3-M0C1T1 <> U13-M0C6T1 Data Latency : 20.5ns
U3-M0C1T1 <> U15-M0C7T1 Data Latency : 21.0ns
U3-M0C1T1 <> U17-M1C0T1 Data Latency : 61.9ns
U3-M0C1T1 <> U19-M1C1T1 Data Latency : 61.1ns
U3-M0C1T1 <> U21-M1C2T1 Data Latency : 58.0ns
U3-M0C1T1 <> U23-M1C3T1 Data Latency : 56.8ns
U3-M0C1T1 <> U25-M1C4T1 Data Latency : 61.4ns
U3-M0C1T1 <> U27-M1C5T1 Data Latency : 57.5ns
U3-M0C1T1 <> U29-M1C6T1 Data Latency : 59.3ns
U3-M0C1T1 <> U31-M1C7T1 Data Latency : 58.6ns
U5-M0C2T1 <> U7-M0C3T1 Data Latency : 21.3ns
U5-M0C2T1 <> U9-M0C4T1 Data Latency : 21.9ns
U5-M0C2T1 <> U11-M0C5T1 Data Latency : 20.4ns
U5-M0C2T1 <> U13-M0C6T1 Data Latency : 21.1ns
U5-M0C2T1 <> U15-M0C7T1 Data Latency : 20.8ns
U5-M0C2T1 <> U17-M1C0T1 Data Latency : 58.7ns
U5-M0C2T1 <> U19-M1C1T1 Data Latency : 58.6ns
U5-M0C2T1 <> U21-M1C2T1 Data Latency : 60.4ns
U5-M0C2T1 <> U23-M1C3T1 Data Latency : 59.0ns
U5-M0C2T1 <> U25-M1C4T1 Data Latency : 58.3ns
U5-M0C2T1 <> U27-M1C5T1 Data Latency : 57.9ns
U5-M0C2T1 <> U29-M1C6T1 Data Latency : 58.3ns
U5-M0C2T1 <> U31-M1C7T1 Data Latency : 60.1ns
U7-M0C3T1 <> U9-M0C4T1 Data Latency : 20.5ns
U7-M0C3T1 <> U11-M0C5T1 Data Latency : 21.9ns
U7-M0C3T1 <> U13-M0C6T1 Data Latency : 21.2ns
U7-M0C3T1 <> U15-M0C7T1 Data Latency : 21.5ns
U7-M0C3T1 <> U17-M1C0T1 Data Latency : 58.5ns
U7-M0C3T1 <> U19-M1C1T1 Data Latency : 57.3ns
U7-M0C3T1 <> U21-M1C2T1 Data Latency : 57.5ns
U7-M0C3T1 <> U23-M1C3T1 Data Latency : 59.0ns
U7-M0C3T1 <> U25-M1C4T1 Data Latency : 59.5ns
U7-M0C3T1 <> U27-M1C5T1 Data Latency : 58.8ns
U7-M0C3T1 <> U29-M1C6T1 Data Latency : 58.7ns
U7-M0C3T1 <> U31-M1C7T1 Data Latency : 58.4ns
U9-M0C4T1 <> U11-M0C5T1 Data Latency : 19.4ns
U9-M0C4T1 <> U13-M0C6T1 Data Latency : 21.8ns
U9-M0C4T1 <> U15-M0C7T1 Data Latency : 21.5ns
U9-M0C4T1 <> U17-M1C0T1 Data Latency : 60.3ns
U9-M0C4T1 <> U19-M1C1T1 Data Latency : 59.7ns
U9-M0C4T1 <> U21-M1C2T1 Data Latency : 57.1ns
U9-M0C4T1 <> U23-M1C3T1 Data Latency : 59.8ns
U9-M0C4T1 <> U25-M1C4T1 Data Latency : 58.7ns
U9-M0C4T1 <> U27-M1C5T1 Data Latency : 58.2ns
U9-M0C4T1 <> U29-M1C6T1 Data Latency : 58.6ns
U9-M0C4T1 <> U31-M1C7T1 Data Latency : 58.7ns
U11-M0C5T1 <> U13-M0C6T1 Data Latency : 20.3ns
U11-M0C5T1 <> U15-M0C7T1 Data Latency : 22.4ns
U11-M0C5T1 <> U17-M1C0T1 Data Latency : 56.9ns
U11-M0C5T1 <> U19-M1C1T1 Data Latency : 58.1ns
U11-M0C5T1 <> U21-M1C2T1 Data Latency : 59.1ns
U11-M0C5T1 <> U23-M1C3T1 Data Latency : 58.2ns
U11-M0C5T1 <> U25-M1C4T1 Data Latency : 58.4ns
U11-M0C5T1 <> U27-M1C5T1 Data Latency : 59.6ns
U11-M0C5T1 <> U29-M1C6T1 Data Latency : 58.9ns
U11-M0C5T1 <> U31-M1C7T1 Data Latency : 59.0ns
U13-M0C6T1 <> U15-M0C7T1 Data Latency : 19.1ns
U13-M0C6T1 <> U17-M1C0T1 Data Latency : 58.1ns
U13-M0C6T1 <> U19-M1C1T1 Data Latency : 57.7ns
U13-M0C6T1 <> U21-M1C2T1 Data Latency : 58.5ns
U13-M0C6T1 <> U23-M1C3T1 Data Latency : 58.6ns
U13-M0C6T1 <> U25-M1C4T1 Data Latency : 59.3ns
U13-M0C6T1 <> U27-M1C5T1 Data Latency : 59.4ns
U13-M0C6T1 <> U29-M1C6T1 Data Latency : 59.0ns
U13-M0C6T1 <> U31-M1C7T1 Data Latency : 59.4ns
U15-M0C7T1 <> U17-M1C0T1 Data Latency : 59.2ns
U15-M0C7T1 <> U19-M1C1T1 Data Latency : 57.1ns
U15-M0C7T1 <> U21-M1C2T1 Data Latency : 58.6ns
U15-M0C7T1 <> U23-M1C3T1 Data Latency : 58.4ns
U15-M0C7T1 <> U25-M1C4T1 Data Latency : 58.5ns
U15-M0C7T1 <> U27-M1C5T1 Data Latency : 59.6ns
U15-M0C7T1 <> U29-M1C6T1 Data Latency : 59.3ns
U15-M0C7T1 <> U31-M1C7T1 Data Latency : 59.0ns
U17-M1C0T1 <> U19-M1C1T1 Data Latency : 20.9ns
U17-M1C0T1 <> U21-M1C2T1 Data Latency : 22.8ns
U17-M1C0T1 <> U23-M1C3T1 Data Latency : 21.9ns
U17-M1C0T1 <> U25-M1C4T1 Data Latency : 21.2ns
U17-M1C0T1 <> U27-M1C5T1 Data Latency : 19.6ns
U17-M1C0T1 <> U29-M1C6T1 Data Latency : 21.5ns
U17-M1C0T1 <> U31-M1C7T1 Data Latency : 20.4ns
U19-M1C1T1 <> U21-M1C2T1 Data Latency : 21.6ns
U19-M1C1T1 <> U23-M1C3T1 Data Latency : 22.9ns
U19-M1C1T1 <> U25-M1C4T1 Data Latency : 20.5ns
U19-M1C1T1 <> U27-M1C5T1 Data Latency : 21.2ns
U19-M1C1T1 <> U29-M1C6T1 Data Latency : 20.7ns
U19-M1C1T1 <> U31-M1C7T1 Data Latency : 20.8ns
U21-M1C2T1 <> U23-M1C3T1 Data Latency : 21.1ns
U21-M1C2T1 <> U25-M1C4T1 Data Latency : 20.7ns
U21-M1C2T1 <> U27-M1C5T1 Data Latency : 20.3ns
U21-M1C2T1 <> U29-M1C6T1 Data Latency : 20.9ns
U21-M1C2T1 <> U31-M1C7T1 Data Latency : 20.8ns
U23-M1C3T1 <> U25-M1C4T1 Data Latency : 20.4ns
U23-M1C3T1 <> U27-M1C5T1 Data Latency : 21.7ns
U23-M1C3T1 <> U29-M1C6T1 Data Latency : 20.5ns
U23-M1C3T1 <> U31-M1C7T1 Data Latency : 22.1ns
U25-M1C4T1 <> U27-M1C5T1 Data Latency : 21.1ns
U25-M1C4T1 <> U29-M1C6T1 Data Latency : 21.9ns
U25-M1C4T1 <> U31-M1C7T1 Data Latency : 20.4ns
U27-M1C5T1 <> U29-M1C6T1 Data Latency : 21.5ns
U27-M1C5T1 <> U31-M1C7T1 Data Latency : 21.9ns
U29-M1C6T1 <> U31-M1C7T1 Data Latency : 21.8ns
1x 64bytes Blocks Bandwidth : 26.26GB/s
4x 64bytes Blocks Bandwidth : 28.6GB/s
4x 256bytes Blocks Bandwidth : 102GB/s
4x 1kB Blocks Bandwidth : 328GB/s
4x 4kB Blocks Bandwidth : 517.23GB/s
16x 4kB Blocks Bandwidth : 728.6GB/s
4x 64kB Blocks Bandwidth : 1001.46GB/s
16x 64kB Blocks Bandwidth : 606.71GB/s
8x 256kB Blocks Bandwidth : 616.7GB/s
4x 1MB Blocks Bandwidth : 606.11GB/s
16x 1MB Blocks Bandwidth : 25.43GB/s
8x 4MB Blocks Bandwidth : 19.15GB/s

Benchmark Status
Result ID : AMD Ryzen 9 5950X 16-Core Processor (2M 16C 32T 4.92GHz, 1.9GHz IMC, 16x 512kB L2, 2x 32MB L3)
Microcode : A20F10-1009
Computer : MSI MS-7D13 (MSI MEG B550 UNIFY-X (MS-7D13))
Platform Compliance : x64
No. Threads : 32
System Timer : 10MHz
Page Size : 2MB

Processor
Model : AMD Ryzen 9 5950X 16-Core Processor
URL : https://www.amd.com
Speed : 4.92GHz
Min/Max/Turbo Speed : 2.2GHz - 3.4GHz - 4.92GHz
Modules per Processor : 2 Unit(s)
Cores per Processor : 8 Unit(s)
Threads per Core : 2 Unit(s)
Front-Side Bus Speed : 100MHz
Revision/Stepping : 21 / 0
Microcode : A20F10-1009
L1D (1st Level) Data Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L1I (1st Level) Code Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L2 (2nd Level) Data/Unified Cache : 16x 512kB, 8-Way, Fully Inclusive, 64bytes Line Size, 2 Thread(s)
L3 (3rd Level) Data/Unified Cache : 2x 32MB, 16-Way, Exclusive, 64bytes Line Size, 16 Thread(s)
Rated Power (TDP) : 105.00W

Memory Controller
Speed : 1.9GHz (100%)
Min/Max/Turbo Speed : 950MHz - 1.9GHz

Performance Enhancing Tips
Notice 242 : Dynamic OverClocking/Turbo engaged. Environment conditions may influence performance.
Tip 3 : Double-click tip or press Enter while a tip is selected for more information about the tip.
2489117


2489118



Code:
SiSoftware Sandra

Benchmark Results
Aggregate Inter-ThSiSoftware Sandra

Benchmark Results
Aggregate Inter-Thread Bandwidth : 175.35GB/s
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Benchmark Results
Average Inter-Thread Latency : 39.9ns (9.5ns - 59.7ns)
Inter-Thread (same Core) Latency : 9.7ns
Inter-Core (same Module) Latency : 20.9ns
Inter-Module (same Package) Latency : 58.5ns
Results Interpretation : Lower Scores mean Better Performance.
Decimal Numeral System (base 10) : 1s = 1000ms, 1ms = 1000µs, 1µs = 1000ns, etc.

Performance per Thread
Aggregate Inter-Thread Bandwidth : 5.48GB/s
No. Threads : 32
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Performance vs. Power
Processor(s) Power : 105.00W
Aggregate Inter-Thread Bandwidth : 1710.09MB/s/W
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 3.80ns/W
Results Interpretation : Lower Scores mean Better Performance.

Capacity vs. Power
Total Cache Size : 707.05kB/W
Results Interpretation : Higher Scores mean Better Performance.

Performance vs. Speed
Aggregate Inter-Thread Bandwidth : 36.46MB/s/MHz
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 0.08ns/MHz
Results Interpretation : Lower Scores mean Better Performance.

Detailed Results
Processor Affinity : U0-U1 U2-U3 U4-U5 U6-U7 U8-U9 U10-U11 U12-U13 U14-U15 U16-U17 U18-U19 U20-U21 U22-U23 U24-U25 U26-U27 U28-U29 U30-U31
U0-M0C0T0 <> U2-M0C1T0 Data Latency : 19.5ns
U0-M0C0T0 <> U4-M0C2T0 Data Latency : 21.7ns
U0-M0C0T0 <> U6-M0C3T0 Data Latency : 19.6ns
U0-M0C0T0 <> U8-M0C4T0 Data Latency : 22.0ns
U0-M0C0T0 <> U10-M0C5T0 Data Latency : 20.0ns
U0-M0C0T0 <> U12-M0C6T0 Data Latency : 21.4ns
U0-M0C0T0 <> U14-M0C7T0 Data Latency : 20.2ns
U0-M0C0T0 <> U16-M1C0T0 Data Latency : 57.9ns
U0-M0C0T0 <> U18-M1C1T0 Data Latency : 57.8ns
U0-M0C0T0 <> U20-M1C2T0 Data Latency : 57.8ns
U0-M0C0T0 <> U22-M1C3T0 Data Latency : 57.1ns
U0-M0C0T0 <> U24-M1C4T0 Data Latency : 58.7ns
U0-M0C0T0 <> U26-M1C5T0 Data Latency : 57.9ns
U0-M0C0T0 <> U28-M1C6T0 Data Latency : 58.5ns
U0-M0C0T0 <> U30-M1C7T0 Data Latency : 58.6ns
U0-M0C0T0 <> U1-M0C0T1 Data Latency : 9.5ns
U0-M0C0T0 <> U3-M0C1T1 Data Latency : 19.6ns
U0-M0C0T0 <> U5-M0C2T1 Data Latency : 21.7ns
U0-M0C0T0 <> U7-M0C3T1 Data Latency : 19.6ns
U0-M0C0T0 <> U9-M0C4T1 Data Latency : 22.0ns
U0-M0C0T0 <> U11-M0C5T1 Data Latency : 19.9ns
U0-M0C0T0 <> U13-M0C6T1 Data Latency : 21.4ns
U0-M0C0T0 <> U15-M0C7T1 Data Latency : 20.3ns
U0-M0C0T0 <> U17-M1C0T1 Data Latency : 57.9ns
U0-M0C0T0 <> U19-M1C1T1 Data Latency : 57.7ns
U0-M0C0T0 <> U21-M1C2T1 Data Latency : 58.0ns
U0-M0C0T0 <> U23-M1C3T1 Data Latency : 57.1ns
U0-M0C0T0 <> U25-M1C4T1 Data Latency : 58.8ns
U0-M0C0T0 <> U27-M1C5T1 Data Latency : 57.9ns
U0-M0C0T0 <> U29-M1C6T1 Data Latency : 58.6ns
U0-M0C0T0 <> U31-M1C7T1 Data Latency : 58.4ns
U2-M0C1T0 <> U4-M0C2T0 Data Latency : 20.6ns
U2-M0C1T0 <> U6-M0C3T0 Data Latency : 20.0ns
U2-M0C1T0 <> U8-M0C4T0 Data Latency : 21.2ns
U2-M0C1T0 <> U10-M0C5T0 Data Latency : 20.5ns
U2-M0C1T0 <> U12-M0C6T0 Data Latency : 20.5ns
U2-M0C1T0 <> U14-M0C7T0 Data Latency : 20.3ns
U2-M0C1T0 <> U16-M1C0T0 Data Latency : 58.1ns
U2-M0C1T0 <> U18-M1C1T0 Data Latency : 57.8ns
U2-M0C1T0 <> U20-M1C2T0 Data Latency : 58.4ns
U2-M0C1T0 <> U22-M1C3T0 Data Latency : 57.2ns
U2-M0C1T0 <> U24-M1C4T0 Data Latency : 59.0ns
U2-M0C1T0 <> U26-M1C5T0 Data Latency : 57.9ns
U2-M0C1T0 <> U28-M1C6T0 Data Latency : 58.9ns
U2-M0C1T0 <> U30-M1C7T0 Data Latency : 58.6ns
U2-M0C1T0 <> U1-M0C0T1 Data Latency : 19.5ns
U2-M0C1T0 <> U3-M0C1T1 Data Latency : 10.0ns
U2-M0C1T0 <> U5-M0C2T1 Data Latency : 20.6ns
U2-M0C1T0 <> U7-M0C3T1 Data Latency : 20.1ns
U2-M0C1T0 <> U9-M0C4T1 Data Latency : 21.1ns
U2-M0C1T0 <> U11-M0C5T1 Data Latency : 20.5ns
U2-M0C1T0 <> U13-M0C6T1 Data Latency : 20.5ns
U2-M0C1T0 <> U15-M0C7T1 Data Latency : 20.4ns
U2-M0C1T0 <> U17-M1C0T1 Data Latency : 58.1ns
U2-M0C1T0 <> U19-M1C1T1 Data Latency : 58.0ns
U2-M0C1T0 <> U21-M1C2T1 Data Latency : 58.3ns
U2-M0C1T0 <> U23-M1C3T1 Data Latency : 57.3ns
U2-M0C1T0 <> U25-M1C4T1 Data Latency : 59.0ns
U2-M0C1T0 <> U27-M1C5T1 Data Latency : 57.9ns
U2-M0C1T0 <> U29-M1C6T1 Data Latency : 59.1ns
U2-M0C1T0 <> U31-M1C7T1 Data Latency : 58.3ns
U4-M0C2T0 <> U6-M0C3T0 Data Latency : 19.8ns
U4-M0C2T0 <> U8-M0C4T0 Data Latency : 22.9ns
U4-M0C2T0 <> U10-M0C5T0 Data Latency : 20.3ns
U4-M0C2T0 <> U12-M0C6T0 Data Latency : 22.4ns
U4-M0C2T0 <> U14-M0C7T0 Data Latency : 21.1ns
U4-M0C2T0 <> U16-M1C0T0 Data Latency : 58.1ns
U4-M0C2T0 <> U18-M1C1T0 Data Latency : 58.0ns
U4-M0C2T0 <> U20-M1C2T0 Data Latency : 58.4ns
U4-M0C2T0 <> U22-M1C3T0 Data Latency : 57.7ns
U4-M0C2T0 <> U24-M1C4T0 Data Latency : 59.2ns
U4-M0C2T0 <> U26-M1C5T0 Data Latency : 58.3ns
U4-M0C2T0 <> U28-M1C6T0 Data Latency : 58.7ns
U4-M0C2T0 <> U30-M1C7T0 Data Latency : 58.7ns
U4-M0C2T0 <> U1-M0C0T1 Data Latency : 21.6ns
U4-M0C2T0 <> U3-M0C1T1 Data Latency : 20.7ns
U4-M0C2T0 <> U5-M0C2T1 Data Latency : 9.8ns
U4-M0C2T0 <> U7-M0C3T1 Data Latency : 19.7ns
U4-M0C2T0 <> U9-M0C4T1 Data Latency : 22.9ns
U4-M0C2T0 <> U11-M0C5T1 Data Latency : 20.4ns
U4-M0C2T0 <> U13-M0C6T1 Data Latency : 22.4ns
U4-M0C2T0 <> U15-M0C7T1 Data Latency : 21.1ns
U4-M0C2T0 <> U17-M1C0T1 Data Latency : 58.0ns
U4-M0C2T0 <> U19-M1C1T1 Data Latency : 58.0ns
U4-M0C2T0 <> U21-M1C2T1 Data Latency : 58.4ns
U4-M0C2T0 <> U23-M1C3T1 Data Latency : 57.7ns
U4-M0C2T0 <> U25-M1C4T1 Data Latency : 59.2ns
U4-M0C2T0 <> U27-M1C5T1 Data Latency : 58.3ns
U4-M0C2T0 <> U29-M1C6T1 Data Latency : 58.7ns
U4-M0C2T0 <> U31-M1C7T1 Data Latency : 58.6ns
U6-M0C3T0 <> U8-M0C4T0 Data Latency : 20.6ns
U6-M0C3T0 <> U10-M0C5T0 Data Latency : 20.8ns
U6-M0C3T0 <> U12-M0C6T0 Data Latency : 21.2ns
U6-M0C3T0 <> U14-M0C7T0 Data Latency : 20.8ns
U6-M0C3T0 <> U16-M1C0T0 Data Latency : 58.0ns
U6-M0C3T0 <> U18-M1C1T0 Data Latency : 57.7ns
U6-M0C3T0 <> U20-M1C2T0 Data Latency : 58.2ns
U6-M0C3T0 <> U22-M1C3T0 Data Latency : 57.5ns
U6-M0C3T0 <> U24-M1C4T0 Data Latency : 58.8ns
U6-M0C3T0 <> U26-M1C5T0 Data Latency : 58.2ns
U6-M0C3T0 <> U28-M1C6T0 Data Latency : 58.8ns
U6-M0C3T0 <> U30-M1C7T0 Data Latency : 58.5ns
U6-M0C3T0 <> U1-M0C0T1 Data Latency : 19.9ns
U6-M0C3T0 <> U3-M0C1T1 Data Latency : 20.3ns
U6-M0C3T0 <> U5-M0C2T1 Data Latency : 19.9ns
U6-M0C3T0 <> U7-M0C3T1 Data Latency : 9.8ns
U6-M0C3T0 <> U9-M0C4T1 Data Latency : 20.7ns
U6-M0C3T0 <> U11-M0C5T1 Data Latency : 20.7ns
U6-M0C3T0 <> U13-M0C6T1 Data Latency : 20.7ns
U6-M0C3T0 <> U15-M0C7T1 Data Latency : 20.8ns
U6-M0C3T0 <> U17-M1C0T1 Data Latency : 58.0ns
U6-M0C3T0 <> U19-M1C1T1 Data Latency : 57.6ns
U6-M0C3T0 <> U21-M1C2T1 Data Latency : 58.2ns
U6-M0C3T0 <> U23-M1C3T1 Data Latency : 57.5ns
U6-M0C3T0 <> U25-M1C4T1 Data Latency : 58.9ns
U6-M0C3T0 <> U27-M1C5T1 Data Latency : 58.3ns
U6-M0C3T0 <> U29-M1C6T1 Data Latency : 58.9ns
U6-M0C3T0 <> U31-M1C7T1 Data Latency : 58.5ns
U8-M0C4T0 <> U10-M0C5T0 Data Latency : 20.8ns
U8-M0C4T0 <> U12-M0C6T0 Data Latency : 22.7ns
U8-M0C4T0 <> U14-M0C7T0 Data Latency : 21.4ns
U8-M0C4T0 <> U16-M1C0T0 Data Latency : 58.4ns
U8-M0C4T0 <> U18-M1C1T0 Data Latency : 58.2ns
U8-M0C4T0 <> U20-M1C2T0 Data Latency : 59.0ns
U8-M0C4T0 <> U22-M1C3T0 Data Latency : 58.1ns
U8-M0C4T0 <> U24-M1C4T0 Data Latency : 59.6ns
U8-M0C4T0 <> U26-M1C5T0 Data Latency : 58.7ns
U8-M0C4T0 <> U28-M1C6T0 Data Latency : 59.2ns
U8-M0C4T0 <> U30-M1C7T0 Data Latency : 59.0ns
U8-M0C4T0 <> U1-M0C0T1 Data Latency : 21.7ns
U8-M0C4T0 <> U3-M0C1T1 Data Latency : 21.2ns
U8-M0C4T0 <> U5-M0C2T1 Data Latency : 23.1ns
U8-M0C4T0 <> U7-M0C3T1 Data Latency : 20.4ns
U8-M0C4T0 <> U9-M0C4T1 Data Latency : 9.5ns
U8-M0C4T0 <> U11-M0C5T1 Data Latency : 20.8ns
U8-M0C4T0 <> U13-M0C6T1 Data Latency : 22.8ns
U8-M0C4T0 <> U15-M0C7T1 Data Latency : 21.4ns
U8-M0C4T0 <> U17-M1C0T1 Data Latency : 58.4ns
U8-M0C4T0 <> U19-M1C1T1 Data Latency : 58.2ns
U8-M0C4T0 <> U21-M1C2T1 Data Latency : 58.9ns
U8-M0C4T0 <> U23-M1C3T1 Data Latency : 58.1ns
U8-M0C4T0 <> U25-M1C4T1 Data Latency : 59.7ns
U8-M0C4T0 <> U27-M1C5T1 Data Latency : 58.7ns
U8-M0C4T0 <> U29-M1C6T1 Data Latency : 59.2ns
U8-M0C4T0 <> U31-M1C7T1 Data Latency : 59.0ns
U10-M0C5T0 <> U12-M0C6T0 Data Latency : 21.0ns
U10-M0C5T0 <> U14-M0C7T0 Data Latency : 21.2ns
U10-M0C5T0 <> U16-M1C0T0 Data Latency : 58.5ns
U10-M0C5T0 <> U18-M1C1T0 Data Latency : 58.1ns
U10-M0C5T0 <> U20-M1C2T0 Data Latency : 58.5ns
U10-M0C5T0 <> U22-M1C3T0 Data Latency : 57.6ns
U10-M0C5T0 <> U24-M1C4T0 Data Latency : 59.4ns
U10-M0C5T0 <> U26-M1C5T0 Data Latency : 58.2ns
U10-M0C5T0 <> U28-M1C6T0 Data Latency : 59.1ns
U10-M0C5T0 <> U30-M1C7T0 Data Latency : 58.5ns
U10-M0C5T0 <> U1-M0C0T1 Data Latency : 20.2ns
U10-M0C5T0 <> U3-M0C1T1 Data Latency : 20.7ns
U10-M0C5T0 <> U5-M0C2T1 Data Latency : 20.6ns
U10-M0C5T0 <> U7-M0C3T1 Data Latency : 20.7ns
U10-M0C5T0 <> U9-M0C4T1 Data Latency : 20.9ns
U10-M0C5T0 <> U11-M0C5T1 Data Latency : 9.7ns
U10-M0C5T0 <> U13-M0C6T1 Data Latency : 21.0ns
U10-M0C5T0 <> U15-M0C7T1 Data Latency : 21.2ns
U10-M0C5T0 <> U17-M1C0T1 Data Latency : 58.4ns
U10-M0C5T0 <> U19-M1C1T1 Data Latency : 58.1ns
U10-M0C5T0 <> U21-M1C2T1 Data Latency : 58.6ns
U10-M0C5T0 <> U23-M1C3T1 Data Latency : 57.5ns
U10-M0C5T0 <> U25-M1C4T1 Data Latency : 59.4ns
U10-M0C5T0 <> U27-M1C5T1 Data Latency : 58.3ns
U10-M0C5T0 <> U29-M1C6T1 Data Latency : 59.2ns
U10-M0C5T0 <> U31-M1C7T1 Data Latency : 58.5ns
U12-M0C6T0 <> U14-M0C7T0 Data Latency : 21.0ns
U12-M0C6T0 <> U16-M1C0T0 Data Latency : 58.6ns
U12-M0C6T0 <> U18-M1C1T0 Data Latency : 58.4ns
U12-M0C6T0 <> U20-M1C2T0 Data Latency : 58.7ns
U12-M0C6T0 <> U22-M1C3T0 Data Latency : 57.9ns
U12-M0C6T0 <> U24-M1C4T0 Data Latency : 59.4ns
U12-M0C6T0 <> U26-M1C5T0 Data Latency : 58.8ns
U12-M0C6T0 <> U28-M1C6T0 Data Latency : 59.4ns
U12-M0C6T0 <> U30-M1C7T0 Data Latency : 59.4ns
U12-M0C6T0 <> U1-M0C0T1 Data Latency : 21.4ns
U12-M0C6T0 <> U3-M0C1T1 Data Latency : 20.7ns
U12-M0C6T0 <> U5-M0C2T1 Data Latency : 22.4ns
U12-M0C6T0 <> U7-M0C3T1 Data Latency : 20.5ns
U12-M0C6T0 <> U9-M0C4T1 Data Latency : 22.7ns
U12-M0C6T0 <> U11-M0C5T1 Data Latency : 20.9ns
U12-M0C6T0 <> U13-M0C6T1 Data Latency : 9.8ns
U12-M0C6T0 <> U15-M0C7T1 Data Latency : 21.0ns
U12-M0C6T0 <> U17-M1C0T1 Data Latency : 58.6ns
U12-M0C6T0 <> U19-M1C1T1 Data Latency : 58.5ns
U12-M0C6T0 <> U21-M1C2T1 Data Latency : 58.6ns
U12-M0C6T0 <> U23-M1C3T1 Data Latency : 58.0ns
U12-M0C6T0 <> U25-M1C4T1 Data Latency : 59.5ns
U12-M0C6T0 <> U27-M1C5T1 Data Latency : 58.9ns
U12-M0C6T0 <> U29-M1C6T1 Data Latency : 59.4ns
U12-M0C6T0 <> U31-M1C7T1 Data Latency : 59.4ns
U14-M0C7T0 <> U16-M1C0T0 Data Latency : 58.9ns
U14-M0C7T0 <> U18-M1C1T0 Data Latency : 58.2ns
U14-M0C7T0 <> U20-M1C2T0 Data Latency : 58.9ns
U14-M0C7T0 <> U22-M1C3T0 Data Latency : 57.7ns
U14-M0C7T0 <> U24-M1C4T0 Data Latency : 59.5ns
U14-M0C7T0 <> U26-M1C5T0 Data Latency : 58.5ns
U14-M0C7T0 <> U28-M1C6T0 Data Latency : 59.7ns
U14-M0C7T0 <> U30-M1C7T0 Data Latency : 59.1ns
U14-M0C7T0 <> U1-M0C0T1 Data Latency : 20.2ns
U14-M0C7T0 <> U3-M0C1T1 Data Latency : 20.4ns
U14-M0C7T0 <> U5-M0C2T1 Data Latency : 21.2ns
U14-M0C7T0 <> U7-M0C3T1 Data Latency : 20.6ns
U14-M0C7T0 <> U9-M0C4T1 Data Latency : 21.6ns
U14-M0C7T0 <> U11-M0C5T1 Data Latency : 21.2ns
U14-M0C7T0 <> U13-M0C6T1 Data Latency : 21.1ns
U14-M0C7T0 <> U15-M0C7T1 Data Latency : 9.6ns
U14-M0C7T0 <> U17-M1C0T1 Data Latency : 58.9ns
U14-M0C7T0 <> U19-M1C1T1 Data Latency : 58.2ns
U14-M0C7T0 <> U21-M1C2T1 Data Latency : 58.9ns
U14-M0C7T0 <> U23-M1C3T1 Data Latency : 57.7ns
U14-M0C7T0 <> U25-M1C4T1 Data Latency : 59.5ns
U14-M0C7T0 <> U27-M1C5T1 Data Latency : 58.4ns
U14-M0C7T0 <> U29-M1C6T1 Data Latency : 59.6ns
U14-M0C7T0 <> U31-M1C7T1 Data Latency : 59.1ns
U16-M1C0T0 <> U18-M1C1T0 Data Latency : 19.4ns
U16-M1C0T0 <> U20-M1C2T0 Data Latency : 21.4ns
U16-M1C0T0 <> U22-M1C3T0 Data Latency : 19.4ns
U16-M1C0T0 <> U24-M1C4T0 Data Latency : 22.4ns
U16-M1C0T0 <> U26-M1C5T0 Data Latency : 20.1ns
U16-M1C0T0 <> U28-M1C6T0 Data Latency : 21.4ns
U16-M1C0T0 <> U30-M1C7T0 Data Latency : 20.3ns
U16-M1C0T0 <> U1-M0C0T1 Data Latency : 58.3ns
U16-M1C0T0 <> U3-M0C1T1 Data Latency : 58.1ns
U16-M1C0T0 <> U5-M0C2T1 Data Latency : 58.4ns
U16-M1C0T0 <> U7-M0C3T1 Data Latency : 57.7ns
U16-M1C0T0 <> U9-M0C4T1 Data Latency : 58.7ns
U16-M1C0T0 <> U11-M0C5T1 Data Latency : 58.1ns
U16-M1C0T0 <> U13-M0C6T1 Data Latency : 58.8ns
U16-M1C0T0 <> U15-M0C7T1 Data Latency : 58.6ns
U16-M1C0T0 <> U17-M1C0T1 Data Latency : 9.7ns
U16-M1C0T0 <> U19-M1C1T1 Data Latency : 19.4ns
U16-M1C0T0 <> U21-M1C2T1 Data Latency : 21.4ns
U16-M1C0T0 <> U23-M1C3T1 Data Latency : 19.4ns
U16-M1C0T0 <> U25-M1C4T1 Data Latency : 22.4ns
U16-M1C0T0 <> U27-M1C5T1 Data Latency : 20.1ns
U16-M1C0T0 <> U29-M1C6T1 Data Latency : 21.4ns
U16-M1C0T0 <> U31-M1C7T1 Data Latency : 20.3ns
U18-M1C1T0 <> U20-M1C2T0 Data Latency : 20.4ns
U18-M1C1T0 <> U22-M1C3T0 Data Latency : 19.8ns
U18-M1C1T0 <> U24-M1C4T0 Data Latency : 21.1ns
U18-M1C1T0 <> U26-M1C5T0 Data Latency : 20.4ns
U18-M1C1T0 <> U28-M1C6T0 Data Latency : 20.3ns
U18-M1C1T0 <> U30-M1C7T0 Data Latency : 20.3ns
U18-M1C1T0 <> U1-M0C0T1 Data Latency : 57.9ns
U18-M1C1T0 <> U3-M0C1T1 Data Latency : 58.0ns
U18-M1C1T0 <> U5-M0C2T1 Data Latency : 58.4ns
U18-M1C1T0 <> U7-M0C3T1 Data Latency : 57.1ns
U18-M1C1T0 <> U9-M0C4T1 Data Latency : 58.7ns
U18-M1C1T0 <> U11-M0C5T1 Data Latency : 57.4ns
U18-M1C1T0 <> U13-M0C6T1 Data Latency : 58.6ns
U18-M1C1T0 <> U15-M0C7T1 Data Latency : 58.1ns
U18-M1C1T0 <> U17-M1C0T1 Data Latency : 19.4ns
U18-M1C1T0 <> U19-M1C1T1 Data Latency : 9.7ns
U18-M1C1T0 <> U21-M1C2T1 Data Latency : 20.4ns
U18-M1C1T0 <> U23-M1C3T1 Data Latency : 19.8ns
U18-M1C1T0 <> U25-M1C4T1 Data Latency : 21.1ns
U18-M1C1T0 <> U27-M1C5T1 Data Latency : 20.4ns
U18-M1C1T0 <> U29-M1C6T1 Data Latency : 20.3ns
U18-M1C1T0 <> U31-M1C7T1 Data Latency : 20.2ns
U20-M1C2T0 <> U22-M1C3T0 Data Latency : 19.6ns
U20-M1C2T0 <> U24-M1C4T0 Data Latency : 22.8ns
U20-M1C2T0 <> U26-M1C5T0 Data Latency : 20.1ns
U20-M1C2T0 <> U28-M1C6T0 Data Latency : 22.2ns
U20-M1C2T0 <> U30-M1C7T0 Data Latency : 20.9ns
U20-M1C2T0 <> U1-M0C0T1 Data Latency : 58.0ns
U20-M1C2T0 <> U3-M0C1T1 Data Latency : 58.5ns
U20-M1C2T0 <> U5-M0C2T1 Data Latency : 58.5ns
U20-M1C2T0 <> U7-M0C3T1 Data Latency : 58.0ns
U20-M1C2T0 <> U9-M0C4T1 Data Latency : 58.6ns
U20-M1C2T0 <> U11-M0C5T1 Data Latency : 58.2ns
U20-M1C2T0 <> U13-M0C6T1 Data Latency : 58.7ns
U20-M1C2T0 <> U15-M0C7T1 Data Latency : 58.6ns
U20-M1C2T0 <> U17-M1C0T1 Data Latency : 21.4ns
U20-M1C2T0 <> U19-M1C1T1 Data Latency : 20.3ns
U20-M1C2T0 <> U21-M1C2T1 Data Latency : 9.7ns
U20-M1C2T0 <> U23-M1C3T1 Data Latency : 19.5ns
U20-M1C2T0 <> U25-M1C4T1 Data Latency : 22.8ns
U20-M1C2T0 <> U27-M1C5T1 Data Latency : 20.1ns
U20-M1C2T0 <> U29-M1C6T1 Data Latency : 22.1ns
U20-M1C2T0 <> U31-M1C7T1 Data Latency : 20.9ns
U22-M1C3T0 <> U24-M1C4T0 Data Latency : 20.6ns
U22-M1C3T0 <> U26-M1C5T0 Data Latency : 20.5ns
U22-M1C3T0 <> U28-M1C6T0 Data Latency : 20.5ns
U22-M1C3T0 <> U30-M1C7T0 Data Latency : 20.6ns
U22-M1C3T0 <> U1-M0C0T1 Data Latency : 57.6ns
U22-M1C3T0 <> U3-M0C1T1 Data Latency : 58.0ns
U22-M1C3T0 <> U5-M0C2T1 Data Latency : 58.2ns
U22-M1C3T0 <> U7-M0C3T1 Data Latency : 57.2ns
U22-M1C3T0 <> U9-M0C4T1 Data Latency : 58.6ns
U22-M1C3T0 <> U11-M0C5T1 Data Latency : 57.5ns
U22-M1C3T0 <> U13-M0C6T1 Data Latency : 58.3ns
U22-M1C3T0 <> U15-M0C7T1 Data Latency : 57.9ns
U22-M1C3T0 <> U17-M1C0T1 Data Latency : 19.7ns
U22-M1C3T0 <> U19-M1C1T1 Data Latency : 19.8ns
U22-M1C3T0 <> U21-M1C2T1 Data Latency : 19.7ns
U22-M1C3T0 <> U23-M1C3T1 Data Latency : 9.7ns
U22-M1C3T0 <> U25-M1C4T1 Data Latency : 20.6ns
U22-M1C3T0 <> U27-M1C5T1 Data Latency : 20.5ns
U22-M1C3T0 <> U29-M1C6T1 Data Latency : 20.7ns
U22-M1C3T0 <> U31-M1C7T1 Data Latency : 20.6ns
U24-M1C4T0 <> U26-M1C5T0 Data Latency : 21.1ns
U24-M1C4T0 <> U28-M1C6T0 Data Latency : 22.9ns
U24-M1C4T0 <> U30-M1C7T0 Data Latency : 21.6ns
U24-M1C4T0 <> U1-M0C0T1 Data Latency : 58.7ns
U24-M1C4T0 <> U3-M0C1T1 Data Latency : 59.5ns
U24-M1C4T0 <> U5-M0C2T1 Data Latency : 59.0ns
U24-M1C4T0 <> U7-M0C3T1 Data Latency : 58.6ns
U24-M1C4T0 <> U9-M0C4T1 Data Latency : 59.4ns
U24-M1C4T0 <> U11-M0C5T1 Data Latency : 58.9ns
U24-M1C4T0 <> U13-M0C6T1 Data Latency : 59.5ns
U24-M1C4T0 <> U15-M0C7T1 Data Latency : 59.4ns
U24-M1C4T0 <> U17-M1C0T1 Data Latency : 22.1ns
U24-M1C4T0 <> U19-M1C1T1 Data Latency : 21.1ns
U24-M1C4T0 <> U21-M1C2T1 Data Latency : 23.0ns
U24-M1C4T0 <> U23-M1C3T1 Data Latency : 20.4ns
U24-M1C4T0 <> U25-M1C4T1 Data Latency : 9.8ns
U24-M1C4T0 <> U27-M1C5T1 Data Latency : 21.1ns
U24-M1C4T0 <> U29-M1C6T1 Data Latency : 22.9ns
U24-M1C4T0 <> U31-M1C7T1 Data Latency : 21.6ns
U26-M1C5T0 <> U28-M1C6T0 Data Latency : 20.9ns
U26-M1C5T0 <> U30-M1C7T0 Data Latency : 21.3ns
U26-M1C5T0 <> U1-M0C0T1 Data Latency : 58.2ns
U26-M1C5T0 <> U3-M0C1T1 Data Latency : 58.6ns
U26-M1C5T0 <> U5-M0C2T1 Data Latency : 58.8ns
U26-M1C5T0 <> U7-M0C3T1 Data Latency : 58.0ns
U26-M1C5T0 <> U9-M0C4T1 Data Latency : 59.2ns
U26-M1C5T0 <> U11-M0C5T1 Data Latency : 58.0ns
U26-M1C5T0 <> U13-M0C6T1 Data Latency : 59.0ns
U26-M1C5T0 <> U15-M0C7T1 Data Latency : 58.5ns
U26-M1C5T0 <> U17-M1C0T1 Data Latency : 20.2ns
U26-M1C5T0 <> U19-M1C1T1 Data Latency : 20.4ns
U26-M1C5T0 <> U21-M1C2T1 Data Latency : 20.4ns
U26-M1C5T0 <> U23-M1C3T1 Data Latency : 20.5ns
U26-M1C5T0 <> U25-M1C4T1 Data Latency : 21.1ns
U26-M1C5T0 <> U27-M1C5T1 Data Latency : 9.7ns
U26-M1C5T0 <> U29-M1C6T1 Data Latency : 20.9ns
U26-M1C5T0 <> U31-M1C7T1 Data Latency : 21.3ns
U28-M1C6T0 <> U30-M1C7T0 Data Latency : 20.9ns
U28-M1C6T0 <> U1-M0C0T1 Data Latency : 58.9ns
U28-M1C6T0 <> U3-M0C1T1 Data Latency : 59.1ns
U28-M1C6T0 <> U5-M0C2T1 Data Latency : 59.2ns
U28-M1C6T0 <> U7-M0C3T1 Data Latency : 58.5ns
U28-M1C6T0 <> U9-M0C4T1 Data Latency : 59.3ns
U28-M1C6T0 <> U11-M0C5T1 Data Latency : 58.7ns
U28-M1C6T0 <> U13-M0C6T1 Data Latency : 59.5ns
U28-M1C6T0 <> U15-M0C7T1 Data Latency : 59.3ns
U28-M1C6T0 <> U17-M1C0T1 Data Latency : 21.4ns
U28-M1C6T0 <> U19-M1C1T1 Data Latency : 20.3ns
U28-M1C6T0 <> U21-M1C2T1 Data Latency : 22.2ns
U28-M1C6T0 <> U23-M1C3T1 Data Latency : 20.2ns
U28-M1C6T0 <> U25-M1C4T1 Data Latency : 22.9ns
U28-M1C6T0 <> U27-M1C5T1 Data Latency : 20.9ns
U28-M1C6T0 <> U29-M1C6T1 Data Latency : 9.8ns
U28-M1C6T0 <> U31-M1C7T1 Data Latency : 20.9ns
U30-M1C7T0 <> U1-M0C0T1 Data Latency : 58.5ns
U30-M1C7T0 <> U3-M0C1T1 Data Latency : 58.7ns
U30-M1C7T0 <> U5-M0C2T1 Data Latency : 59.0ns
U30-M1C7T0 <> U7-M0C3T1 Data Latency : 58.0ns
U30-M1C7T0 <> U9-M0C4T1 Data Latency : 59.5ns
U30-M1C7T0 <> U11-M0C5T1 Data Latency : 58.3ns
U30-M1C7T0 <> U13-M0C6T1 Data Latency : 59.4ns
U30-M1C7T0 <> U15-M0C7T1 Data Latency : 58.9ns
U30-M1C7T0 <> U17-M1C0T1 Data Latency : 20.2ns
U30-M1C7T0 <> U19-M1C1T1 Data Latency : 20.3ns
U30-M1C7T0 <> U21-M1C2T1 Data Latency : 21.0ns
U30-M1C7T0 <> U23-M1C3T1 Data Latency : 20.4ns
U30-M1C7T0 <> U25-M1C4T1 Data Latency : 21.8ns
U30-M1C7T0 <> U27-M1C5T1 Data Latency : 21.2ns
U30-M1C7T0 <> U29-M1C6T1 Data Latency : 21.1ns
U30-M1C7T0 <> U31-M1C7T1 Data Latency : 9.8ns
U1-M0C0T1 <> U3-M0C1T1 Data Latency : 19.6ns
U1-M0C0T1 <> U5-M0C2T1 Data Latency : 21.6ns
U1-M0C0T1 <> U7-M0C3T1 Data Latency : 19.6ns
U1-M0C0T1 <> U9-M0C4T1 Data Latency : 22.0ns
U1-M0C0T1 <> U11-M0C5T1 Data Latency : 20.0ns
U1-M0C0T1 <> U13-M0C6T1 Data Latency : 21.4ns
U1-M0C0T1 <> U15-M0C7T1 Data Latency : 20.2ns
U1-M0C0T1 <> U17-M1C0T1 Data Latency : 57.9ns
U1-M0C0T1 <> U19-M1C1T1 Data Latency : 57.7ns
U1-M0C0T1 <> U21-M1C2T1 Data Latency : 57.8ns
U1-M0C0T1 <> U23-M1C3T1 Data Latency : 57.3ns
U1-M0C0T1 <> U25-M1C4T1 Data Latency : 58.8ns
U1-M0C0T1 <> U27-M1C5T1 Data Latency : 57.9ns
U1-M0C0T1 <> U29-M1C6T1 Data Latency : 58.6ns
U1-M0C0T1 <> U31-M1C7T1 Data Latency : 58.5ns
U3-M0C1T1 <> U5-M0C2T1 Data Latency : 20.8ns
U3-M0C1T1 <> U7-M0C3T1 Data Latency : 20.1ns
U3-M0C1T1 <> U9-M0C4T1 Data Latency : 21.3ns
U3-M0C1T1 <> U11-M0C5T1 Data Latency : 20.6ns
U3-M0C1T1 <> U13-M0C6T1 Data Latency : 20.6ns
U3-M0C1T1 <> U15-M0C7T1 Data Latency : 20.6ns
U3-M0C1T1 <> U17-M1C0T1 Data Latency : 58.4ns
U3-M0C1T1 <> U19-M1C1T1 Data Latency : 58.4ns
U3-M0C1T1 <> U21-M1C2T1 Data Latency : 58.8ns
U3-M0C1T1 <> U23-M1C3T1 Data Latency : 57.7ns
U3-M0C1T1 <> U25-M1C4T1 Data Latency : 59.3ns
U3-M0C1T1 <> U27-M1C5T1 Data Latency : 58.6ns
U3-M0C1T1 <> U29-M1C6T1 Data Latency : 59.3ns
U3-M0C1T1 <> U31-M1C7T1 Data Latency : 59.0ns
U5-M0C2T1 <> U7-M0C3T1 Data Latency : 19.8ns
U5-M0C2T1 <> U9-M0C4T1 Data Latency : 22.9ns
U5-M0C2T1 <> U11-M0C5T1 Data Latency : 20.4ns
U5-M0C2T1 <> U13-M0C6T1 Data Latency : 22.4ns
U5-M0C2T1 <> U15-M0C7T1 Data Latency : 21.1ns
U5-M0C2T1 <> U17-M1C0T1 Data Latency : 58.0ns
U5-M0C2T1 <> U19-M1C1T1 Data Latency : 58.0ns
U5-M0C2T1 <> U21-M1C2T1 Data Latency : 58.3ns
U5-M0C2T1 <> U23-M1C3T1 Data Latency : 57.7ns
U5-M0C2T1 <> U25-M1C4T1 Data Latency : 59.1ns
U5-M0C2T1 <> U27-M1C5T1 Data Latency : 58.4ns
U5-M0C2T1 <> U29-M1C6T1 Data Latency : 58.8ns
U5-M0C2T1 <> U31-M1C7T1 Data Latency : 58.7ns
U7-M0C3T1 <> U9-M0C4T1 Data Latency : 20.7ns
U7-M0C3T1 <> U11-M0C5T1 Data Latency : 20.8ns
U7-M0C3T1 <> U13-M0C6T1 Data Latency : 20.9ns
U7-M0C3T1 <> U15-M0C7T1 Data Latency : 20.8ns
U7-M0C3T1 <> U17-M1C0T1 Data Latency : 58.0ns
U7-M0C3T1 <> U19-M1C1T1 Data Latency : 57.7ns
U7-M0C3T1 <> U21-M1C2T1 Data Latency : 58.3ns
U7-M0C3T1 <> U23-M1C3T1 Data Latency : 57.5ns
U7-M0C3T1 <> U25-M1C4T1 Data Latency : 58.8ns
U7-M0C3T1 <> U27-M1C5T1 Data Latency : 58.4ns
U7-M0C3T1 <> U29-M1C6T1 Data Latency : 58.8ns
U7-M0C3T1 <> U31-M1C7T1 Data Latency : 58.5ns
U9-M0C4T1 <> U11-M0C5T1 Data Latency : 20.8ns
U9-M0C4T1 <> U13-M0C6T1 Data Latency : 22.8ns
U9-M0C4T1 <> U15-M0C7T1 Data Latency : 21.4ns
U9-M0C4T1 <> U17-M1C0T1 Data Latency : 58.4ns
U9-M0C4T1 <> U19-M1C1T1 Data Latency : 58.2ns
U9-M0C4T1 <> U21-M1C2T1 Data Latency : 58.9ns
U9-M0C4T1 <> U23-M1C3T1 Data Latency : 58.1ns
U9-M0C4T1 <> U25-M1C4T1 Data Latency : 59.7ns
U9-M0C4T1 <> U27-M1C5T1 Data Latency : 58.6ns
U9-M0C4T1 <> U29-M1C6T1 Data Latency : 59.3ns
U9-M0C4T1 <> U31-M1C7T1 Data Latency : 59.0ns
U11-M0C5T1 <> U13-M0C6T1 Data Latency : 21.0ns
U11-M0C5T1 <> U15-M0C7T1 Data Latency : 21.2ns
U11-M0C5T1 <> U17-M1C0T1 Data Latency : 58.4ns
U11-M0C5T1 <> U19-M1C1T1 Data Latency : 58.1ns
U11-M0C5T1 <> U21-M1C2T1 Data Latency : 58.6ns
U11-M0C5T1 <> U23-M1C3T1 Data Latency : 57.5ns
U11-M0C5T1 <> U25-M1C4T1 Data Latency : 59.3ns
U11-M0C5T1 <> U27-M1C5T1 Data Latency : 58.2ns
U11-M0C5T1 <> U29-M1C6T1 Data Latency : 59.1ns
U11-M0C5T1 <> U31-M1C7T1 Data Latency : 58.5ns
U13-M0C6T1 <> U15-M0C7T1 Data Latency : 21.0ns
U13-M0C6T1 <> U17-M1C0T1 Data Latency : 58.6ns
U13-M0C6T1 <> U19-M1C1T1 Data Latency : 58.4ns
U13-M0C6T1 <> U21-M1C2T1 Data Latency : 58.7ns
U13-M0C6T1 <> U23-M1C3T1 Data Latency : 58.1ns
U13-M0C6T1 <> U25-M1C4T1 Data Latency : 59.4ns
U13-M0C6T1 <> U27-M1C5T1 Data Latency : 58.7ns
U13-M0C6T1 <> U29-M1C6T1 Data Latency : 59.4ns
U13-M0C6T1 <> U31-M1C7T1 Data Latency : 59.4ns
U15-M0C7T1 <> U17-M1C0T1 Data Latency : 58.9ns
U15-M0C7T1 <> U19-M1C1T1 Data Latency : 58.2ns
U15-M0C7T1 <> U21-M1C2T1 Data Latency : 58.8ns
U15-M0C7T1 <> U23-M1C3T1 Data Latency : 57.7ns
U15-M0C7T1 <> U25-M1C4T1 Data Latency : 59.7ns
U15-M0C7T1 <> U27-M1C5T1 Data Latency : 58.5ns
U15-M0C7T1 <> U29-M1C6T1 Data Latency : 59.6ns
U15-M0C7T1 <> U31-M1C7T1 Data Latency : 59.1ns
U17-M1C0T1 <> U19-M1C1T1 Data Latency : 19.4ns
U17-M1C0T1 <> U21-M1C2T1 Data Latency : 21.4ns
U17-M1C0T1 <> U23-M1C3T1 Data Latency : 19.5ns
U17-M1C0T1 <> U25-M1C4T1 Data Latency : 22.3ns
U17-M1C0T1 <> U27-M1C5T1 Data Latency : 20.1ns
U17-M1C0T1 <> U29-M1C6T1 Data Latency : 21.4ns
U17-M1C0T1 <> U31-M1C7T1 Data Latency : 20.3ns
U19-M1C1T1 <> U21-M1C2T1 Data Latency : 20.3ns
U19-M1C1T1 <> U23-M1C3T1 Data Latency : 19.7ns
U19-M1C1T1 <> U25-M1C4T1 Data Latency : 21.1ns
U19-M1C1T1 <> U27-M1C5T1 Data Latency : 20.4ns
U19-M1C1T1 <> U29-M1C6T1 Data Latency : 20.3ns
U19-M1C1T1 <> U31-M1C7T1 Data Latency : 20.2ns
U21-M1C2T1 <> U23-M1C3T1 Data Latency : 19.6ns
U21-M1C2T1 <> U25-M1C4T1 Data Latency : 22.8ns
U21-M1C2T1 <> U27-M1C5T1 Data Latency : 20.1ns
U21-M1C2T1 <> U29-M1C6T1 Data Latency : 22.1ns
U21-M1C2T1 <> U31-M1C7T1 Data Latency : 20.9ns
U23-M1C3T1 <> U25-M1C4T1 Data Latency : 20.6ns
U23-M1C3T1 <> U27-M1C5T1 Data Latency : 20.5ns
U23-M1C3T1 <> U29-M1C6T1 Data Latency : 20.6ns
U23-M1C3T1 <> U31-M1C7T1 Data Latency : 20.6ns
U25-M1C4T1 <> U27-M1C5T1 Data Latency : 21.1ns
U25-M1C4T1 <> U29-M1C6T1 Data Latency : 22.9ns
U25-M1C4T1 <> U31-M1C7T1 Data Latency : 21.6ns
U27-M1C5T1 <> U29-M1C6T1 Data Latency : 20.9ns
U27-M1C5T1 <> U31-M1C7T1 Data Latency : 21.3ns
U29-M1C6T1 <> U31-M1C7T1 Data Latency : 20.9ns
1x 64bytes Blocks Bandwidth : 26.57GB/s
4x 64bytes Blocks Bandwidth : 29.2GB/s
4x 256bytes Blocks Bandwidth : 103.48GB/s
4x 1kB Blocks Bandwidth : 324GB/s
4x 4kB Blocks Bandwidth : 522GB/s
16x 4kB Blocks Bandwidth : 669.66GB/s
4x 64kB Blocks Bandwidth : 1001.73GB/s
16x 64kB Blocks Bandwidth : 612.24GB/s
8x 256kB Blocks Bandwidth : 600.25GB/s
4x 1MB Blocks Bandwidth : 608.21GB/s
16x 1MB Blocks Bandwidth : 22.37GB/s
8x 4MB Blocks Bandwidth : 18.56GB/s

Benchmark Status
Result ID : AMD Ryzen 9 5950X 16-Core Processor (2M 16C 32T 4.92GHz, 1.9GHz IMC, 16x 512kB L2, 2x 32MB L3)
Microcode : A20F10-1009
Computer : MSI MS-7D13 (MSI MEG B550 UNIFY-X (MS-7D13))
Platform Compliance : x64
No. Threads : 32
System Timer : 10MHz
Page Size : 2MB

Processor
Model : AMD Ryzen 9 5950X 16-Core Processor
URL : https://www.amd.com
Speed : 4.92GHz
Min/Max/Turbo Speed : 2.2GHz - 3.4GHz - 4.92GHz
Modules per Processor : 2 Unit(s)
Cores per Processor : 8 Unit(s)
Threads per Core : 2 Unit(s)
Front-Side Bus Speed : 100MHz
Revision/Stepping : 21 / 0
Microcode : A20F10-1009
L1D (1st Level) Data Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L1I (1st Level) Code Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L2 (2nd Level) Data/Unified Cache : 16x 512kB, 8-Way, Fully Inclusive, 64bytes Line Size, 2 Thread(s)
L3 (3rd Level) Data/Unified Cache : 2x 32MB, 16-Way, Exclusive, 64bytes Line Size, 16 Thread(s)
Rated Power (TDP) : 105.00W

Memory Controller
Speed : 1.9GHz (100%)
Min/Max/Turbo Speed : 950MHz - 1.9GHz

Performance Enhancing Tips
Notice 242 : Dynamic OverClocking/Turbo engaged. Environment conditions may influence performance.
Tip 3 : Double-click tip or press Enter while a tip is selected for more information about the tip.
read Bandwidth : 175.35GB/s
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Benchmark Results
Average Inter-Thread Latency : 39.9ns (9.5ns - 59.7ns)
Inter-Thread (same Core) Latency : 9.7ns
Inter-Core (same Module) Latency : 20.9ns
Inter-Module (same Package) Latency : 58.5ns
Results Interpretation : Lower Scores mean Better Performance.
Decimal Numeral System (base 10) : 1s = 1000ms, 1ms = 1000µs, 1µs = 1000ns, etc.

Performance per Thread
Aggregate Inter-Thread Bandwidth : 5.48GB/s
No. Threads : 32
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Performance vs. Power
Processor(s) Power : 105.00W
Aggregate Inter-Thread Bandwidth : 1710.09MB/s/W
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 3.80ns/W
Results Interpretation : Lower Scores mean Better Performance.

Capacity vs. Power
Total Cache Size : 707.05kB/W
Results Interpretation : Higher Scores mean Better Performance.

Performance vs. Speed
Aggregate Inter-Thread Bandwidth : 36.46MB/s/MHz
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 0.08ns/MHz
Results Interpretation : Lower Scores mean Better Performance.

Detailed Results
Processor Affinity : U0-U1 U2-U3 U4-U5 U6-U7 U8-U9 U10-U11 U12-U13 U14-U15 U16-U17 U18-U19 U20-U21 U22-U23 U24-U25 U26-U27 U28-U29 U30-U31
U0-M0C0T0 <> U2-M0C1T0 Data Latency : 19.5ns
U0-M0C0T0 <> U4-M0C2T0 Data Latency : 21.7ns
U0-M0C0T0 <> U6-M0C3T0 Data Latency : 19.6ns
U0-M0C0T0 <> U8-M0C4T0 Data Latency : 22.0ns
U0-M0C0T0 <> U10-M0C5T0 Data Latency : 20.0ns
U0-M0C0T0 <> U12-M0C6T0 Data Latency : 21.4ns
U0-M0C0T0 <> U14-M0C7T0 Data Latency : 20.2ns
U0-M0C0T0 <> U16-M1C0T0 Data Latency : 57.9ns
U0-M0C0T0 <> U18-M1C1T0 Data Latency : 57.8ns
U0-M0C0T0 <> U20-M1C2T0 Data Latency : 57.8ns
U0-M0C0T0 <> U22-M1C3T0 Data Latency : 57.1ns
U0-M0C0T0 <> U24-M1C4T0 Data Latency : 58.7ns
U0-M0C0T0 <> U26-M1C5T0 Data Latency : 57.9ns
U0-M0C0T0 <> U28-M1C6T0 Data Latency : 58.5ns
U0-M0C0T0 <> U30-M1C7T0 Data Latency : 58.6ns
U0-M0C0T0 <> U1-M0C0T1 Data Latency : 9.5ns
U0-M0C0T0 <> U3-M0C1T1 Data Latency : 19.6ns
U0-M0C0T0 <> U5-M0C2T1 Data Latency : 21.7ns
U0-M0C0T0 <> U7-M0C3T1 Data Latency : 19.6ns
U0-M0C0T0 <> U9-M0C4T1 Data Latency : 22.0ns
U0-M0C0T0 <> U11-M0C5T1 Data Latency : 19.9ns
U0-M0C0T0 <> U13-M0C6T1 Data Latency : 21.4ns
U0-M0C0T0 <> U15-M0C7T1 Data Latency : 20.3ns
U0-M0C0T0 <> U17-M1C0T1 Data Latency : 57.9ns
U0-M0C0T0 <> U19-M1C1T1 Data Latency : 57.7ns
U0-M0C0T0 <> U21-M1C2T1 Data Latency : 58.0ns
U0-M0C0T0 <> U23-M1C3T1 Data Latency : 57.1ns
U0-M0C0T0 <> U25-M1C4T1 Data Latency : 58.8ns
U0-M0C0T0 <> U27-M1C5T1 Data Latency : 57.9ns
U0-M0C0T0 <> U29-M1C6T1 Data Latency : 58.6ns
U0-M0C0T0 <> U31-M1C7T1 Data Latency : 58.4ns
U2-M0C1T0 <> U4-M0C2T0 Data Latency : 20.6ns
U2-M0C1T0 <> U6-M0C3T0 Data Latency : 20.0ns
U2-M0C1T0 <> U8-M0C4T0 Data Latency : 21.2ns
U2-M0C1T0 <> U10-M0C5T0 Data Latency : 20.5ns
U2-M0C1T0 <> U12-M0C6T0 Data Latency : 20.5ns
U2-M0C1T0 <> U14-M0C7T0 Data Latency : 20.3ns
U2-M0C1T0 <> U16-M1C0T0 Data Latency : 58.1ns
U2-M0C1T0 <> U18-M1C1T0 Data Latency : 57.8ns
U2-M0C1T0 <> U20-M1C2T0 Data Latency : 58.4ns
U2-M0C1T0 <> U22-M1C3T0 Data Latency : 57.2ns
U2-M0C1T0 <> U24-M1C4T0 Data Latency : 59.0ns
U2-M0C1T0 <> U26-M1C5T0 Data Latency : 57.9ns
U2-M0C1T0 <> U28-M1C6T0 Data Latency : 58.9ns
U2-M0C1T0 <> U30-M1C7T0 Data Latency : 58.6ns
U2-M0C1T0 <> U1-M0C0T1 Data Latency : 19.5ns
U2-M0C1T0 <> U3-M0C1T1 Data Latency : 10.0ns
U2-M0C1T0 <> U5-M0C2T1 Data Latency : 20.6ns
U2-M0C1T0 <> U7-M0C3T1 Data Latency : 20.1ns
U2-M0C1T0 <> U9-M0C4T1 Data Latency : 21.1ns
U2-M0C1T0 <> U11-M0C5T1 Data Latency : 20.5ns
U2-M0C1T0 <> U13-M0C6T1 Data Latency : 20.5ns
U2-M0C1T0 <> U15-M0C7T1 Data Latency : 20.4ns
U2-M0C1T0 <> U17-M1C0T1 Data Latency : 58.1ns
U2-M0C1T0 <> U19-M1C1T1 Data Latency : 58.0ns
U2-M0C1T0 <> U21-M1C2T1 Data Latency : 58.3ns
U2-M0C1T0 <> U23-M1C3T1 Data Latency : 57.3ns
U2-M0C1T0 <> U25-M1C4T1 Data Latency : 59.0ns
U2-M0C1T0 <> U27-M1C5T1 Data Latency : 57.9ns
U2-M0C1T0 <> U29-M1C6T1 Data Latency : 59.1ns
U2-M0C1T0 <> U31-M1C7T1 Data Latency : 58.3ns
U4-M0C2T0 <> U6-M0C3T0 Data Latency : 19.8ns
U4-M0C2T0 <> U8-M0C4T0 Data Latency : 22.9ns
U4-M0C2T0 <> U10-M0C5T0 Data Latency : 20.3ns
U4-M0C2T0 <> U12-M0C6T0 Data Latency : 22.4ns
U4-M0C2T0 <> U14-M0C7T0 Data Latency : 21.1ns
U4-M0C2T0 <> U16-M1C0T0 Data Latency : 58.1ns
U4-M0C2T0 <> U18-M1C1T0 Data Latency : 58.0ns
U4-M0C2T0 <> U20-M1C2T0 Data Latency : 58.4ns
U4-M0C2T0 <> U22-M1C3T0 Data Latency : 57.7ns
U4-M0C2T0 <> U24-M1C4T0 Data Latency : 59.2ns
U4-M0C2T0 <> U26-M1C5T0 Data Latency : 58.3ns
U4-M0C2T0 <> U28-M1C6T0 Data Latency : 58.7ns
U4-M0C2T0 <> U30-M1C7T0 Data Latency : 58.7ns
U4-M0C2T0 <> U1-M0C0T1 Data Latency : 21.6ns
U4-M0C2T0 <> U3-M0C1T1 Data Latency : 20.7ns
U4-M0C2T0 <> U5-M0C2T1 Data Latency : 9.8ns
U4-M0C2T0 <> U7-M0C3T1 Data Latency : 19.7ns
U4-M0C2T0 <> U9-M0C4T1 Data Latency : 22.9ns
U4-M0C2T0 <> U11-M0C5T1 Data Latency : 20.4ns
U4-M0C2T0 <> U13-M0C6T1 Data Latency : 22.4ns
U4-M0C2T0 <> U15-M0C7T1 Data Latency : 21.1ns
U4-M0C2T0 <> U17-M1C0T1 Data Latency : 58.0ns
U4-M0C2T0 <> U19-M1C1T1 Data Latency : 58.0ns
U4-M0C2T0 <> U21-M1C2T1 Data Latency : 58.4ns
U4-M0C2T0 <> U23-M1C3T1 Data Latency : 57.7ns
U4-M0C2T0 <> U25-M1C4T1 Data Latency : 59.2ns
U4-M0C2T0 <> U27-M1C5T1 Data Latency : 58.3ns
U4-M0C2T0 <> U29-M1C6T1 Data Latency : 58.7ns
U4-M0C2T0 <> U31-M1C7T1 Data Latency : 58.6ns
U6-M0C3T0 <> U8-M0C4T0 Data Latency : 20.6ns
U6-M0C3T0 <> U10-M0C5T0 Data Latency : 20.8ns
U6-M0C3T0 <> U12-M0C6T0 Data Latency : 21.2ns
U6-M0C3T0 <> U14-M0C7T0 Data Latency : 20.8ns
U6-M0C3T0 <> U16-M1C0T0 Data Latency : 58.0ns
U6-M0C3T0 <> U18-M1C1T0 Data Latency : 57.7ns
U6-M0C3T0 <> U20-M1C2T0 Data Latency : 58.2ns
U6-M0C3T0 <> U22-M1C3T0 Data Latency : 57.5ns
U6-M0C3T0 <> U24-M1C4T0 Data Latency : 58.8ns
U6-M0C3T0 <> U26-M1C5T0 Data Latency : 58.2ns
U6-M0C3T0 <> U28-M1C6T0 Data Latency : 58.8ns
U6-M0C3T0 <> U30-M1C7T0 Data Latency : 58.5ns
U6-M0C3T0 <> U1-M0C0T1 Data Latency : 19.9ns
U6-M0C3T0 <> U3-M0C1T1 Data Latency : 20.3ns
U6-M0C3T0 <> U5-M0C2T1 Data Latency : 19.9ns
U6-M0C3T0 <> U7-M0C3T1 Data Latency : 9.8ns
U6-M0C3T0 <> U9-M0C4T1 Data Latency : 20.7ns
U6-M0C3T0 <> U11-M0C5T1 Data Latency : 20.7ns
U6-M0C3T0 <> U13-M0C6T1 Data Latency : 20.7ns
U6-M0C3T0 <> U15-M0C7T1 Data Latency : 20.8ns
U6-M0C3T0 <> U17-M1C0T1 Data Latency : 58.0ns
U6-M0C3T0 <> U19-M1C1T1 Data Latency : 57.6ns
U6-M0C3T0 <> U21-M1C2T1 Data Latency : 58.2ns
U6-M0C3T0 <> U23-M1C3T1 Data Latency : 57.5ns
U6-M0C3T0 <> U25-M1C4T1 Data Latency : 58.9ns
U6-M0C3T0 <> U27-M1C5T1 Data Latency : 58.3ns
U6-M0C3T0 <> U29-M1C6T1 Data Latency : 58.9ns
U6-M0C3T0 <> U31-M1C7T1 Data Latency : 58.5ns
U8-M0C4T0 <> U10-M0C5T0 Data Latency : 20.8ns
U8-M0C4T0 <> U12-M0C6T0 Data Latency : 22.7ns
U8-M0C4T0 <> U14-M0C7T0 Data Latency : 21.4ns
U8-M0C4T0 <> U16-M1C0T0 Data Latency : 58.4ns
U8-M0C4T0 <> U18-M1C1T0 Data Latency : 58.2ns
U8-M0C4T0 <> U20-M1C2T0 Data Latency : 59.0ns
U8-M0C4T0 <> U22-M1C3T0 Data Latency : 58.1ns
U8-M0C4T0 <> U24-M1C4T0 Data Latency : 59.6ns
U8-M0C4T0 <> U26-M1C5T0 Data Latency : 58.7ns
U8-M0C4T0 <> U28-M1C6T0 Data Latency : 59.2ns
U8-M0C4T0 <> U30-M1C7T0 Data Latency : 59.0ns
U8-M0C4T0 <> U1-M0C0T1 Data Latency : 21.7ns
U8-M0C4T0 <> U3-M0C1T1 Data Latency : 21.2ns
U8-M0C4T0 <> U5-M0C2T1 Data Latency : 23.1ns
U8-M0C4T0 <> U7-M0C3T1 Data Latency : 20.4ns
U8-M0C4T0 <> U9-M0C4T1 Data Latency : 9.5ns
U8-M0C4T0 <> U11-M0C5T1 Data Latency : 20.8ns
U8-M0C4T0 <> U13-M0C6T1 Data Latency : 22.8ns
U8-M0C4T0 <> U15-M0C7T1 Data Latency : 21.4ns
U8-M0C4T0 <> U17-M1C0T1 Data Latency : 58.4ns
U8-M0C4T0 <> U19-M1C1T1 Data Latency : 58.2ns
U8-M0C4T0 <> U21-M1C2T1 Data Latency : 58.9ns
U8-M0C4T0 <> U23-M1C3T1 Data Latency : 58.1ns
U8-M0C4T0 <> U25-M1C4T1 Data Latency : 59.7ns
U8-M0C4T0 <> U27-M1C5T1 Data Latency : 58.7ns
U8-M0C4T0 <> U29-M1C6T1 Data Latency : 59.2ns
U8-M0C4T0 <> U31-M1C7T1 Data Latency : 59.0ns
U10-M0C5T0 <> U12-M0C6T0 Data Latency : 21.0ns
U10-M0C5T0 <> U14-M0C7T0 Data Latency : 21.2ns
U10-M0C5T0 <> U16-M1C0T0 Data Latency : 58.5ns
U10-M0C5T0 <> U18-M1C1T0 Data Latency : 58.1ns
U10-M0C5T0 <> U20-M1C2T0 Data Latency : 58.5ns
U10-M0C5T0 <> U22-M1C3T0 Data Latency : 57.6ns
U10-M0C5T0 <> U24-M1C4T0 Data Latency : 59.4ns
U10-M0C5T0 <> U26-M1C5T0 Data Latency : 58.2ns
U10-M0C5T0 <> U28-M1C6T0 Data Latency : 59.1ns
U10-M0C5T0 <> U30-M1C7T0 Data Latency : 58.5ns
U10-M0C5T0 <> U1-M0C0T1 Data Latency : 20.2ns
U10-M0C5T0 <> U3-M0C1T1 Data Latency : 20.7ns
U10-M0C5T0 <> U5-M0C2T1 Data Latency : 20.6ns
U10-M0C5T0 <> U7-M0C3T1 Data Latency : 20.7ns
U10-M0C5T0 <> U9-M0C4T1 Data Latency : 20.9ns
U10-M0C5T0 <> U11-M0C5T1 Data Latency : 9.7ns
U10-M0C5T0 <> U13-M0C6T1 Data Latency : 21.0ns
U10-M0C5T0 <> U15-M0C7T1 Data Latency : 21.2ns
U10-M0C5T0 <> U17-M1C0T1 Data Latency : 58.4ns
U10-M0C5T0 <> U19-M1C1T1 Data Latency : 58.1ns
U10-M0C5T0 <> U21-M1C2T1 Data Latency : 58.6ns
U10-M0C5T0 <> U23-M1C3T1 Data Latency : 57.5ns
U10-M0C5T0 <> U25-M1C4T1 Data Latency : 59.4ns
U10-M0C5T0 <> U27-M1C5T1 Data Latency : 58.3ns
U10-M0C5T0 <> U29-M1C6T1 Data Latency : 59.2ns
U10-M0C5T0 <> U31-M1C7T1 Data Latency : 58.5ns
U12-M0C6T0 <> U14-M0C7T0 Data Latency : 21.0ns
U12-M0C6T0 <> U16-M1C0T0 Data Latency : 58.6ns
U12-M0C6T0 <> U18-M1C1T0 Data Latency : 58.4ns
U12-M0C6T0 <> U20-M1C2T0 Data Latency : 58.7ns
U12-M0C6T0 <> U22-M1C3T0 Data Latency : 57.9ns
U12-M0C6T0 <> U24-M1C4T0 Data Latency : 59.4ns
U12-M0C6T0 <> U26-M1C5T0 Data Latency : 58.8ns
U12-M0C6T0 <> U28-M1C6T0 Data Latency : 59.4ns
U12-M0C6T0 <> U30-M1C7T0 Data Latency : 59.4ns
U12-M0C6T0 <> U1-M0C0T1 Data Latency : 21.4ns
U12-M0C6T0 <> U3-M0C1T1 Data Latency : 20.7ns
U12-M0C6T0 <> U5-M0C2T1 Data Latency : 22.4ns
U12-M0C6T0 <> U7-M0C3T1 Data Latency : 20.5ns
U12-M0C6T0 <> U9-M0C4T1 Data Latency : 22.7ns
U12-M0C6T0 <> U11-M0C5T1 Data Latency : 20.9ns
U12-M0C6T0 <> U13-M0C6T1 Data Latency : 9.8ns
U12-M0C6T0 <> U15-M0C7T1 Data Latency : 21.0ns
U12-M0C6T0 <> U17-M1C0T1 Data Latency : 58.6ns
U12-M0C6T0 <> U19-M1C1T1 Data Latency : 58.5ns
U12-M0C6T0 <> U21-M1C2T1 Data Latency : 58.6ns
U12-M0C6T0 <> U23-M1C3T1 Data Latency : 58.0ns
U12-M0C6T0 <> U25-M1C4T1 Data Latency : 59.5ns
U12-M0C6T0 <> U27-M1C5T1 Data Latency : 58.9ns
U12-M0C6T0 <> U29-M1C6T1 Data Latency : 59.4ns
U12-M0C6T0 <> U31-M1C7T1 Data Latency : 59.4ns
U14-M0C7T0 <> U16-M1C0T0 Data Latency : 58.9ns
U14-M0C7T0 <> U18-M1C1T0 Data Latency : 58.2ns
U14-M0C7T0 <> U20-M1C2T0 Data Latency : 58.9ns
U14-M0C7T0 <> U22-M1C3T0 Data Latency : 57.7ns
U14-M0C7T0 <> U24-M1C4T0 Data Latency : 59.5ns
U14-M0C7T0 <> U26-M1C5T0 Data Latency : 58.5ns
U14-M0C7T0 <> U28-M1C6T0 Data Latency : 59.7ns
U14-M0C7T0 <> U30-M1C7T0 Data Latency : 59.1ns
U14-M0C7T0 <> U1-M0C0T1 Data Latency : 20.2ns
U14-M0C7T0 <> U3-M0C1T1 Data Latency : 20.4ns
U14-M0C7T0 <> U5-M0C2T1 Data Latency : 21.2ns
U14-M0C7T0 <> U7-M0C3T1 Data Latency : 20.6ns
U14-M0C7T0 <> U9-M0C4T1 Data Latency : 21.6ns
U14-M0C7T0 <> U11-M0C5T1 Data Latency : 21.2ns
U14-M0C7T0 <> U13-M0C6T1 Data Latency : 21.1ns
U14-M0C7T0 <> U15-M0C7T1 Data Latency : 9.6ns
U14-M0C7T0 <> U17-M1C0T1 Data Latency : 58.9ns
U14-M0C7T0 <> U19-M1C1T1 Data Latency : 58.2ns
U14-M0C7T0 <> U21-M1C2T1 Data Latency : 58.9ns
U14-M0C7T0 <> U23-M1C3T1 Data Latency : 57.7ns
U14-M0C7T0 <> U25-M1C4T1 Data Latency : 59.5ns
U14-M0C7T0 <> U27-M1C5T1 Data Latency : 58.4ns
U14-M0C7T0 <> U29-M1C6T1 Data Latency : 59.6ns
U14-M0C7T0 <> U31-M1C7T1 Data Latency : 59.1ns
U16-M1C0T0 <> U18-M1C1T0 Data Latency : 19.4ns
U16-M1C0T0 <> U20-M1C2T0 Data Latency : 21.4ns
U16-M1C0T0 <> U22-M1C3T0 Data Latency : 19.4ns
U16-M1C0T0 <> U24-M1C4T0 Data Latency : 22.4ns
U16-M1C0T0 <> U26-M1C5T0 Data Latency : 20.1ns
U16-M1C0T0 <> U28-M1C6T0 Data Latency : 21.4ns
U16-M1C0T0 <> U30-M1C7T0 Data Latency : 20.3ns
U16-M1C0T0 <> U1-M0C0T1 Data Latency : 58.3ns
U16-M1C0T0 <> U3-M0C1T1 Data Latency : 58.1ns
U16-M1C0T0 <> U5-M0C2T1 Data Latency : 58.4ns
U16-M1C0T0 <> U7-M0C3T1 Data Latency : 57.7ns
U16-M1C0T0 <> U9-M0C4T1 Data Latency : 58.7ns
U16-M1C0T0 <> U11-M0C5T1 Data Latency : 58.1ns
U16-M1C0T0 <> U13-M0C6T1 Data Latency : 58.8ns
U16-M1C0T0 <> U15-M0C7T1 Data Latency : 58.6ns
U16-M1C0T0 <> U17-M1C0T1 Data Latency : 9.7ns
U16-M1C0T0 <> U19-M1C1T1 Data Latency : 19.4ns
U16-M1C0T0 <> U21-M1C2T1 Data Latency : 21.4ns
U16-M1C0T0 <> U23-M1C3T1 Data Latency : 19.4ns
U16-M1C0T0 <> U25-M1C4T1 Data Latency : 22.4ns
U16-M1C0T0 <> U27-M1C5T1 Data Latency : 20.1ns
U16-M1C0T0 <> U29-M1C6T1 Data Latency : 21.4ns
U16-M1C0T0 <> U31-M1C7T1 Data Latency : 20.3ns
U18-M1C1T0 <> U20-M1C2T0 Data Latency : 20.4ns
U18-M1C1T0 <> U22-M1C3T0 Data Latency : 19.8ns
U18-M1C1T0 <> U24-M1C4T0 Data Latency : 21.1ns
U18-M1C1T0 <> U26-M1C5T0 Data Latency : 20.4ns
U18-M1C1T0 <> U28-M1C6T0 Data Latency : 20.3ns
U18-M1C1T0 <> U30-M1C7T0 Data Latency : 20.3ns
U18-M1C1T0 <> U1-M0C0T1 Data Latency : 57.9ns
U18-M1C1T0 <> U3-M0C1T1 Data Latency : 58.0ns
U18-M1C1T0 <> U5-M0C2T1 Data Latency : 58.4ns
U18-M1C1T0 <> U7-M0C3T1 Data Latency : 57.1ns
U18-M1C1T0 <> U9-M0C4T1 Data Latency : 58.7ns
U18-M1C1T0 <> U11-M0C5T1 Data Latency : 57.4ns
U18-M1C1T0 <> U13-M0C6T1 Data Latency : 58.6ns
U18-M1C1T0 <> U15-M0C7T1 Data Latency : 58.1ns
U18-M1C1T0 <> U17-M1C0T1 Data Latency : 19.4ns
U18-M1C1T0 <> U19-M1C1T1 Data Latency : 9.7ns
U18-M1C1T0 <> U21-M1C2T1 Data Latency : 20.4ns
U18-M1C1T0 <> U23-M1C3T1 Data Latency : 19.8ns
U18-M1C1T0 <> U25-M1C4T1 Data Latency : 21.1ns
U18-M1C1T0 <> U27-M1C5T1 Data Latency : 20.4ns
U18-M1C1T0 <> U29-M1C6T1 Data Latency : 20.3ns
U18-M1C1T0 <> U31-M1C7T1 Data Latency : 20.2ns
U20-M1C2T0 <> U22-M1C3T0 Data Latency : 19.6ns
U20-M1C2T0 <> U24-M1C4T0 Data Latency : 22.8ns
U20-M1C2T0 <> U26-M1C5T0 Data Latency : 20.1ns
U20-M1C2T0 <> U28-M1C6T0 Data Latency : 22.2ns
U20-M1C2T0 <> U30-M1C7T0 Data Latency : 20.9ns
U20-M1C2T0 <> U1-M0C0T1 Data Latency : 58.0ns
U20-M1C2T0 <> U3-M0C1T1 Data Latency : 58.5ns
U20-M1C2T0 <> U5-M0C2T1 Data Latency : 58.5ns
U20-M1C2T0 <> U7-M0C3T1 Data Latency : 58.0ns
U20-M1C2T0 <> U9-M0C4T1 Data Latency : 58.6ns
U20-M1C2T0 <> U11-M0C5T1 Data Latency : 58.2ns
U20-M1C2T0 <> U13-M0C6T1 Data Latency : 58.7ns
U20-M1C2T0 <> U15-M0C7T1 Data Latency : 58.6ns
U20-M1C2T0 <> U17-M1C0T1 Data Latency : 21.4ns
U20-M1C2T0 <> U19-M1C1T1 Data Latency : 20.3ns
U20-M1C2T0 <> U21-M1C2T1 Data Latency : 9.7ns
U20-M1C2T0 <> U23-M1C3T1 Data Latency : 19.5ns
U20-M1C2T0 <> U25-M1C4T1 Data Latency : 22.8ns
U20-M1C2T0 <> U27-M1C5T1 Data Latency : 20.1ns
U20-M1C2T0 <> U29-M1C6T1 Data Latency : 22.1ns
U20-M1C2T0 <> U31-M1C7T1 Data Latency : 20.9ns
U22-M1C3T0 <> U24-M1C4T0 Data Latency : 20.6ns
U22-M1C3T0 <> U26-M1C5T0 Data Latency : 20.5ns
U22-M1C3T0 <> U28-M1C6T0 Data Latency : 20.5ns
U22-M1C3T0 <> U30-M1C7T0 Data Latency : 20.6ns
U22-M1C3T0 <> U1-M0C0T1 Data Latency : 57.6ns
U22-M1C3T0 <> U3-M0C1T1 Data Latency : 58.0ns
U22-M1C3T0 <> U5-M0C2T1 Data Latency : 58.2ns
U22-M1C3T0 <> U7-M0C3T1 Data Latency : 57.2ns
U22-M1C3T0 <> U9-M0C4T1 Data Latency : 58.6ns
U22-M1C3T0 <> U11-M0C5T1 Data Latency : 57.5ns
U22-M1C3T0 <> U13-M0C6T1 Data Latency : 58.3ns
U22-M1C3T0 <> U15-M0C7T1 Data Latency : 57.9ns
U22-M1C3T0 <> U17-M1C0T1 Data Latency : 19.7ns
U22-M1C3T0 <> U19-M1C1T1 Data Latency : 19.8ns
U22-M1C3T0 <> U21-M1C2T1 Data Latency : 19.7ns
U22-M1C3T0 <> U23-M1C3T1 Data Latency : 9.7ns
U22-M1C3T0 <> U25-M1C4T1 Data Latency : 20.6ns
U22-M1C3T0 <> U27-M1C5T1 Data Latency : 20.5ns
U22-M1C3T0 <> U29-M1C6T1 Data Latency : 20.7ns
U22-M1C3T0 <> U31-M1C7T1 Data Latency : 20.6ns
U24-M1C4T0 <> U26-M1C5T0 Data Latency : 21.1ns
U24-M1C4T0 <> U28-M1C6T0 Data Latency : 22.9ns
U24-M1C4T0 <> U30-M1C7T0 Data Latency : 21.6ns
U24-M1C4T0 <> U1-M0C0T1 Data Latency : 58.7ns
U24-M1C4T0 <> U3-M0C1T1 Data Latency : 59.5ns
U24-M1C4T0 <> U5-M0C2T1 Data Latency : 59.0ns
U24-M1C4T0 <> U7-M0C3T1 Data Latency : 58.6ns
U24-M1C4T0 <> U9-M0C4T1 Data Latency : 59.4ns
U24-M1C4T0 <> U11-M0C5T1 Data Latency : 58.9ns
U24-M1C4T0 <> U13-M0C6T1 Data Latency : 59.5ns
U24-M1C4T0 <> U15-M0C7T1 Data Latency : 59.4ns
U24-M1C4T0 <> U17-M1C0T1 Data Latency : 22.1ns
U24-M1C4T0 <> U19-M1C1T1 Data Latency : 21.1ns
U24-M1C4T0 <> U21-M1C2T1 Data Latency : 23.0ns
U24-M1C4T0 <> U23-M1C3T1 Data Latency : 20.4ns
U24-M1C4T0 <> U25-M1C4T1 Data Latency : 9.8ns
U24-M1C4T0 <> U27-M1C5T1 Data Latency : 21.1ns
U24-M1C4T0 <> U29-M1C6T1 Data Latency : 22.9ns
U24-M1C4T0 <> U31-M1C7T1 Data Latency : 21.6ns
U26-M1C5T0 <> U28-M1C6T0 Data Latency : 20.9ns
U26-M1C5T0 <> U30-M1C7T0 Data Latency : 21.3ns
U26-M1C5T0 <> U1-M0C0T1 Data Latency : 58.2ns
U26-M1C5T0 <> U3-M0C1T1 Data Latency : 58.6ns
U26-M1C5T0 <> U5-M0C2T1 Data Latency : 58.8ns
U26-M1C5T0 <> U7-M0C3T1 Data Latency : 58.0ns
U26-M1C5T0 <> U9-M0C4T1 Data Latency : 59.2ns
U26-M1C5T0 <> U11-M0C5T1 Data Latency : 58.0ns
U26-M1C5T0 <> U13-M0C6T1 Data Latency : 59.0ns
U26-M1C5T0 <> U15-M0C7T1 Data Latency : 58.5ns
U26-M1C5T0 <> U17-M1C0T1 Data Latency : 20.2ns
U26-M1C5T0 <> U19-M1C1T1 Data Latency : 20.4ns
U26-M1C5T0 <> U21-M1C2T1 Data Latency : 20.4ns
U26-M1C5T0 <> U23-M1C3T1 Data Latency : 20.5ns
U26-M1C5T0 <> U25-M1C4T1 Data Latency : 21.1ns
U26-M1C5T0 <> U27-M1C5T1 Data Latency : 9.7ns
U26-M1C5T0 <> U29-M1C6T1 Data Latency : 20.9ns
U26-M1C5T0 <> U31-M1C7T1 Data Latency : 21.3ns
U28-M1C6T0 <> U30-M1C7T0 Data Latency : 20.9ns
U28-M1C6T0 <> U1-M0C0T1 Data Latency : 58.9ns
U28-M1C6T0 <> U3-M0C1T1 Data Latency : 59.1ns
U28-M1C6T0 <> U5-M0C2T1 Data Latency : 59.2ns
U28-M1C6T0 <> U7-M0C3T1 Data Latency : 58.5ns
U28-M1C6T0 <> U9-M0C4T1 Data Latency : 59.3ns
U28-M1C6T0 <> U11-M0C5T1 Data Latency : 58.7ns
U28-M1C6T0 <> U13-M0C6T1 Data Latency : 59.5ns
U28-M1C6T0 <> U15-M0C7T1 Data Latency : 59.3ns
U28-M1C6T0 <> U17-M1C0T1 Data Latency : 21.4ns
U28-M1C6T0 <> U19-M1C1T1 Data Latency : 20.3ns
U28-M1C6T0 <> U21-M1C2T1 Data Latency : 22.2ns
U28-M1C6T0 <> U23-M1C3T1 Data Latency : 20.2ns
U28-M1C6T0 <> U25-M1C4T1 Data Latency : 22.9ns
U28-M1C6T0 <> U27-M1C5T1 Data Latency : 20.9ns
U28-M1C6T0 <> U29-M1C6T1 Data Latency : 9.8ns
U28-M1C6T0 <> U31-M1C7T1 Data Latency : 20.9ns
U30-M1C7T0 <> U1-M0C0T1 Data Latency : 58.5ns
U30-M1C7T0 <> U3-M0C1T1 Data Latency : 58.7ns
U30-M1C7T0 <> U5-M0C2T1 Data Latency : 59.0ns
U30-M1C7T0 <> U7-M0C3T1 Data Latency : 58.0ns
U30-M1C7T0 <> U9-M0C4T1 Data Latency : 59.5ns
U30-M1C7T0 <> U11-M0C5T1 Data Latency : 58.3ns
U30-M1C7T0 <> U13-M0C6T1 Data Latency : 59.4ns
U30-M1C7T0 <> U15-M0C7T1 Data Latency : 58.9ns
U30-M1C7T0 <> U17-M1C0T1 Data Latency : 20.2ns
U30-M1C7T0 <> U19-M1C1T1 Data Latency : 20.3ns
U30-M1C7T0 <> U21-M1C2T1 Data Latency : 21.0ns
U30-M1C7T0 <> U23-M1C3T1 Data Latency : 20.4ns
U30-M1C7T0 <> U25-M1C4T1 Data Latency : 21.8ns
U30-M1C7T0 <> U27-M1C5T1 Data Latency : 21.2ns
U30-M1C7T0 <> U29-M1C6T1 Data Latency : 21.1ns
U30-M1C7T0 <> U31-M1C7T1 Data Latency : 9.8ns
U1-M0C0T1 <> U3-M0C1T1 Data Latency : 19.6ns
U1-M0C0T1 <> U5-M0C2T1 Data Latency : 21.6ns
U1-M0C0T1 <> U7-M0C3T1 Data Latency : 19.6ns
U1-M0C0T1 <> U9-M0C4T1 Data Latency : 22.0ns
U1-M0C0T1 <> U11-M0C5T1 Data Latency : 20.0ns
U1-M0C0T1 <> U13-M0C6T1 Data Latency : 21.4ns
U1-M0C0T1 <> U15-M0C7T1 Data Latency : 20.2ns
U1-M0C0T1 <> U17-M1C0T1 Data Latency : 57.9ns
U1-M0C0T1 <> U19-M1C1T1 Data Latency : 57.7ns
U1-M0C0T1 <> U21-M1C2T1 Data Latency : 57.8ns
U1-M0C0T1 <> U23-M1C3T1 Data Latency : 57.3ns
U1-M0C0T1 <> U25-M1C4T1 Data Latency : 58.8ns
U1-M0C0T1 <> U27-M1C5T1 Data Latency : 57.9ns
U1-M0C0T1 <> U29-M1C6T1 Data Latency : 58.6ns
U1-M0C0T1 <> U31-M1C7T1 Data Latency : 58.5ns
U3-M0C1T1 <> U5-M0C2T1 Data Latency : 20.8ns
U3-M0C1T1 <> U7-M0C3T1 Data Latency : 20.1ns
U3-M0C1T1 <> U9-M0C4T1 Data Latency : 21.3ns
U3-M0C1T1 <> U11-M0C5T1 Data Latency : 20.6ns
U3-M0C1T1 <> U13-M0C6T1 Data Latency : 20.6ns
U3-M0C1T1 <> U15-M0C7T1 Data Latency : 20.6ns
U3-M0C1T1 <> U17-M1C0T1 Data Latency : 58.4ns
U3-M0C1T1 <> U19-M1C1T1 Data Latency : 58.4ns
U3-M0C1T1 <> U21-M1C2T1 Data Latency : 58.8ns
U3-M0C1T1 <> U23-M1C3T1 Data Latency : 57.7ns
U3-M0C1T1 <> U25-M1C4T1 Data Latency : 59.3ns
U3-M0C1T1 <> U27-M1C5T1 Data Latency : 58.6ns
U3-M0C1T1 <> U29-M1C6T1 Data Latency : 59.3ns
U3-M0C1T1 <> U31-M1C7T1 Data Latency : 59.0ns
U5-M0C2T1 <> U7-M0C3T1 Data Latency : 19.8ns
U5-M0C2T1 <> U9-M0C4T1 Data Latency : 22.9ns
U5-M0C2T1 <> U11-M0C5T1 Data Latency : 20.4ns
U5-M0C2T1 <> U13-M0C6T1 Data Latency : 22.4ns
U5-M0C2T1 <> U15-M0C7T1 Data Latency : 21.1ns
U5-M0C2T1 <> U17-M1C0T1 Data Latency : 58.0ns
U5-M0C2T1 <> U19-M1C1T1 Data Latency : 58.0ns
U5-M0C2T1 <> U21-M1C2T1 Data Latency : 58.3ns
U5-M0C2T1 <> U23-M1C3T1 Data Latency : 57.7ns
U5-M0C2T1 <> U25-M1C4T1 Data Latency : 59.1ns
U5-M0C2T1 <> U27-M1C5T1 Data Latency : 58.4ns
U5-M0C2T1 <> U29-M1C6T1 Data Latency : 58.8ns
U5-M0C2T1 <> U31-M1C7T1 Data Latency : 58.7ns
U7-M0C3T1 <> U9-M0C4T1 Data Latency : 20.7ns
U7-M0C3T1 <> U11-M0C5T1 Data Latency : 20.8ns
U7-M0C3T1 <> U13-M0C6T1 Data Latency : 20.9ns
U7-M0C3T1 <> U15-M0C7T1 Data Latency : 20.8ns
U7-M0C3T1 <> U17-M1C0T1 Data Latency : 58.0ns
U7-M0C3T1 <> U19-M1C1T1 Data Latency : 57.7ns
U7-M0C3T1 <> U21-M1C2T1 Data Latency : 58.3ns
U7-M0C3T1 <> U23-M1C3T1 Data Latency : 57.5ns
U7-M0C3T1 <> U25-M1C4T1 Data Latency : 58.8ns
U7-M0C3T1 <> U27-M1C5T1 Data Latency : 58.4ns
U7-M0C3T1 <> U29-M1C6T1 Data Latency : 58.8ns
U7-M0C3T1 <> U31-M1C7T1 Data Latency : 58.5ns
U9-M0C4T1 <> U11-M0C5T1 Data Latency : 20.8ns
U9-M0C4T1 <> U13-M0C6T1 Data Latency : 22.8ns
U9-M0C4T1 <> U15-M0C7T1 Data Latency : 21.4ns
U9-M0C4T1 <> U17-M1C0T1 Data Latency : 58.4ns
U9-M0C4T1 <> U19-M1C1T1 Data Latency : 58.2ns
U9-M0C4T1 <> U21-M1C2T1 Data Latency : 58.9ns
U9-M0C4T1 <> U23-M1C3T1 Data Latency : 58.1ns
U9-M0C4T1 <> U25-M1C4T1 Data Latency : 59.7ns
U9-M0C4T1 <> U27-M1C5T1 Data Latency : 58.6ns
U9-M0C4T1 <> U29-M1C6T1 Data Latency : 59.3ns
U9-M0C4T1 <> U31-M1C7T1 Data Latency : 59.0ns
U11-M0C5T1 <> U13-M0C6T1 Data Latency : 21.0ns
U11-M0C5T1 <> U15-M0C7T1 Data Latency : 21.2ns
U11-M0C5T1 <> U17-M1C0T1 Data Latency : 58.4ns
U11-M0C5T1 <> U19-M1C1T1 Data Latency : 58.1ns
U11-M0C5T1 <> U21-M1C2T1 Data Latency : 58.6ns
U11-M0C5T1 <> U23-M1C3T1 Data Latency : 57.5ns
U11-M0C5T1 <> U25-M1C4T1 Data Latency : 59.3ns
U11-M0C5T1 <> U27-M1C5T1 Data Latency : 58.2ns
U11-M0C5T1 <> U29-M1C6T1 Data Latency : 59.1ns
U11-M0C5T1 <> U31-M1C7T1 Data Latency : 58.5ns
U13-M0C6T1 <> U15-M0C7T1 Data Latency : 21.0ns
U13-M0C6T1 <> U17-M1C0T1 Data Latency : 58.6ns
U13-M0C6T1 <> U19-M1C1T1 Data Latency : 58.4ns
U13-M0C6T1 <> U21-M1C2T1 Data Latency : 58.7ns
U13-M0C6T1 <> U23-M1C3T1 Data Latency : 58.1ns
U13-M0C6T1 <> U25-M1C4T1 Data Latency : 59.4ns
U13-M0C6T1 <> U27-M1C5T1 Data Latency : 58.7ns
U13-M0C6T1 <> U29-M1C6T1 Data Latency : 59.4ns
U13-M0C6T1 <> U31-M1C7T1 Data Latency : 59.4ns
U15-M0C7T1 <> U17-M1C0T1 Data Latency : 58.9ns
U15-M0C7T1 <> U19-M1C1T1 Data Latency : 58.2ns
U15-M0C7T1 <> U21-M1C2T1 Data Latency : 58.8ns
U15-M0C7T1 <> U23-M1C3T1 Data Latency : 57.7ns
U15-M0C7T1 <> U25-M1C4T1 Data Latency : 59.7ns
U15-M0C7T1 <> U27-M1C5T1 Data Latency : 58.5ns
U15-M0C7T1 <> U29-M1C6T1 Data Latency : 59.6ns
U15-M0C7T1 <> U31-M1C7T1 Data Latency : 59.1ns
U17-M1C0T1 <> U19-M1C1T1 Data Latency : 19.4ns
U17-M1C0T1 <> U21-M1C2T1 Data Latency : 21.4ns
U17-M1C0T1 <> U23-M1C3T1 Data Latency : 19.5ns
U17-M1C0T1 <> U25-M1C4T1 Data Latency : 22.3ns
U17-M1C0T1 <> U27-M1C5T1 Data Latency : 20.1ns
U17-M1C0T1 <> U29-M1C6T1 Data Latency : 21.4ns
U17-M1C0T1 <> U31-M1C7T1 Data Latency : 20.3ns
U19-M1C1T1 <> U21-M1C2T1 Data Latency : 20.3ns
U19-M1C1T1 <> U23-M1C3T1 Data Latency : 19.7ns
U19-M1C1T1 <> U25-M1C4T1 Data Latency : 21.1ns
U19-M1C1T1 <> U27-M1C5T1 Data Latency : 20.4ns
U19-M1C1T1 <> U29-M1C6T1 Data Latency : 20.3ns
U19-M1C1T1 <> U31-M1C7T1 Data Latency : 20.2ns
U21-M1C2T1 <> U23-M1C3T1 Data Latency : 19.6ns
U21-M1C2T1 <> U25-M1C4T1 Data Latency : 22.8ns
U21-M1C2T1 <> U27-M1C5T1 Data Latency : 20.1ns
U21-M1C2T1 <> U29-M1C6T1 Data Latency : 22.1ns
U21-M1C2T1 <> U31-M1C7T1 Data Latency : 20.9ns
U23-M1C3T1 <> U25-M1C4T1 Data Latency : 20.6ns
U23-M1C3T1 <> U27-M1C5T1 Data Latency : 20.5ns
U23-M1C3T1 <> U29-M1C6T1 Data Latency : 20.6ns
U23-M1C3T1 <> U31-M1C7T1 Data Latency : 20.6ns
U25-M1C4T1 <> U27-M1C5T1 Data Latency : 21.1ns
U25-M1C4T1 <> U29-M1C6T1 Data Latency : 22.9ns
U25-M1C4T1 <> U31-M1C7T1 Data Latency : 21.6ns
U27-M1C5T1 <> U29-M1C6T1 Data Latency : 20.9ns
U27-M1C5T1 <> U31-M1C7T1 Data Latency : 21.3ns
U29-M1C6T1 <> U31-M1C7T1 Data Latency : 20.9ns
1x 64bytes Blocks Bandwidth : 26.57GB/s
4x 64bytes Blocks Bandwidth : 29.2GB/s
4x 256bytes Blocks Bandwidth : 103.48GB/s
4x 1kB Blocks Bandwidth : 324GB/s
4x 4kB Blocks Bandwidth : 522GB/s
16x 4kB Blocks Bandwidth : 669.66GB/s
4x 64kB Blocks Bandwidth : 1001.73GB/s
16x 64kB Blocks Bandwidth : 612.24GB/s
8x 256kB Blocks Bandwidth : 600.25GB/s
4x 1MB Blocks Bandwidth : 608.21GB/s
16x 1MB Blocks Bandwidth : 22.37GB/s
8x 4MB Blocks Bandwidth : 18.56GB/s

Benchmark Status
Result ID : AMD Ryzen 9 5950X 16-Core Processor (2M 16C 32T 4.92GHz, 1.9GHz IMC, 16x 512kB L2, 2x 32MB L3)
Microcode : A20F10-1009
Computer : MSI MS-7D13 (MSI MEG B550 UNIFY-X (MS-7D13))
Platform Compliance : x64
No. Threads : 32
System Timer : 10MHz
Page Size : 2MB

Processor
Model : AMD Ryzen 9 5950X 16-Core Processor
URL : https://www.amd.com
Speed : 4.92GHz
Min/Max/Turbo Speed : 2.2GHz - 3.4GHz - 4.92GHz
Modules per Processor : 2 Unit(s)
Cores per Processor : 8 Unit(s)
Threads per Core : 2 Unit(s)
Front-Side Bus Speed : 100MHz
Revision/Stepping : 21 / 0
Microcode : A20F10-1009
L1D (1st Level) Data Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L1I (1st Level) Code Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L2 (2nd Level) Data/Unified Cache : 16x 512kB, 8-Way, Fully Inclusive, 64bytes Line Size, 2 Thread(s)
L3 (3rd Level) Data/Unified Cache : 2x 32MB, 16-Way, Exclusive, 64bytes Line Size, 16 Thread(s)
Rated Power (TDP) : 105.00W

Memory Controller
Speed : 1.9GHz (100%)
Min/Max/Turbo Speed : 950MHz - 1.9GHz

Performance Enhancing Tips
Notice 242 : Dynamic OverClocking/Turbo engaged. Environment conditions may influence performance.
Tip 3 : Double-click tip or press Enter while a tip is selected for more information about the tip.
 
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This link will show all my BIOS settings for the Unify-X A210 BIOS, the last unlocked one we got as far as I know.

 

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B550 AORUS MASTER, 3700X, 32GB g.Skill DDR4-3200 (@3800MT/s; 14-14-14-28), XFX RX 5500 XT
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69 Posts
this TM5 profile based upon 1usmus_v3 ?
Because for example Anta's profile , the error numbers differ fully and mean something completely different
CsOdtDrvStr got a bump between 30-40ohm , in order to work against the broken memory training since AGESA 1.1.0.0A
After Patch C , it got worse and worse / this was about the correct option, to get it towards a useable setting
It's not fitting for Matisse.
There the hard work of 1usmus from the DRAM calculator works blindly

ClkDrvStr bump still is a good method to help lowering procODT and getting GDM off
Which btw is too high for you
in combination with high ClkDrvStr, it might be too much for the PCB and you can "PCB Crash" - IF the errors mean the same which they do on Yuri's preset

Matisse's procODT range was:
28-32ohm for 2x8GB SR
34-36ohm for Dual Rank or 4x8Gb
34~ for Rev.E or Micron B-Die
30-32 for Hynix-MFR or AFR (CJR should be fine within 30)
Overall it's too high.

The minimum & optimal value at 900-950-1050 (1900FCLK) on Matisse was 28ohm with B-dies, and anything else a tad higher.
But not 3 steps higher like you do run atm.
It also needed the UncoreOC flag inside AMD OVERCLOCKING enabled, else FIT was autocorrecting the voltage you set and ignore it fully
(a long story with buggy Dynamic FCLK & Dynamic SOC)

Another thing is that you run tRAS+2.
If you want to move inside JEDEC's range, you need to use +4 for SR ~ or don' follow it and run tRCD+tRCD (28)
tRC "technically optimally" would remain that 32+tRP.
That under *8 multiplier from my anchor's would be 368-273-168, with tWR 16 (8.421111....to the infinite)

But JEDEC up to which revision out of the 30+ , you refer to - doesn't always define what has to work.
It's not recommend to follow it like a holy book. Especially when this holy book had over 30 revisions :)

I'm also a bit conflicted with your tWRRD & tWTR set
4-12 should run, but i can't recommend stuff blindly without double-testing SD,DD relationship here.
Try to get it stable under SLC 4-4 , with your current setting and bump up tRRD & tWTR (5-14) , till you have something that passes at least 20 cycles TM5
(or anything that takes longer than 1h to test ~ soo you hit thermal equilibrium & still have a full cycle to test)

RTT 7/0/6 is a bit special
Combine it please with tCKE 9
It does work also for Matisse, but CAD_BUS SETUP timings could missmatch
I think what you surely want, is to drop VDDG IOD a bit near that 1v range or even 950mV with procODT max 32ohm
32ohm shouldn't allow you to run VDDG IOD to 950mV but 28ohm will !
ClkDrvStr doesn't care about it, you can keep running 40 or 60ohm there ~ just have in your backhead, that it is a (A) multiplier , soo if you want to increase RTT_PARK strengthness for example /6 or /5, lower it down to 40ohm instead of 60 (for single rank) . Or lower VDIMM down :)

About Matisse,
24-20-20-24 is what works , similar for Zen 1
24-20-24-24 should be used on lower quality PCBs to prevent cold boot issues, but higher than 24 is not needed on any board for Matisse and lower
30-20-20-24 is fine, same as 40-20-20-24 is fine
60-20-20-24 is a bit conflicting but can work out , it's just a bit harsh . You may need 60-20-20-20, but you'll figure it out

SOC beyond 1.1v here has bad effects and increases procODT requirements.
Up till 1.15v is usually the range after when negative scaling begins
But i want to remind, that 1900 FCLK on Matisse was hard and it still suffered from bad signal integrity ranges
Soo lower procODT = higher FCLK (1900 lock, but 1900 didn't run on every CPU)
Focus on that 28ohm range, and stay at 900mV cLDO_VDDP
950mV is not fine with 28ohm proc, same as beyond 1.1v is not fine with it.
1900 FCLK bruteforce settings are 32ohm proc, 950-1050-1100-1150 (cLDO_VDDP, VDDG CCD , VDDG IOD, VSOC [GET])
* stepping on Matisse was 50mV on stock or 75mV on extreme bruteforce settings
More about it here:
Buttom part of the message
AMDs minimum limits are 42-43mV (ty The Stilt) , but you want to have at least 48mV difference between the GET settings between VDDP, VDDG and VSOC

I have a bit of an issue with anytype of "fixed real world timed" values
There was a ruleset out there spreading on the Intel MemOC thread, about tWR being a 8ns value as absolute minimum
This can not work. Memory is logarithmic and works on integers
No real world timed value is correct - as it scales up and down depending on set MCLK and the Command Rate state (PowerDown and GDM rounding included)

This is not optimal, and i strongly try to skip math that considers any type of fixed ns value. This can not work and won't work.
Rounding decimal numbers is also not optimal, same as focusing on fixed ns tRFC value is strongly not considerable
Been through this, and one of the reasons that tRFC mini module exists

Technically tRAS + XYZ (4,8) or tRC+1,2,4,8
used as integer values of tRC as a whole (half cycle, 1/8th of a cycle and so on) - was an option for stability and matching up things.
But it's also not optimal to do math that way
No XYZ + fixed ns value , is optimal
It works when you use added "memory timing" value, as it will turn at the end still to a .xxxxxxx (11 decimals) value
But if we speak about ns math, that's not a good method
Every little rounding stacks ~ beginning with board manufactures and IMC firmware developer rounding 3733.33333333337 MT/s, values
The math breaks, the more you round and tRFC 2 and 4 do fully break if you do it with the /1.346 & /2.1875 math
* reason why tRFC mini module exists, against Yuri's DRAM Calculator method, it always got tRFC2 & 4 wrong but it wasn't his fault but the user who inputs the wrong ns value
Even the windows calculator doesn't function beyond 11 decimals, while google docs ends at 13 decimals

I need to sit with you and write a book about everything that's wrong with how we scale MCLK and boards predict values
But trust me that a lot of thought went into "tRFC Mini" , and the way that it functions at version v2.31. It had undergone many revisions since v0.1 & yet is not perfect, because i can not generate tSTAG out of thin air, to match it better & have no statistic range for temperature to ns delay failure.

We'll talk someday about the reason i abandoned fully anything JEDEC related.
Because this holy book did not follow reality
A fantastic description was this post by an older dram engineer
137,438,953,472 memory cells won't always follow perfect tRC (tRAS+tRP) math, it's not possible to follow it blindly
But it's still a good indicator if the "transition" is "clean" or not, on a users set ~ or it needs work somewhere else, as tRC added delay does mask issues :)
* need to answer Ron too, but it requires another big wall of text, soo someday later
@Veii

Dude, thank you so much for taking your time to help me (and all others reading your posts) to learn more and more with each logon

Yes, the TM5 config is the "1usmus default" config file

I changed the number of cycles and I rename them to display where I obtained the files from so I'll more easily recognize what config I'm using while testing... Sorry for any confusion!

I'm still caught up with my day-to-day right now but I wanted to reply here to thank you and let you know that I'll reply more thoroughly ASAP

Here's a screenshot of my current work-in-progress that reflects the changes I've made in accordance with your guidance...

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Take care! Again... Thank you!!!
 

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This link will show all my BIOS settings for the Unify-X A210 BIOS, the last unlocked one we got as far as I know.

Thanks a lot!
Very interesting indeed, you gained a lot of bandwidth but lost latency; I score around 54.4-54.5ns on both profiles.
But with the low tRAS version frequently drops to 54.7-55.x, like something didn't finish in time and got a retry.
Curious to see what makes the difference, maybe the memory interleave size at 512 bytes.

Yes A21O is the latest. Was waiting for something new but it's not coming out.
I regretted moving to A22, I thought it wouldn't take that much to get a new one.
But I'm lazy and I don't want to re-create all the profile, it's so annoying...
 
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The 19-21 was suggested to me by someone and I find it a bit easier to get stable and a bit better in benchmarks. Technically it should be 21-21 but I find 19-21 benches a bit better. I changed the SCLs to 4 and lowered the ProODT to 40 and the ClkDrStr to 40, this passes TM5, SCLs at 2 doesn't. 1.2v on SoC is the highest I'll go but I've seen people running as high as 1.25v.

From what I understand 5000 series chips have good tolerance for higher voltages, it's 3000 series you want to keep lower.

Edit: I actually get a better score on AIDA64 and Sandra multi-core efficiency with SCLs at 4 instead of 2.
Hi! I’m just trying with your new values.. and yes, I notice an increase in the read speed. Now I’m testing with y-cruncher all test.. then I’ll run TM5 again. Pretty good!

Reading your BIOS config, what I like in comparison to the Asus because MSI have more options, I’d like to know some of your settings, why you apply an undervolt to the CPU? Your curve seems very tight.

The other question is about the LLC, I saw that you have CPU and VSoc at level 2, and also a the CPU VRM and VDDSOC switching frequency set to 1000. In my case I leave CPU LLC to Auto, knowing that many of us are running at level 3, and the CPU VRM and VVDSoc VRM Sw Freq both set to 500. So the question is, it’s better to have the LLC at level 2 and increase the SW Freq to 1000? never saw this on an Asus Mobo.

My concern and the reason why I’m asking this to you is because as we are using a high VSOC value I guess should have a low LLC, I read this from Yuri. And he also recommend the SW Freq to 500 on his Dark Hero. Should I lower both LLC to 2?
And also about the CPU core negative offset with a good curve as you have.. don’t go to lower on idle? I though that I should have use a positive offset to compensate the curve..

Thanks!




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Hello guys, need advice
on my b550 taichi + ryzen 5950x + 4x32gb F4-3200C16Q-128GVK (hynix MJR) i can get stable overclock memory at 3533Mhz (dram v1.422, vsoc 1.12 llc1, vddg's auto) maximum, all what above (3600,3666,3733) not stable. played with cad bus, proc's, increased voltages dram to 1.462, soc to 1.2, vddg's to 1.15, vppm to 2.7, vdd to 1.9 but nothing, not stable. I Can pass karhu 1h (even 3 hours) or tm5 (1usmus config) but after reboot errors in tests almost immediately. maybe this is limit board or IMC and i need some special settings or timinngs =\
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3533 stable
3666 training and boot ok with procodt 48om, rtt 7/2/1 or 7/3/1 and cad bus 40-20-24-24
3733 problem with memory training and cold boot
 

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View attachment 2489115

View attachment 2489116

Code:
SiSoftware Sandra

Benchmark Results
Aggregate Inter-Thread Bandwidth : 178.51GB/s
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Benchmark Results
Average Inter-Thread Latency : 40.1ns (9.5ns - 61.9ns)
Inter-Thread (same Core) Latency : 9.7ns
Inter-Core (same Module) Latency : 20.8ns
Inter-Module (same Package) Latency : 58.8ns
Results Interpretation : Lower Scores mean Better Performance.
Decimal Numeral System (base 10) : 1s = 1000ms, 1ms = 1000µs, 1µs = 1000ns, etc.

Performance per Thread
Aggregate Inter-Thread Bandwidth : 5.58GB/s
No. Threads : 32
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Performance vs. Power
Processor(s) Power : 105.00W
Aggregate Inter-Thread Bandwidth : 1740.91MB/s/W
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 3.82ns/W
Results Interpretation : Lower Scores mean Better Performance.

Capacity vs. Power
Total Cache Size : 707.05kB/W
Results Interpretation : Higher Scores mean Better Performance.

Performance vs. Speed
Aggregate Inter-Thread Bandwidth : 37.12MB/s/MHz
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 0.08ns/MHz
Results Interpretation : Lower Scores mean Better Performance.

Detailed Results
Processor Affinity : U0-U1 U2-U3 U4-U5 U6-U7 U8-U9 U10-U11 U12-U13 U14-U15 U16-U17 U18-U19 U20-U21 U22-U23 U24-U25 U26-U27 U28-U29 U30-U31
U0-M0C0T0 <> U2-M0C1T0 Data Latency : 22.1ns
U0-M0C0T0 <> U4-M0C2T0 Data Latency : 21.9ns
U0-M0C0T0 <> U6-M0C3T0 Data Latency : 21.8ns
U0-M0C0T0 <> U8-M0C4T0 Data Latency : 20.8ns
U0-M0C0T0 <> U10-M0C5T0 Data Latency : 20.8ns
U0-M0C0T0 <> U12-M0C6T0 Data Latency : 20.5ns
U0-M0C0T0 <> U14-M0C7T0 Data Latency : 20.2ns
U0-M0C0T0 <> U16-M1C0T0 Data Latency : 60.3ns
U0-M0C0T0 <> U18-M1C1T0 Data Latency : 60.7ns
U0-M0C0T0 <> U20-M1C2T0 Data Latency : 60.4ns
U0-M0C0T0 <> U22-M1C3T0 Data Latency : 60.6ns
U0-M0C0T0 <> U24-M1C4T0 Data Latency : 59.7ns
U0-M0C0T0 <> U26-M1C5T0 Data Latency : 60.3ns
U0-M0C0T0 <> U28-M1C6T0 Data Latency : 59.3ns
U0-M0C0T0 <> U30-M1C7T0 Data Latency : 59.9ns
U0-M0C0T0 <> U1-M0C0T1 Data Latency : 9.6ns
U0-M0C0T0 <> U3-M0C1T1 Data Latency : 22.2ns
U0-M0C0T0 <> U5-M0C2T1 Data Latency : 21.9ns
U0-M0C0T0 <> U7-M0C3T1 Data Latency : 21.8ns
U0-M0C0T0 <> U9-M0C4T1 Data Latency : 20.8ns
U0-M0C0T0 <> U11-M0C5T1 Data Latency : 20.8ns
U0-M0C0T0 <> U13-M0C6T1 Data Latency : 20.5ns
U0-M0C0T0 <> U15-M0C7T1 Data Latency : 20.2ns
U0-M0C0T0 <> U17-M1C0T1 Data Latency : 60.5ns
U0-M0C0T0 <> U19-M1C1T1 Data Latency : 60.6ns
U0-M0C0T0 <> U21-M1C2T1 Data Latency : 60.4ns
U0-M0C0T0 <> U23-M1C3T1 Data Latency : 60.6ns
U0-M0C0T0 <> U25-M1C4T1 Data Latency : 59.8ns
U0-M0C0T0 <> U27-M1C5T1 Data Latency : 60.3ns
U0-M0C0T0 <> U29-M1C6T1 Data Latency : 59.4ns
U0-M0C0T0 <> U31-M1C7T1 Data Latency : 59.9ns
U2-M0C1T0 <> U4-M0C2T0 Data Latency : 21.7ns
U2-M0C1T0 <> U6-M0C3T0 Data Latency : 22.9ns
U2-M0C1T0 <> U8-M0C4T0 Data Latency : 21.1ns
U2-M0C1T0 <> U10-M0C5T0 Data Latency : 22.1ns
U2-M0C1T0 <> U12-M0C6T0 Data Latency : 20.4ns
U2-M0C1T0 <> U14-M0C7T0 Data Latency : 20.9ns
U2-M0C1T0 <> U16-M1C0T0 Data Latency : 56.7ns
U2-M0C1T0 <> U18-M1C1T0 Data Latency : 56.5ns
U2-M0C1T0 <> U20-M1C2T0 Data Latency : 57.0ns
U2-M0C1T0 <> U22-M1C3T0 Data Latency : 57.4ns
U2-M0C1T0 <> U24-M1C4T0 Data Latency : 57.8ns
U2-M0C1T0 <> U26-M1C5T0 Data Latency : 57.9ns
U2-M0C1T0 <> U28-M1C6T0 Data Latency : 58.3ns
U2-M0C1T0 <> U30-M1C7T0 Data Latency : 58.0ns
U2-M0C1T0 <> U1-M0C0T1 Data Latency : 19.4ns
U2-M0C1T0 <> U3-M0C1T1 Data Latency : 10.0ns
U2-M0C1T0 <> U5-M0C2T1 Data Latency : 19.1ns
U2-M0C1T0 <> U7-M0C3T1 Data Latency : 20.7ns
U2-M0C1T0 <> U9-M0C4T1 Data Latency : 19.8ns
U2-M0C1T0 <> U11-M0C5T1 Data Latency : 21.3ns
U2-M0C1T0 <> U13-M0C6T1 Data Latency : 20.4ns
U2-M0C1T0 <> U15-M0C7T1 Data Latency : 20.9ns
U2-M0C1T0 <> U17-M1C0T1 Data Latency : 61.4ns
U2-M0C1T0 <> U19-M1C1T1 Data Latency : 61.0ns
U2-M0C1T0 <> U21-M1C2T1 Data Latency : 58.5ns
U2-M0C1T0 <> U23-M1C3T1 Data Latency : 57.6ns
U2-M0C1T0 <> U25-M1C4T1 Data Latency : 59.4ns
U2-M0C1T0 <> U27-M1C5T1 Data Latency : 58.6ns
U2-M0C1T0 <> U29-M1C6T1 Data Latency : 58.9ns
U2-M0C1T0 <> U31-M1C7T1 Data Latency : 60.3ns
U4-M0C2T0 <> U6-M0C3T0 Data Latency : 21.1ns
U4-M0C2T0 <> U8-M0C4T0 Data Latency : 21.9ns
U4-M0C2T0 <> U10-M0C5T0 Data Latency : 20.4ns
U4-M0C2T0 <> U12-M0C6T0 Data Latency : 21.4ns
U4-M0C2T0 <> U14-M0C7T0 Data Latency : 20.8ns
U4-M0C2T0 <> U16-M1C0T0 Data Latency : 60.3ns
U4-M0C2T0 <> U18-M1C1T0 Data Latency : 58.5ns
U4-M0C2T0 <> U20-M1C2T0 Data Latency : 59.9ns
U4-M0C2T0 <> U22-M1C3T0 Data Latency : 57.8ns
U4-M0C2T0 <> U24-M1C4T0 Data Latency : 58.5ns
U4-M0C2T0 <> U26-M1C5T0 Data Latency : 57.8ns
U4-M0C2T0 <> U28-M1C6T0 Data Latency : 58.2ns
U4-M0C2T0 <> U30-M1C7T0 Data Latency : 58.7ns
U4-M0C2T0 <> U1-M0C0T1 Data Latency : 19.4ns
U4-M0C2T0 <> U3-M0C1T1 Data Latency : 20.2ns
U4-M0C2T0 <> U5-M0C2T1 Data Latency : 9.9ns
U4-M0C2T0 <> U7-M0C3T1 Data Latency : 19.7ns
U4-M0C2T0 <> U9-M0C4T1 Data Latency : 20.4ns
U4-M0C2T0 <> U11-M0C5T1 Data Latency : 20.4ns
U4-M0C2T0 <> U13-M0C6T1 Data Latency : 21.3ns
U4-M0C2T0 <> U15-M0C7T1 Data Latency : 21.1ns
U4-M0C2T0 <> U17-M1C0T1 Data Latency : 57.8ns
U4-M0C2T0 <> U19-M1C1T1 Data Latency : 59.4ns
U4-M0C2T0 <> U21-M1C2T1 Data Latency : 59.9ns
U4-M0C2T0 <> U23-M1C3T1 Data Latency : 60.0ns
U4-M0C2T0 <> U25-M1C4T1 Data Latency : 59.6ns
U4-M0C2T0 <> U27-M1C5T1 Data Latency : 59.2ns
U4-M0C2T0 <> U29-M1C6T1 Data Latency : 58.4ns
U4-M0C2T0 <> U31-M1C7T1 Data Latency : 59.2ns
U6-M0C3T0 <> U8-M0C4T0 Data Latency : 20.4ns
U6-M0C3T0 <> U10-M0C5T0 Data Latency : 22.0ns
U6-M0C3T0 <> U12-M0C6T0 Data Latency : 21.1ns
U6-M0C3T0 <> U14-M0C7T0 Data Latency : 22.3ns
U6-M0C3T0 <> U16-M1C0T0 Data Latency : 58.4ns
U6-M0C3T0 <> U18-M1C1T0 Data Latency : 60.7ns
U6-M0C3T0 <> U20-M1C2T0 Data Latency : 57.8ns
U6-M0C3T0 <> U22-M1C3T0 Data Latency : 58.0ns
U6-M0C3T0 <> U24-M1C4T0 Data Latency : 58.7ns
U6-M0C3T0 <> U26-M1C5T0 Data Latency : 59.1ns
U6-M0C3T0 <> U28-M1C6T0 Data Latency : 58.6ns
U6-M0C3T0 <> U30-M1C7T0 Data Latency : 58.7ns
U6-M0C3T0 <> U1-M0C0T1 Data Latency : 19.0ns
U6-M0C3T0 <> U3-M0C1T1 Data Latency : 21.0ns
U6-M0C3T0 <> U5-M0C2T1 Data Latency : 19.7ns
U6-M0C3T0 <> U7-M0C3T1 Data Latency : 9.9ns
U6-M0C3T0 <> U9-M0C4T1 Data Latency : 20.4ns
U6-M0C3T0 <> U11-M0C5T1 Data Latency : 21.9ns
U6-M0C3T0 <> U13-M0C6T1 Data Latency : 21.1ns
U6-M0C3T0 <> U15-M0C7T1 Data Latency : 21.5ns
U6-M0C3T0 <> U17-M1C0T1 Data Latency : 57.8ns
U6-M0C3T0 <> U19-M1C1T1 Data Latency : 59.4ns
U6-M0C3T0 <> U21-M1C2T1 Data Latency : 57.2ns
U6-M0C3T0 <> U23-M1C3T1 Data Latency : 58.1ns
U6-M0C3T0 <> U25-M1C4T1 Data Latency : 60.4ns
U6-M0C3T0 <> U27-M1C5T1 Data Latency : 59.6ns
U6-M0C3T0 <> U29-M1C6T1 Data Latency : 58.6ns
U6-M0C3T0 <> U31-M1C7T1 Data Latency : 58.4ns
U8-M0C4T0 <> U10-M0C5T0 Data Latency : 20.0ns
U8-M0C4T0 <> U12-M0C6T0 Data Latency : 21.4ns
U8-M0C4T0 <> U14-M0C7T0 Data Latency : 21.1ns
U8-M0C4T0 <> U16-M1C0T0 Data Latency : 58.2ns
U8-M0C4T0 <> U18-M1C1T0 Data Latency : 58.1ns
U8-M0C4T0 <> U20-M1C2T0 Data Latency : 57.1ns
U8-M0C4T0 <> U22-M1C3T0 Data Latency : 58.8ns
U8-M0C4T0 <> U24-M1C4T0 Data Latency : 59.6ns
U8-M0C4T0 <> U26-M1C5T0 Data Latency : 58.3ns
U8-M0C4T0 <> U28-M1C6T0 Data Latency : 58.3ns
U8-M0C4T0 <> U30-M1C7T0 Data Latency : 59.2ns
U8-M0C4T0 <> U1-M0C0T1 Data Latency : 20.4ns
U8-M0C4T0 <> U3-M0C1T1 Data Latency : 20.7ns
U8-M0C4T0 <> U5-M0C2T1 Data Latency : 20.5ns
U8-M0C4T0 <> U7-M0C3T1 Data Latency : 20.4ns
U8-M0C4T0 <> U9-M0C4T1 Data Latency : 9.5ns
U8-M0C4T0 <> U11-M0C5T1 Data Latency : 19.3ns
U8-M0C4T0 <> U13-M0C6T1 Data Latency : 21.8ns
U8-M0C4T0 <> U15-M0C7T1 Data Latency : 20.8ns
U8-M0C4T0 <> U17-M1C0T1 Data Latency : 56.8ns
U8-M0C4T0 <> U19-M1C1T1 Data Latency : 57.0ns
U8-M0C4T0 <> U21-M1C2T1 Data Latency : 58.1ns
U8-M0C4T0 <> U23-M1C3T1 Data Latency : 58.8ns
U8-M0C4T0 <> U25-M1C4T1 Data Latency : 57.9ns
U8-M0C4T0 <> U27-M1C5T1 Data Latency : 58.6ns
U8-M0C4T0 <> U29-M1C6T1 Data Latency : 58.6ns
U8-M0C4T0 <> U31-M1C7T1 Data Latency : 58.7ns
U10-M0C5T0 <> U12-M0C6T0 Data Latency : 21.6ns
U10-M0C5T0 <> U14-M0C7T0 Data Latency : 20.0ns
U10-M0C5T0 <> U16-M1C0T0 Data Latency : 59.3ns
U10-M0C5T0 <> U18-M1C1T0 Data Latency : 57.0ns
U10-M0C5T0 <> U20-M1C2T0 Data Latency : 58.1ns
U10-M0C5T0 <> U22-M1C3T0 Data Latency : 59.6ns
U10-M0C5T0 <> U24-M1C4T0 Data Latency : 59.1ns
U10-M0C5T0 <> U26-M1C5T0 Data Latency : 58.5ns
U10-M0C5T0 <> U28-M1C6T0 Data Latency : 59.0ns
U10-M0C5T0 <> U30-M1C7T0 Data Latency : 57.8ns
U10-M0C5T0 <> U1-M0C0T1 Data Latency : 20.5ns
U10-M0C5T0 <> U3-M0C1T1 Data Latency : 20.3ns
U10-M0C5T0 <> U5-M0C2T1 Data Latency : 20.4ns
U10-M0C5T0 <> U7-M0C3T1 Data Latency : 20.8ns
U10-M0C5T0 <> U9-M0C4T1 Data Latency : 21.0ns
U10-M0C5T0 <> U11-M0C5T1 Data Latency : 9.7ns
U10-M0C5T0 <> U13-M0C6T1 Data Latency : 21.6ns
U10-M0C5T0 <> U15-M0C7T1 Data Latency : 20.6ns
U10-M0C5T0 <> U17-M1C0T1 Data Latency : 57.4ns
U10-M0C5T0 <> U19-M1C1T1 Data Latency : 57.8ns
U10-M0C5T0 <> U21-M1C2T1 Data Latency : 58.1ns
U10-M0C5T0 <> U23-M1C3T1 Data Latency : 58.7ns
U10-M0C5T0 <> U25-M1C4T1 Data Latency : 58.2ns
U10-M0C5T0 <> U27-M1C5T1 Data Latency : 57.9ns
U10-M0C5T0 <> U29-M1C6T1 Data Latency : 59.0ns
U10-M0C5T0 <> U31-M1C7T1 Data Latency : 58.8ns
U12-M0C6T0 <> U14-M0C7T0 Data Latency : 19.9ns
U12-M0C6T0 <> U16-M1C0T0 Data Latency : 59.2ns
U12-M0C6T0 <> U18-M1C1T0 Data Latency : 59.7ns
U12-M0C6T0 <> U20-M1C2T0 Data Latency : 58.9ns
U12-M0C6T0 <> U22-M1C3T0 Data Latency : 59.0ns
U12-M0C6T0 <> U24-M1C4T0 Data Latency : 59.2ns
U12-M0C6T0 <> U26-M1C5T0 Data Latency : 59.1ns
U12-M0C6T0 <> U28-M1C6T0 Data Latency : 59.4ns
U12-M0C6T0 <> U30-M1C7T0 Data Latency : 59.2ns
U12-M0C6T0 <> U1-M0C0T1 Data Latency : 20.7ns
U12-M0C6T0 <> U3-M0C1T1 Data Latency : 21.3ns
U12-M0C6T0 <> U5-M0C2T1 Data Latency : 21.4ns
U12-M0C6T0 <> U7-M0C3T1 Data Latency : 21.1ns
U12-M0C6T0 <> U9-M0C4T1 Data Latency : 19.1ns
U12-M0C6T0 <> U11-M0C5T1 Data Latency : 21.7ns
U12-M0C6T0 <> U13-M0C6T1 Data Latency : 9.8ns
U12-M0C6T0 <> U15-M0C7T1 Data Latency : 21.9ns
U12-M0C6T0 <> U17-M1C0T1 Data Latency : 58.1ns
U12-M0C6T0 <> U19-M1C1T1 Data Latency : 59.4ns
U12-M0C6T0 <> U21-M1C2T1 Data Latency : 59.1ns
U12-M0C6T0 <> U23-M1C3T1 Data Latency : 59.2ns
U12-M0C6T0 <> U25-M1C4T1 Data Latency : 59.0ns
U12-M0C6T0 <> U27-M1C5T1 Data Latency : 59.0ns
U12-M0C6T0 <> U29-M1C6T1 Data Latency : 58.6ns
U12-M0C6T0 <> U31-M1C7T1 Data Latency : 59.4ns
U14-M0C7T0 <> U16-M1C0T0 Data Latency : 59.7ns
U14-M0C7T0 <> U18-M1C1T0 Data Latency : 57.8ns
U14-M0C7T0 <> U20-M1C2T0 Data Latency : 59.0ns
U14-M0C7T0 <> U22-M1C3T0 Data Latency : 58.7ns
U14-M0C7T0 <> U24-M1C4T0 Data Latency : 58.9ns
U14-M0C7T0 <> U26-M1C5T0 Data Latency : 58.8ns
U14-M0C7T0 <> U28-M1C6T0 Data Latency : 58.8ns
U14-M0C7T0 <> U30-M1C7T0 Data Latency : 59.0ns
U14-M0C7T0 <> U1-M0C0T1 Data Latency : 20.4ns
U14-M0C7T0 <> U3-M0C1T1 Data Latency : 21.0ns
U14-M0C7T0 <> U5-M0C2T1 Data Latency : 21.0ns
U14-M0C7T0 <> U7-M0C3T1 Data Latency : 21.4ns
U14-M0C7T0 <> U9-M0C4T1 Data Latency : 21.1ns
U14-M0C7T0 <> U11-M0C5T1 Data Latency : 20.7ns
U14-M0C7T0 <> U13-M0C6T1 Data Latency : 21.5ns
U14-M0C7T0 <> U15-M0C7T1 Data Latency : 9.8ns
U14-M0C7T0 <> U17-M1C0T1 Data Latency : 58.7ns
U14-M0C7T0 <> U19-M1C1T1 Data Latency : 58.3ns
U14-M0C7T0 <> U21-M1C2T1 Data Latency : 59.3ns
U14-M0C7T0 <> U23-M1C3T1 Data Latency : 58.8ns
U14-M0C7T0 <> U25-M1C4T1 Data Latency : 59.5ns
U14-M0C7T0 <> U27-M1C5T1 Data Latency : 59.2ns
U14-M0C7T0 <> U29-M1C6T1 Data Latency : 58.5ns
U14-M0C7T0 <> U31-M1C7T1 Data Latency : 59.1ns
U16-M1C0T0 <> U18-M1C1T0 Data Latency : 19.2ns
U16-M1C0T0 <> U20-M1C2T0 Data Latency : 21.8ns
U16-M1C0T0 <> U22-M1C3T0 Data Latency : 21.0ns
U16-M1C0T0 <> U24-M1C4T0 Data Latency : 22.2ns
U16-M1C0T0 <> U26-M1C5T0 Data Latency : 21.0ns
U16-M1C0T0 <> U28-M1C6T0 Data Latency : 21.5ns
U16-M1C0T0 <> U30-M1C7T0 Data Latency : 20.6ns
U16-M1C0T0 <> U1-M0C0T1 Data Latency : 59.4ns
U16-M1C0T0 <> U3-M0C1T1 Data Latency : 56.4ns
U16-M1C0T0 <> U5-M0C2T1 Data Latency : 57.0ns
U16-M1C0T0 <> U7-M0C3T1 Data Latency : 58.8ns
U16-M1C0T0 <> U9-M0C4T1 Data Latency : 58.1ns
U16-M1C0T0 <> U11-M0C5T1 Data Latency : 59.3ns
U16-M1C0T0 <> U13-M0C6T1 Data Latency : 58.9ns
U16-M1C0T0 <> U15-M0C7T1 Data Latency : 59.6ns
U16-M1C0T0 <> U17-M1C0T1 Data Latency : 9.8ns
U16-M1C0T0 <> U19-M1C1T1 Data Latency : 22.3ns
U16-M1C0T0 <> U21-M1C2T1 Data Latency : 20.4ns
U16-M1C0T0 <> U23-M1C3T1 Data Latency : 19.7ns
U16-M1C0T0 <> U25-M1C4T1 Data Latency : 22.4ns
U16-M1C0T0 <> U27-M1C5T1 Data Latency : 20.5ns
U16-M1C0T0 <> U29-M1C6T1 Data Latency : 21.5ns
U16-M1C0T0 <> U31-M1C7T1 Data Latency : 20.4ns
U18-M1C1T0 <> U20-M1C2T0 Data Latency : 18.8ns
U18-M1C1T0 <> U22-M1C3T0 Data Latency : 20.4ns
U18-M1C1T0 <> U24-M1C4T0 Data Latency : 20.6ns
U18-M1C1T0 <> U26-M1C5T0 Data Latency : 20.7ns
U18-M1C1T0 <> U28-M1C6T0 Data Latency : 20.2ns
U18-M1C1T0 <> U30-M1C7T0 Data Latency : 20.7ns
U18-M1C1T0 <> U1-M0C0T1 Data Latency : 59.7ns
U18-M1C1T0 <> U3-M0C1T1 Data Latency : 59.2ns
U18-M1C1T0 <> U5-M0C2T1 Data Latency : 58.5ns
U18-M1C1T0 <> U7-M0C3T1 Data Latency : 57.8ns
U18-M1C1T0 <> U9-M0C4T1 Data Latency : 58.2ns
U18-M1C1T0 <> U11-M0C5T1 Data Latency : 58.2ns
U18-M1C1T0 <> U13-M0C6T1 Data Latency : 58.3ns
U18-M1C1T0 <> U15-M0C7T1 Data Latency : 57.2ns
U18-M1C1T0 <> U17-M1C0T1 Data Latency : 21.1ns
U18-M1C1T0 <> U19-M1C1T1 Data Latency : 9.7ns
U18-M1C1T0 <> U21-M1C2T1 Data Latency : 21.7ns
U18-M1C1T0 <> U23-M1C3T1 Data Latency : 20.4ns
U18-M1C1T0 <> U25-M1C4T1 Data Latency : 20.9ns
U18-M1C1T0 <> U27-M1C5T1 Data Latency : 21.1ns
U18-M1C1T0 <> U29-M1C6T1 Data Latency : 20.3ns
U18-M1C1T0 <> U31-M1C7T1 Data Latency : 20.3ns
U20-M1C2T0 <> U22-M1C3T0 Data Latency : 19.4ns
U20-M1C2T0 <> U24-M1C4T0 Data Latency : 20.6ns
U20-M1C2T0 <> U26-M1C5T0 Data Latency : 20.1ns
U20-M1C2T0 <> U28-M1C6T0 Data Latency : 19.6ns
U20-M1C2T0 <> U30-M1C7T0 Data Latency : 20.8ns
U20-M1C2T0 <> U1-M0C0T1 Data Latency : 56.7ns
U20-M1C2T0 <> U3-M0C1T1 Data Latency : 57.3ns
U20-M1C2T0 <> U5-M0C2T1 Data Latency : 58.3ns
U20-M1C2T0 <> U7-M0C3T1 Data Latency : 59.5ns
U20-M1C2T0 <> U9-M0C4T1 Data Latency : 57.3ns
U20-M1C2T0 <> U11-M0C5T1 Data Latency : 58.5ns
U20-M1C2T0 <> U13-M0C6T1 Data Latency : 58.6ns
U20-M1C2T0 <> U15-M0C7T1 Data Latency : 59.6ns
U20-M1C2T0 <> U17-M1C0T1 Data Latency : 21.7ns
U20-M1C2T0 <> U19-M1C1T1 Data Latency : 18.8ns
U20-M1C2T0 <> U21-M1C2T1 Data Latency : 9.7ns
U20-M1C2T0 <> U23-M1C3T1 Data Latency : 19.5ns
U20-M1C2T0 <> U25-M1C4T1 Data Latency : 20.6ns
U20-M1C2T0 <> U27-M1C5T1 Data Latency : 20.1ns
U20-M1C2T0 <> U29-M1C6T1 Data Latency : 21.9ns
U20-M1C2T0 <> U31-M1C7T1 Data Latency : 20.5ns
U22-M1C3T0 <> U24-M1C4T0 Data Latency : 20.3ns
U22-M1C3T0 <> U26-M1C5T0 Data Latency : 20.5ns
U22-M1C3T0 <> U28-M1C6T0 Data Latency : 19.4ns
U22-M1C3T0 <> U30-M1C7T0 Data Latency : 21.9ns
U22-M1C3T0 <> U1-M0C0T1 Data Latency : 56.6ns
U22-M1C3T0 <> U3-M0C1T1 Data Latency : 58.8ns
U22-M1C3T0 <> U5-M0C2T1 Data Latency : 57.5ns
U22-M1C3T0 <> U7-M0C3T1 Data Latency : 59.7ns
U22-M1C3T0 <> U9-M0C4T1 Data Latency : 58.3ns
U22-M1C3T0 <> U11-M0C5T1 Data Latency : 59.2ns
U22-M1C3T0 <> U13-M0C6T1 Data Latency : 59.0ns
U22-M1C3T0 <> U15-M0C7T1 Data Latency : 58.2ns
U22-M1C3T0 <> U17-M1C0T1 Data Latency : 18.9ns
U22-M1C3T0 <> U19-M1C1T1 Data Latency : 21.7ns
U22-M1C3T0 <> U21-M1C2T1 Data Latency : 21.0ns
U22-M1C3T0 <> U23-M1C3T1 Data Latency : 9.7ns
U22-M1C3T0 <> U25-M1C4T1 Data Latency : 20.3ns
U22-M1C3T0 <> U27-M1C5T1 Data Latency : 21.8ns
U22-M1C3T0 <> U29-M1C6T1 Data Latency : 21.0ns
U22-M1C3T0 <> U31-M1C7T1 Data Latency : 19.5ns
U24-M1C4T0 <> U26-M1C5T0 Data Latency : 20.2ns
U24-M1C4T0 <> U28-M1C6T0 Data Latency : 21.9ns
U24-M1C4T0 <> U30-M1C7T0 Data Latency : 21.4ns
U24-M1C4T0 <> U1-M0C0T1 Data Latency : 58.1ns
U24-M1C4T0 <> U3-M0C1T1 Data Latency : 57.6ns
U24-M1C4T0 <> U5-M0C2T1 Data Latency : 59.7ns
U24-M1C4T0 <> U7-M0C3T1 Data Latency : 58.5ns
U24-M1C4T0 <> U9-M0C4T1 Data Latency : 59.7ns
U24-M1C4T0 <> U11-M0C5T1 Data Latency : 58.2ns
U24-M1C4T0 <> U13-M0C6T1 Data Latency : 58.5ns
U24-M1C4T0 <> U15-M0C7T1 Data Latency : 59.6ns
U24-M1C4T0 <> U17-M1C0T1 Data Latency : 19.8ns
U24-M1C4T0 <> U19-M1C1T1 Data Latency : 21.2ns
U24-M1C4T0 <> U21-M1C2T1 Data Latency : 20.6ns
U24-M1C4T0 <> U23-M1C3T1 Data Latency : 20.4ns
U24-M1C4T0 <> U25-M1C4T1 Data Latency : 9.8ns
U24-M1C4T0 <> U27-M1C5T1 Data Latency : 21.1ns
U24-M1C4T0 <> U29-M1C6T1 Data Latency : 21.6ns
U24-M1C4T0 <> U31-M1C7T1 Data Latency : 21.0ns
U26-M1C5T0 <> U28-M1C6T0 Data Latency : 20.2ns
U26-M1C5T0 <> U30-M1C7T0 Data Latency : 21.8ns
U26-M1C5T0 <> U1-M0C0T1 Data Latency : 59.2ns
U26-M1C5T0 <> U3-M0C1T1 Data Latency : 59.2ns
U26-M1C5T0 <> U5-M0C2T1 Data Latency : 60.6ns
U26-M1C5T0 <> U7-M0C3T1 Data Latency : 58.9ns
U26-M1C5T0 <> U9-M0C4T1 Data Latency : 58.4ns
U26-M1C5T0 <> U11-M0C5T1 Data Latency : 59.0ns
U26-M1C5T0 <> U13-M0C6T1 Data Latency : 58.8ns
U26-M1C5T0 <> U15-M0C7T1 Data Latency : 58.5ns
U26-M1C5T0 <> U17-M1C0T1 Data Latency : 20.4ns
U26-M1C5T0 <> U19-M1C1T1 Data Latency : 20.5ns
U26-M1C5T0 <> U21-M1C2T1 Data Latency : 20.2ns
U26-M1C5T0 <> U23-M1C3T1 Data Latency : 21.3ns
U26-M1C5T0 <> U25-M1C4T1 Data Latency : 20.2ns
U26-M1C5T0 <> U27-M1C5T1 Data Latency : 9.8ns
U26-M1C5T0 <> U29-M1C6T1 Data Latency : 21.5ns
U26-M1C5T0 <> U31-M1C7T1 Data Latency : 22.4ns
U28-M1C6T0 <> U30-M1C7T0 Data Latency : 21.5ns
U28-M1C6T0 <> U1-M0C0T1 Data Latency : 58.9ns
U28-M1C6T0 <> U3-M0C1T1 Data Latency : 60.6ns
U28-M1C6T0 <> U5-M0C2T1 Data Latency : 58.2ns
U28-M1C6T0 <> U7-M0C3T1 Data Latency : 58.9ns
U28-M1C6T0 <> U9-M0C4T1 Data Latency : 58.5ns
U28-M1C6T0 <> U11-M0C5T1 Data Latency : 58.4ns
U28-M1C6T0 <> U13-M0C6T1 Data Latency : 59.3ns
U28-M1C6T0 <> U15-M0C7T1 Data Latency : 59.3ns
U28-M1C6T0 <> U17-M1C0T1 Data Latency : 21.4ns
U28-M1C6T0 <> U19-M1C1T1 Data Latency : 20.4ns
U28-M1C6T0 <> U21-M1C2T1 Data Latency : 22.2ns
U28-M1C6T0 <> U23-M1C3T1 Data Latency : 19.6ns
U28-M1C6T0 <> U25-M1C4T1 Data Latency : 21.5ns
U28-M1C6T0 <> U27-M1C5T1 Data Latency : 20.2ns
U28-M1C6T0 <> U29-M1C6T1 Data Latency : 9.7ns
U28-M1C6T0 <> U31-M1C7T1 Data Latency : 21.9ns
U30-M1C7T0 <> U1-M0C0T1 Data Latency : 59.6ns
U30-M1C7T0 <> U3-M0C1T1 Data Latency : 60.8ns
U30-M1C7T0 <> U5-M0C2T1 Data Latency : 58.6ns
U30-M1C7T0 <> U7-M0C3T1 Data Latency : 60.1ns
U30-M1C7T0 <> U9-M0C4T1 Data Latency : 58.8ns
U30-M1C7T0 <> U11-M0C5T1 Data Latency : 58.6ns
U30-M1C7T0 <> U13-M0C6T1 Data Latency : 59.1ns
U30-M1C7T0 <> U15-M0C7T1 Data Latency : 58.4ns
U30-M1C7T0 <> U17-M1C0T1 Data Latency : 20.3ns
U30-M1C7T0 <> U19-M1C1T1 Data Latency : 20.5ns
U30-M1C7T0 <> U21-M1C2T1 Data Latency : 20.5ns
U30-M1C7T0 <> U23-M1C3T1 Data Latency : 21.3ns
U30-M1C7T0 <> U25-M1C4T1 Data Latency : 19.7ns
U30-M1C7T0 <> U27-M1C5T1 Data Latency : 21.9ns
U30-M1C7T0 <> U29-M1C6T1 Data Latency : 20.4ns
U30-M1C7T0 <> U31-M1C7T1 Data Latency : 9.6ns
U1-M0C0T1 <> U3-M0C1T1 Data Latency : 22.7ns
U1-M0C0T1 <> U5-M0C2T1 Data Latency : 22.0ns
U1-M0C0T1 <> U7-M0C3T1 Data Latency : 19.9ns
U1-M0C0T1 <> U9-M0C4T1 Data Latency : 19.4ns
U1-M0C0T1 <> U11-M0C5T1 Data Latency : 20.8ns
U1-M0C0T1 <> U13-M0C6T1 Data Latency : 20.7ns
U1-M0C0T1 <> U15-M0C7T1 Data Latency : 20.3ns
U1-M0C0T1 <> U17-M1C0T1 Data Latency : 59.1ns
U1-M0C0T1 <> U19-M1C1T1 Data Latency : 58.5ns
U1-M0C0T1 <> U21-M1C2T1 Data Latency : 56.9ns
U1-M0C0T1 <> U23-M1C3T1 Data Latency : 57.1ns
U1-M0C0T1 <> U25-M1C4T1 Data Latency : 58.0ns
U1-M0C0T1 <> U27-M1C5T1 Data Latency : 58.3ns
U1-M0C0T1 <> U29-M1C6T1 Data Latency : 58.8ns
U1-M0C0T1 <> U31-M1C7T1 Data Latency : 57.9ns
U3-M0C1T1 <> U5-M0C2T1 Data Latency : 20.5ns
U3-M0C1T1 <> U7-M0C3T1 Data Latency : 20.9ns
U3-M0C1T1 <> U9-M0C4T1 Data Latency : 21.2ns
U3-M0C1T1 <> U11-M0C5T1 Data Latency : 21.4ns
U3-M0C1T1 <> U13-M0C6T1 Data Latency : 20.5ns
U3-M0C1T1 <> U15-M0C7T1 Data Latency : 21.0ns
U3-M0C1T1 <> U17-M1C0T1 Data Latency : 61.9ns
U3-M0C1T1 <> U19-M1C1T1 Data Latency : 61.1ns
U3-M0C1T1 <> U21-M1C2T1 Data Latency : 58.0ns
U3-M0C1T1 <> U23-M1C3T1 Data Latency : 56.8ns
U3-M0C1T1 <> U25-M1C4T1 Data Latency : 61.4ns
U3-M0C1T1 <> U27-M1C5T1 Data Latency : 57.5ns
U3-M0C1T1 <> U29-M1C6T1 Data Latency : 59.3ns
U3-M0C1T1 <> U31-M1C7T1 Data Latency : 58.6ns
U5-M0C2T1 <> U7-M0C3T1 Data Latency : 21.3ns
U5-M0C2T1 <> U9-M0C4T1 Data Latency : 21.9ns
U5-M0C2T1 <> U11-M0C5T1 Data Latency : 20.4ns
U5-M0C2T1 <> U13-M0C6T1 Data Latency : 21.1ns
U5-M0C2T1 <> U15-M0C7T1 Data Latency : 20.8ns
U5-M0C2T1 <> U17-M1C0T1 Data Latency : 58.7ns
U5-M0C2T1 <> U19-M1C1T1 Data Latency : 58.6ns
U5-M0C2T1 <> U21-M1C2T1 Data Latency : 60.4ns
U5-M0C2T1 <> U23-M1C3T1 Data Latency : 59.0ns
U5-M0C2T1 <> U25-M1C4T1 Data Latency : 58.3ns
U5-M0C2T1 <> U27-M1C5T1 Data Latency : 57.9ns
U5-M0C2T1 <> U29-M1C6T1 Data Latency : 58.3ns
U5-M0C2T1 <> U31-M1C7T1 Data Latency : 60.1ns
U7-M0C3T1 <> U9-M0C4T1 Data Latency : 20.5ns
U7-M0C3T1 <> U11-M0C5T1 Data Latency : 21.9ns
U7-M0C3T1 <> U13-M0C6T1 Data Latency : 21.2ns
U7-M0C3T1 <> U15-M0C7T1 Data Latency : 21.5ns
U7-M0C3T1 <> U17-M1C0T1 Data Latency : 58.5ns
U7-M0C3T1 <> U19-M1C1T1 Data Latency : 57.3ns
U7-M0C3T1 <> U21-M1C2T1 Data Latency : 57.5ns
U7-M0C3T1 <> U23-M1C3T1 Data Latency : 59.0ns
U7-M0C3T1 <> U25-M1C4T1 Data Latency : 59.5ns
U7-M0C3T1 <> U27-M1C5T1 Data Latency : 58.8ns
U7-M0C3T1 <> U29-M1C6T1 Data Latency : 58.7ns
U7-M0C3T1 <> U31-M1C7T1 Data Latency : 58.4ns
U9-M0C4T1 <> U11-M0C5T1 Data Latency : 19.4ns
U9-M0C4T1 <> U13-M0C6T1 Data Latency : 21.8ns
U9-M0C4T1 <> U15-M0C7T1 Data Latency : 21.5ns
U9-M0C4T1 <> U17-M1C0T1 Data Latency : 60.3ns
U9-M0C4T1 <> U19-M1C1T1 Data Latency : 59.7ns
U9-M0C4T1 <> U21-M1C2T1 Data Latency : 57.1ns
U9-M0C4T1 <> U23-M1C3T1 Data Latency : 59.8ns
U9-M0C4T1 <> U25-M1C4T1 Data Latency : 58.7ns
U9-M0C4T1 <> U27-M1C5T1 Data Latency : 58.2ns
U9-M0C4T1 <> U29-M1C6T1 Data Latency : 58.6ns
U9-M0C4T1 <> U31-M1C7T1 Data Latency : 58.7ns
U11-M0C5T1 <> U13-M0C6T1 Data Latency : 20.3ns
U11-M0C5T1 <> U15-M0C7T1 Data Latency : 22.4ns
U11-M0C5T1 <> U17-M1C0T1 Data Latency : 56.9ns
U11-M0C5T1 <> U19-M1C1T1 Data Latency : 58.1ns
U11-M0C5T1 <> U21-M1C2T1 Data Latency : 59.1ns
U11-M0C5T1 <> U23-M1C3T1 Data Latency : 58.2ns
U11-M0C5T1 <> U25-M1C4T1 Data Latency : 58.4ns
U11-M0C5T1 <> U27-M1C5T1 Data Latency : 59.6ns
U11-M0C5T1 <> U29-M1C6T1 Data Latency : 58.9ns
U11-M0C5T1 <> U31-M1C7T1 Data Latency : 59.0ns
U13-M0C6T1 <> U15-M0C7T1 Data Latency : 19.1ns
U13-M0C6T1 <> U17-M1C0T1 Data Latency : 58.1ns
U13-M0C6T1 <> U19-M1C1T1 Data Latency : 57.7ns
U13-M0C6T1 <> U21-M1C2T1 Data Latency : 58.5ns
U13-M0C6T1 <> U23-M1C3T1 Data Latency : 58.6ns
U13-M0C6T1 <> U25-M1C4T1 Data Latency : 59.3ns
U13-M0C6T1 <> U27-M1C5T1 Data Latency : 59.4ns
U13-M0C6T1 <> U29-M1C6T1 Data Latency : 59.0ns
U13-M0C6T1 <> U31-M1C7T1 Data Latency : 59.4ns
U15-M0C7T1 <> U17-M1C0T1 Data Latency : 59.2ns
U15-M0C7T1 <> U19-M1C1T1 Data Latency : 57.1ns
U15-M0C7T1 <> U21-M1C2T1 Data Latency : 58.6ns
U15-M0C7T1 <> U23-M1C3T1 Data Latency : 58.4ns
U15-M0C7T1 <> U25-M1C4T1 Data Latency : 58.5ns
U15-M0C7T1 <> U27-M1C5T1 Data Latency : 59.6ns
U15-M0C7T1 <> U29-M1C6T1 Data Latency : 59.3ns
U15-M0C7T1 <> U31-M1C7T1 Data Latency : 59.0ns
U17-M1C0T1 <> U19-M1C1T1 Data Latency : 20.9ns
U17-M1C0T1 <> U21-M1C2T1 Data Latency : 22.8ns
U17-M1C0T1 <> U23-M1C3T1 Data Latency : 21.9ns
U17-M1C0T1 <> U25-M1C4T1 Data Latency : 21.2ns
U17-M1C0T1 <> U27-M1C5T1 Data Latency : 19.6ns
U17-M1C0T1 <> U29-M1C6T1 Data Latency : 21.5ns
U17-M1C0T1 <> U31-M1C7T1 Data Latency : 20.4ns
U19-M1C1T1 <> U21-M1C2T1 Data Latency : 21.6ns
U19-M1C1T1 <> U23-M1C3T1 Data Latency : 22.9ns
U19-M1C1T1 <> U25-M1C4T1 Data Latency : 20.5ns
U19-M1C1T1 <> U27-M1C5T1 Data Latency : 21.2ns
U19-M1C1T1 <> U29-M1C6T1 Data Latency : 20.7ns
U19-M1C1T1 <> U31-M1C7T1 Data Latency : 20.8ns
U21-M1C2T1 <> U23-M1C3T1 Data Latency : 21.1ns
U21-M1C2T1 <> U25-M1C4T1 Data Latency : 20.7ns
U21-M1C2T1 <> U27-M1C5T1 Data Latency : 20.3ns
U21-M1C2T1 <> U29-M1C6T1 Data Latency : 20.9ns
U21-M1C2T1 <> U31-M1C7T1 Data Latency : 20.8ns
U23-M1C3T1 <> U25-M1C4T1 Data Latency : 20.4ns
U23-M1C3T1 <> U27-M1C5T1 Data Latency : 21.7ns
U23-M1C3T1 <> U29-M1C6T1 Data Latency : 20.5ns
U23-M1C3T1 <> U31-M1C7T1 Data Latency : 22.1ns
U25-M1C4T1 <> U27-M1C5T1 Data Latency : 21.1ns
U25-M1C4T1 <> U29-M1C6T1 Data Latency : 21.9ns
U25-M1C4T1 <> U31-M1C7T1 Data Latency : 20.4ns
U27-M1C5T1 <> U29-M1C6T1 Data Latency : 21.5ns
U27-M1C5T1 <> U31-M1C7T1 Data Latency : 21.9ns
U29-M1C6T1 <> U31-M1C7T1 Data Latency : 21.8ns
1x 64bytes Blocks Bandwidth : 26.26GB/s
4x 64bytes Blocks Bandwidth : 28.6GB/s
4x 256bytes Blocks Bandwidth : 102GB/s
4x 1kB Blocks Bandwidth : 328GB/s
4x 4kB Blocks Bandwidth : 517.23GB/s
16x 4kB Blocks Bandwidth : 728.6GB/s
4x 64kB Blocks Bandwidth : 1001.46GB/s
16x 64kB Blocks Bandwidth : 606.71GB/s
8x 256kB Blocks Bandwidth : 616.7GB/s
4x 1MB Blocks Bandwidth : 606.11GB/s
16x 1MB Blocks Bandwidth : 25.43GB/s
8x 4MB Blocks Bandwidth : 19.15GB/s

Benchmark Status
Result ID : AMD Ryzen 9 5950X 16-Core Processor (2M 16C 32T 4.92GHz, 1.9GHz IMC, 16x 512kB L2, 2x 32MB L3)
Microcode : A20F10-1009
Computer : MSI MS-7D13 (MSI MEG B550 UNIFY-X (MS-7D13))
Platform Compliance : x64
No. Threads : 32
System Timer : 10MHz
Page Size : 2MB

Processor
Model : AMD Ryzen 9 5950X 16-Core Processor
URL : https://www.amd.com
Speed : 4.92GHz
Min/Max/Turbo Speed : 2.2GHz - 3.4GHz - 4.92GHz
Modules per Processor : 2 Unit(s)
Cores per Processor : 8 Unit(s)
Threads per Core : 2 Unit(s)
Front-Side Bus Speed : 100MHz
Revision/Stepping : 21 / 0
Microcode : A20F10-1009
L1D (1st Level) Data Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L1I (1st Level) Code Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L2 (2nd Level) Data/Unified Cache : 16x 512kB, 8-Way, Fully Inclusive, 64bytes Line Size, 2 Thread(s)
L3 (3rd Level) Data/Unified Cache : 2x 32MB, 16-Way, Exclusive, 64bytes Line Size, 16 Thread(s)
Rated Power (TDP) : 105.00W

Memory Controller
Speed : 1.9GHz (100%)
Min/Max/Turbo Speed : 950MHz - 1.9GHz

Performance Enhancing Tips
Notice 242 : Dynamic OverClocking/Turbo engaged. Environment conditions may influence performance.
Tip 3 : Double-click tip or press Enter while a tip is selected for more information about the tip.
View attachment 2489117

View attachment 2489118


Code:
SiSoftware Sandra

Benchmark Results
Aggregate Inter-ThSiSoftware Sandra

Benchmark Results
Aggregate Inter-Thread Bandwidth : 175.35GB/s
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Benchmark Results
Average Inter-Thread Latency : 39.9ns (9.5ns - 59.7ns)
Inter-Thread (same Core) Latency : 9.7ns
Inter-Core (same Module) Latency : 20.9ns
Inter-Module (same Package) Latency : 58.5ns
Results Interpretation : Lower Scores mean Better Performance.
Decimal Numeral System (base 10) : 1s = 1000ms, 1ms = 1000µs, 1µs = 1000ns, etc.

Performance per Thread
Aggregate Inter-Thread Bandwidth : 5.48GB/s
No. Threads : 32
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Performance vs. Power
Processor(s) Power : 105.00W
Aggregate Inter-Thread Bandwidth : 1710.09MB/s/W
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 3.80ns/W
Results Interpretation : Lower Scores mean Better Performance.

Capacity vs. Power
Total Cache Size : 707.05kB/W
Results Interpretation : Higher Scores mean Better Performance.

Performance vs. Speed
Aggregate Inter-Thread Bandwidth : 36.46MB/s/MHz
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 0.08ns/MHz
Results Interpretation : Lower Scores mean Better Performance.

Detailed Results
Processor Affinity : U0-U1 U2-U3 U4-U5 U6-U7 U8-U9 U10-U11 U12-U13 U14-U15 U16-U17 U18-U19 U20-U21 U22-U23 U24-U25 U26-U27 U28-U29 U30-U31
U0-M0C0T0 <> U2-M0C1T0 Data Latency : 19.5ns
U0-M0C0T0 <> U4-M0C2T0 Data Latency : 21.7ns
U0-M0C0T0 <> U6-M0C3T0 Data Latency : 19.6ns
U0-M0C0T0 <> U8-M0C4T0 Data Latency : 22.0ns
U0-M0C0T0 <> U10-M0C5T0 Data Latency : 20.0ns
U0-M0C0T0 <> U12-M0C6T0 Data Latency : 21.4ns
U0-M0C0T0 <> U14-M0C7T0 Data Latency : 20.2ns
U0-M0C0T0 <> U16-M1C0T0 Data Latency : 57.9ns
U0-M0C0T0 <> U18-M1C1T0 Data Latency : 57.8ns
U0-M0C0T0 <> U20-M1C2T0 Data Latency : 57.8ns
U0-M0C0T0 <> U22-M1C3T0 Data Latency : 57.1ns
U0-M0C0T0 <> U24-M1C4T0 Data Latency : 58.7ns
U0-M0C0T0 <> U26-M1C5T0 Data Latency : 57.9ns
U0-M0C0T0 <> U28-M1C6T0 Data Latency : 58.5ns
U0-M0C0T0 <> U30-M1C7T0 Data Latency : 58.6ns
U0-M0C0T0 <> U1-M0C0T1 Data Latency : 9.5ns
U0-M0C0T0 <> U3-M0C1T1 Data Latency : 19.6ns
U0-M0C0T0 <> U5-M0C2T1 Data Latency : 21.7ns
U0-M0C0T0 <> U7-M0C3T1 Data Latency : 19.6ns
U0-M0C0T0 <> U9-M0C4T1 Data Latency : 22.0ns
U0-M0C0T0 <> U11-M0C5T1 Data Latency : 19.9ns
U0-M0C0T0 <> U13-M0C6T1 Data Latency : 21.4ns
U0-M0C0T0 <> U15-M0C7T1 Data Latency : 20.3ns
U0-M0C0T0 <> U17-M1C0T1 Data Latency : 57.9ns
U0-M0C0T0 <> U19-M1C1T1 Data Latency : 57.7ns
U0-M0C0T0 <> U21-M1C2T1 Data Latency : 58.0ns
U0-M0C0T0 <> U23-M1C3T1 Data Latency : 57.1ns
U0-M0C0T0 <> U25-M1C4T1 Data Latency : 58.8ns
U0-M0C0T0 <> U27-M1C5T1 Data Latency : 57.9ns
U0-M0C0T0 <> U29-M1C6T1 Data Latency : 58.6ns
U0-M0C0T0 <> U31-M1C7T1 Data Latency : 58.4ns
U2-M0C1T0 <> U4-M0C2T0 Data Latency : 20.6ns
U2-M0C1T0 <> U6-M0C3T0 Data Latency : 20.0ns
U2-M0C1T0 <> U8-M0C4T0 Data Latency : 21.2ns
U2-M0C1T0 <> U10-M0C5T0 Data Latency : 20.5ns
U2-M0C1T0 <> U12-M0C6T0 Data Latency : 20.5ns
U2-M0C1T0 <> U14-M0C7T0 Data Latency : 20.3ns
U2-M0C1T0 <> U16-M1C0T0 Data Latency : 58.1ns
U2-M0C1T0 <> U18-M1C1T0 Data Latency : 57.8ns
U2-M0C1T0 <> U20-M1C2T0 Data Latency : 58.4ns
U2-M0C1T0 <> U22-M1C3T0 Data Latency : 57.2ns
U2-M0C1T0 <> U24-M1C4T0 Data Latency : 59.0ns
U2-M0C1T0 <> U26-M1C5T0 Data Latency : 57.9ns
U2-M0C1T0 <> U28-M1C6T0 Data Latency : 58.9ns
U2-M0C1T0 <> U30-M1C7T0 Data Latency : 58.6ns
U2-M0C1T0 <> U1-M0C0T1 Data Latency : 19.5ns
U2-M0C1T0 <> U3-M0C1T1 Data Latency : 10.0ns
U2-M0C1T0 <> U5-M0C2T1 Data Latency : 20.6ns
U2-M0C1T0 <> U7-M0C3T1 Data Latency : 20.1ns
U2-M0C1T0 <> U9-M0C4T1 Data Latency : 21.1ns
U2-M0C1T0 <> U11-M0C5T1 Data Latency : 20.5ns
U2-M0C1T0 <> U13-M0C6T1 Data Latency : 20.5ns
U2-M0C1T0 <> U15-M0C7T1 Data Latency : 20.4ns
U2-M0C1T0 <> U17-M1C0T1 Data Latency : 58.1ns
U2-M0C1T0 <> U19-M1C1T1 Data Latency : 58.0ns
U2-M0C1T0 <> U21-M1C2T1 Data Latency : 58.3ns
U2-M0C1T0 <> U23-M1C3T1 Data Latency : 57.3ns
U2-M0C1T0 <> U25-M1C4T1 Data Latency : 59.0ns
U2-M0C1T0 <> U27-M1C5T1 Data Latency : 57.9ns
U2-M0C1T0 <> U29-M1C6T1 Data Latency : 59.1ns
U2-M0C1T0 <> U31-M1C7T1 Data Latency : 58.3ns
U4-M0C2T0 <> U6-M0C3T0 Data Latency : 19.8ns
U4-M0C2T0 <> U8-M0C4T0 Data Latency : 22.9ns
U4-M0C2T0 <> U10-M0C5T0 Data Latency : 20.3ns
U4-M0C2T0 <> U12-M0C6T0 Data Latency : 22.4ns
U4-M0C2T0 <> U14-M0C7T0 Data Latency : 21.1ns
U4-M0C2T0 <> U16-M1C0T0 Data Latency : 58.1ns
U4-M0C2T0 <> U18-M1C1T0 Data Latency : 58.0ns
U4-M0C2T0 <> U20-M1C2T0 Data Latency : 58.4ns
U4-M0C2T0 <> U22-M1C3T0 Data Latency : 57.7ns
U4-M0C2T0 <> U24-M1C4T0 Data Latency : 59.2ns
U4-M0C2T0 <> U26-M1C5T0 Data Latency : 58.3ns
U4-M0C2T0 <> U28-M1C6T0 Data Latency : 58.7ns
U4-M0C2T0 <> U30-M1C7T0 Data Latency : 58.7ns
U4-M0C2T0 <> U1-M0C0T1 Data Latency : 21.6ns
U4-M0C2T0 <> U3-M0C1T1 Data Latency : 20.7ns
U4-M0C2T0 <> U5-M0C2T1 Data Latency : 9.8ns
U4-M0C2T0 <> U7-M0C3T1 Data Latency : 19.7ns
U4-M0C2T0 <> U9-M0C4T1 Data Latency : 22.9ns
U4-M0C2T0 <> U11-M0C5T1 Data Latency : 20.4ns
U4-M0C2T0 <> U13-M0C6T1 Data Latency : 22.4ns
U4-M0C2T0 <> U15-M0C7T1 Data Latency : 21.1ns
U4-M0C2T0 <> U17-M1C0T1 Data Latency : 58.0ns
U4-M0C2T0 <> U19-M1C1T1 Data Latency : 58.0ns
U4-M0C2T0 <> U21-M1C2T1 Data Latency : 58.4ns
U4-M0C2T0 <> U23-M1C3T1 Data Latency : 57.7ns
U4-M0C2T0 <> U25-M1C4T1 Data Latency : 59.2ns
U4-M0C2T0 <> U27-M1C5T1 Data Latency : 58.3ns
U4-M0C2T0 <> U29-M1C6T1 Data Latency : 58.7ns
U4-M0C2T0 <> U31-M1C7T1 Data Latency : 58.6ns
U6-M0C3T0 <> U8-M0C4T0 Data Latency : 20.6ns
U6-M0C3T0 <> U10-M0C5T0 Data Latency : 20.8ns
U6-M0C3T0 <> U12-M0C6T0 Data Latency : 21.2ns
U6-M0C3T0 <> U14-M0C7T0 Data Latency : 20.8ns
U6-M0C3T0 <> U16-M1C0T0 Data Latency : 58.0ns
U6-M0C3T0 <> U18-M1C1T0 Data Latency : 57.7ns
U6-M0C3T0 <> U20-M1C2T0 Data Latency : 58.2ns
U6-M0C3T0 <> U22-M1C3T0 Data Latency : 57.5ns
U6-M0C3T0 <> U24-M1C4T0 Data Latency : 58.8ns
U6-M0C3T0 <> U26-M1C5T0 Data Latency : 58.2ns
U6-M0C3T0 <> U28-M1C6T0 Data Latency : 58.8ns
U6-M0C3T0 <> U30-M1C7T0 Data Latency : 58.5ns
U6-M0C3T0 <> U1-M0C0T1 Data Latency : 19.9ns
U6-M0C3T0 <> U3-M0C1T1 Data Latency : 20.3ns
U6-M0C3T0 <> U5-M0C2T1 Data Latency : 19.9ns
U6-M0C3T0 <> U7-M0C3T1 Data Latency : 9.8ns
U6-M0C3T0 <> U9-M0C4T1 Data Latency : 20.7ns
U6-M0C3T0 <> U11-M0C5T1 Data Latency : 20.7ns
U6-M0C3T0 <> U13-M0C6T1 Data Latency : 20.7ns
U6-M0C3T0 <> U15-M0C7T1 Data Latency : 20.8ns
U6-M0C3T0 <> U17-M1C0T1 Data Latency : 58.0ns
U6-M0C3T0 <> U19-M1C1T1 Data Latency : 57.6ns
U6-M0C3T0 <> U21-M1C2T1 Data Latency : 58.2ns
U6-M0C3T0 <> U23-M1C3T1 Data Latency : 57.5ns
U6-M0C3T0 <> U25-M1C4T1 Data Latency : 58.9ns
U6-M0C3T0 <> U27-M1C5T1 Data Latency : 58.3ns
U6-M0C3T0 <> U29-M1C6T1 Data Latency : 58.9ns
U6-M0C3T0 <> U31-M1C7T1 Data Latency : 58.5ns
U8-M0C4T0 <> U10-M0C5T0 Data Latency : 20.8ns
U8-M0C4T0 <> U12-M0C6T0 Data Latency : 22.7ns
U8-M0C4T0 <> U14-M0C7T0 Data Latency : 21.4ns
U8-M0C4T0 <> U16-M1C0T0 Data Latency : 58.4ns
U8-M0C4T0 <> U18-M1C1T0 Data Latency : 58.2ns
U8-M0C4T0 <> U20-M1C2T0 Data Latency : 59.0ns
U8-M0C4T0 <> U22-M1C3T0 Data Latency : 58.1ns
U8-M0C4T0 <> U24-M1C4T0 Data Latency : 59.6ns
U8-M0C4T0 <> U26-M1C5T0 Data Latency : 58.7ns
U8-M0C4T0 <> U28-M1C6T0 Data Latency : 59.2ns
U8-M0C4T0 <> U30-M1C7T0 Data Latency : 59.0ns
U8-M0C4T0 <> U1-M0C0T1 Data Latency : 21.7ns
U8-M0C4T0 <> U3-M0C1T1 Data Latency : 21.2ns
U8-M0C4T0 <> U5-M0C2T1 Data Latency : 23.1ns
U8-M0C4T0 <> U7-M0C3T1 Data Latency : 20.4ns
U8-M0C4T0 <> U9-M0C4T1 Data Latency : 9.5ns
U8-M0C4T0 <> U11-M0C5T1 Data Latency : 20.8ns
U8-M0C4T0 <> U13-M0C6T1 Data Latency : 22.8ns
U8-M0C4T0 <> U15-M0C7T1 Data Latency : 21.4ns
U8-M0C4T0 <> U17-M1C0T1 Data Latency : 58.4ns
U8-M0C4T0 <> U19-M1C1T1 Data Latency : 58.2ns
U8-M0C4T0 <> U21-M1C2T1 Data Latency : 58.9ns
U8-M0C4T0 <> U23-M1C3T1 Data Latency : 58.1ns
U8-M0C4T0 <> U25-M1C4T1 Data Latency : 59.7ns
U8-M0C4T0 <> U27-M1C5T1 Data Latency : 58.7ns
U8-M0C4T0 <> U29-M1C6T1 Data Latency : 59.2ns
U8-M0C4T0 <> U31-M1C7T1 Data Latency : 59.0ns
U10-M0C5T0 <> U12-M0C6T0 Data Latency : 21.0ns
U10-M0C5T0 <> U14-M0C7T0 Data Latency : 21.2ns
U10-M0C5T0 <> U16-M1C0T0 Data Latency : 58.5ns
U10-M0C5T0 <> U18-M1C1T0 Data Latency : 58.1ns
U10-M0C5T0 <> U20-M1C2T0 Data Latency : 58.5ns
U10-M0C5T0 <> U22-M1C3T0 Data Latency : 57.6ns
U10-M0C5T0 <> U24-M1C4T0 Data Latency : 59.4ns
U10-M0C5T0 <> U26-M1C5T0 Data Latency : 58.2ns
U10-M0C5T0 <> U28-M1C6T0 Data Latency : 59.1ns
U10-M0C5T0 <> U30-M1C7T0 Data Latency : 58.5ns
U10-M0C5T0 <> U1-M0C0T1 Data Latency : 20.2ns
U10-M0C5T0 <> U3-M0C1T1 Data Latency : 20.7ns
U10-M0C5T0 <> U5-M0C2T1 Data Latency : 20.6ns
U10-M0C5T0 <> U7-M0C3T1 Data Latency : 20.7ns
U10-M0C5T0 <> U9-M0C4T1 Data Latency : 20.9ns
U10-M0C5T0 <> U11-M0C5T1 Data Latency : 9.7ns
U10-M0C5T0 <> U13-M0C6T1 Data Latency : 21.0ns
U10-M0C5T0 <> U15-M0C7T1 Data Latency : 21.2ns
U10-M0C5T0 <> U17-M1C0T1 Data Latency : 58.4ns
U10-M0C5T0 <> U19-M1C1T1 Data Latency : 58.1ns
U10-M0C5T0 <> U21-M1C2T1 Data Latency : 58.6ns
U10-M0C5T0 <> U23-M1C3T1 Data Latency : 57.5ns
U10-M0C5T0 <> U25-M1C4T1 Data Latency : 59.4ns
U10-M0C5T0 <> U27-M1C5T1 Data Latency : 58.3ns
U10-M0C5T0 <> U29-M1C6T1 Data Latency : 59.2ns
U10-M0C5T0 <> U31-M1C7T1 Data Latency : 58.5ns
U12-M0C6T0 <> U14-M0C7T0 Data Latency : 21.0ns
U12-M0C6T0 <> U16-M1C0T0 Data Latency : 58.6ns
U12-M0C6T0 <> U18-M1C1T0 Data Latency : 58.4ns
U12-M0C6T0 <> U20-M1C2T0 Data Latency : 58.7ns
U12-M0C6T0 <> U22-M1C3T0 Data Latency : 57.9ns
U12-M0C6T0 <> U24-M1C4T0 Data Latency : 59.4ns
U12-M0C6T0 <> U26-M1C5T0 Data Latency : 58.8ns
U12-M0C6T0 <> U28-M1C6T0 Data Latency : 59.4ns
U12-M0C6T0 <> U30-M1C7T0 Data Latency : 59.4ns
U12-M0C6T0 <> U1-M0C0T1 Data Latency : 21.4ns
U12-M0C6T0 <> U3-M0C1T1 Data Latency : 20.7ns
U12-M0C6T0 <> U5-M0C2T1 Data Latency : 22.4ns
U12-M0C6T0 <> U7-M0C3T1 Data Latency : 20.5ns
U12-M0C6T0 <> U9-M0C4T1 Data Latency : 22.7ns
U12-M0C6T0 <> U11-M0C5T1 Data Latency : 20.9ns
U12-M0C6T0 <> U13-M0C6T1 Data Latency : 9.8ns
U12-M0C6T0 <> U15-M0C7T1 Data Latency : 21.0ns
U12-M0C6T0 <> U17-M1C0T1 Data Latency : 58.6ns
U12-M0C6T0 <> U19-M1C1T1 Data Latency : 58.5ns
U12-M0C6T0 <> U21-M1C2T1 Data Latency : 58.6ns
U12-M0C6T0 <> U23-M1C3T1 Data Latency : 58.0ns
U12-M0C6T0 <> U25-M1C4T1 Data Latency : 59.5ns
U12-M0C6T0 <> U27-M1C5T1 Data Latency : 58.9ns
U12-M0C6T0 <> U29-M1C6T1 Data Latency : 59.4ns
U12-M0C6T0 <> U31-M1C7T1 Data Latency : 59.4ns
U14-M0C7T0 <> U16-M1C0T0 Data Latency : 58.9ns
U14-M0C7T0 <> U18-M1C1T0 Data Latency : 58.2ns
U14-M0C7T0 <> U20-M1C2T0 Data Latency : 58.9ns
U14-M0C7T0 <> U22-M1C3T0 Data Latency : 57.7ns
U14-M0C7T0 <> U24-M1C4T0 Data Latency : 59.5ns
U14-M0C7T0 <> U26-M1C5T0 Data Latency : 58.5ns
U14-M0C7T0 <> U28-M1C6T0 Data Latency : 59.7ns
U14-M0C7T0 <> U30-M1C7T0 Data Latency : 59.1ns
U14-M0C7T0 <> U1-M0C0T1 Data Latency : 20.2ns
U14-M0C7T0 <> U3-M0C1T1 Data Latency : 20.4ns
U14-M0C7T0 <> U5-M0C2T1 Data Latency : 21.2ns
U14-M0C7T0 <> U7-M0C3T1 Data Latency : 20.6ns
U14-M0C7T0 <> U9-M0C4T1 Data Latency : 21.6ns
U14-M0C7T0 <> U11-M0C5T1 Data Latency : 21.2ns
U14-M0C7T0 <> U13-M0C6T1 Data Latency : 21.1ns
U14-M0C7T0 <> U15-M0C7T1 Data Latency : 9.6ns
U14-M0C7T0 <> U17-M1C0T1 Data Latency : 58.9ns
U14-M0C7T0 <> U19-M1C1T1 Data Latency : 58.2ns
U14-M0C7T0 <> U21-M1C2T1 Data Latency : 58.9ns
U14-M0C7T0 <> U23-M1C3T1 Data Latency : 57.7ns
U14-M0C7T0 <> U25-M1C4T1 Data Latency : 59.5ns
U14-M0C7T0 <> U27-M1C5T1 Data Latency : 58.4ns
U14-M0C7T0 <> U29-M1C6T1 Data Latency : 59.6ns
U14-M0C7T0 <> U31-M1C7T1 Data Latency : 59.1ns
U16-M1C0T0 <> U18-M1C1T0 Data Latency : 19.4ns
U16-M1C0T0 <> U20-M1C2T0 Data Latency : 21.4ns
U16-M1C0T0 <> U22-M1C3T0 Data Latency : 19.4ns
U16-M1C0T0 <> U24-M1C4T0 Data Latency : 22.4ns
U16-M1C0T0 <> U26-M1C5T0 Data Latency : 20.1ns
U16-M1C0T0 <> U28-M1C6T0 Data Latency : 21.4ns
U16-M1C0T0 <> U30-M1C7T0 Data Latency : 20.3ns
U16-M1C0T0 <> U1-M0C0T1 Data Latency : 58.3ns
U16-M1C0T0 <> U3-M0C1T1 Data Latency : 58.1ns
U16-M1C0T0 <> U5-M0C2T1 Data Latency : 58.4ns
U16-M1C0T0 <> U7-M0C3T1 Data Latency : 57.7ns
U16-M1C0T0 <> U9-M0C4T1 Data Latency : 58.7ns
U16-M1C0T0 <> U11-M0C5T1 Data Latency : 58.1ns
U16-M1C0T0 <> U13-M0C6T1 Data Latency : 58.8ns
U16-M1C0T0 <> U15-M0C7T1 Data Latency : 58.6ns
U16-M1C0T0 <> U17-M1C0T1 Data Latency : 9.7ns
U16-M1C0T0 <> U19-M1C1T1 Data Latency : 19.4ns
U16-M1C0T0 <> U21-M1C2T1 Data Latency : 21.4ns
U16-M1C0T0 <> U23-M1C3T1 Data Latency : 19.4ns
U16-M1C0T0 <> U25-M1C4T1 Data Latency : 22.4ns
U16-M1C0T0 <> U27-M1C5T1 Data Latency : 20.1ns
U16-M1C0T0 <> U29-M1C6T1 Data Latency : 21.4ns
U16-M1C0T0 <> U31-M1C7T1 Data Latency : 20.3ns
U18-M1C1T0 <> U20-M1C2T0 Data Latency : 20.4ns
U18-M1C1T0 <> U22-M1C3T0 Data Latency : 19.8ns
U18-M1C1T0 <> U24-M1C4T0 Data Latency : 21.1ns
U18-M1C1T0 <> U26-M1C5T0 Data Latency : 20.4ns
U18-M1C1T0 <> U28-M1C6T0 Data Latency : 20.3ns
U18-M1C1T0 <> U30-M1C7T0 Data Latency : 20.3ns
U18-M1C1T0 <> U1-M0C0T1 Data Latency : 57.9ns
U18-M1C1T0 <> U3-M0C1T1 Data Latency : 58.0ns
U18-M1C1T0 <> U5-M0C2T1 Data Latency : 58.4ns
U18-M1C1T0 <> U7-M0C3T1 Data Latency : 57.1ns
U18-M1C1T0 <> U9-M0C4T1 Data Latency : 58.7ns
U18-M1C1T0 <> U11-M0C5T1 Data Latency : 57.4ns
U18-M1C1T0 <> U13-M0C6T1 Data Latency : 58.6ns
U18-M1C1T0 <> U15-M0C7T1 Data Latency : 58.1ns
U18-M1C1T0 <> U17-M1C0T1 Data Latency : 19.4ns
U18-M1C1T0 <> U19-M1C1T1 Data Latency : 9.7ns
U18-M1C1T0 <> U21-M1C2T1 Data Latency : 20.4ns
U18-M1C1T0 <> U23-M1C3T1 Data Latency : 19.8ns
U18-M1C1T0 <> U25-M1C4T1 Data Latency : 21.1ns
U18-M1C1T0 <> U27-M1C5T1 Data Latency : 20.4ns
U18-M1C1T0 <> U29-M1C6T1 Data Latency : 20.3ns
U18-M1C1T0 <> U31-M1C7T1 Data Latency : 20.2ns
U20-M1C2T0 <> U22-M1C3T0 Data Latency : 19.6ns
U20-M1C2T0 <> U24-M1C4T0 Data Latency : 22.8ns
U20-M1C2T0 <> U26-M1C5T0 Data Latency : 20.1ns
U20-M1C2T0 <> U28-M1C6T0 Data Latency : 22.2ns
U20-M1C2T0 <> U30-M1C7T0 Data Latency : 20.9ns
U20-M1C2T0 <> U1-M0C0T1 Data Latency : 58.0ns
U20-M1C2T0 <> U3-M0C1T1 Data Latency : 58.5ns
U20-M1C2T0 <> U5-M0C2T1 Data Latency : 58.5ns
U20-M1C2T0 <> U7-M0C3T1 Data Latency : 58.0ns
U20-M1C2T0 <> U9-M0C4T1 Data Latency : 58.6ns
U20-M1C2T0 <> U11-M0C5T1 Data Latency : 58.2ns
U20-M1C2T0 <> U13-M0C6T1 Data Latency : 58.7ns
U20-M1C2T0 <> U15-M0C7T1 Data Latency : 58.6ns
U20-M1C2T0 <> U17-M1C0T1 Data Latency : 21.4ns
U20-M1C2T0 <> U19-M1C1T1 Data Latency : 20.3ns
U20-M1C2T0 <> U21-M1C2T1 Data Latency : 9.7ns
U20-M1C2T0 <> U23-M1C3T1 Data Latency : 19.5ns
U20-M1C2T0 <> U25-M1C4T1 Data Latency : 22.8ns
U20-M1C2T0 <> U27-M1C5T1 Data Latency : 20.1ns
U20-M1C2T0 <> U29-M1C6T1 Data Latency : 22.1ns
U20-M1C2T0 <> U31-M1C7T1 Data Latency : 20.9ns
U22-M1C3T0 <> U24-M1C4T0 Data Latency : 20.6ns
U22-M1C3T0 <> U26-M1C5T0 Data Latency : 20.5ns
U22-M1C3T0 <> U28-M1C6T0 Data Latency : 20.5ns
U22-M1C3T0 <> U30-M1C7T0 Data Latency : 20.6ns
U22-M1C3T0 <> U1-M0C0T1 Data Latency : 57.6ns
U22-M1C3T0 <> U3-M0C1T1 Data Latency : 58.0ns
U22-M1C3T0 <> U5-M0C2T1 Data Latency : 58.2ns
U22-M1C3T0 <> U7-M0C3T1 Data Latency : 57.2ns
U22-M1C3T0 <> U9-M0C4T1 Data Latency : 58.6ns
U22-M1C3T0 <> U11-M0C5T1 Data Latency : 57.5ns
U22-M1C3T0 <> U13-M0C6T1 Data Latency : 58.3ns
U22-M1C3T0 <> U15-M0C7T1 Data Latency : 57.9ns
U22-M1C3T0 <> U17-M1C0T1 Data Latency : 19.7ns
U22-M1C3T0 <> U19-M1C1T1 Data Latency : 19.8ns
U22-M1C3T0 <> U21-M1C2T1 Data Latency : 19.7ns
U22-M1C3T0 <> U23-M1C3T1 Data Latency : 9.7ns
U22-M1C3T0 <> U25-M1C4T1 Data Latency : 20.6ns
U22-M1C3T0 <> U27-M1C5T1 Data Latency : 20.5ns
U22-M1C3T0 <> U29-M1C6T1 Data Latency : 20.7ns
U22-M1C3T0 <> U31-M1C7T1 Data Latency : 20.6ns
U24-M1C4T0 <> U26-M1C5T0 Data Latency : 21.1ns
U24-M1C4T0 <> U28-M1C6T0 Data Latency : 22.9ns
U24-M1C4T0 <> U30-M1C7T0 Data Latency : 21.6ns
U24-M1C4T0 <> U1-M0C0T1 Data Latency : 58.7ns
U24-M1C4T0 <> U3-M0C1T1 Data Latency : 59.5ns
U24-M1C4T0 <> U5-M0C2T1 Data Latency : 59.0ns
U24-M1C4T0 <> U7-M0C3T1 Data Latency : 58.6ns
U24-M1C4T0 <> U9-M0C4T1 Data Latency : 59.4ns
U24-M1C4T0 <> U11-M0C5T1 Data Latency : 58.9ns
U24-M1C4T0 <> U13-M0C6T1 Data Latency : 59.5ns
U24-M1C4T0 <> U15-M0C7T1 Data Latency : 59.4ns
U24-M1C4T0 <> U17-M1C0T1 Data Latency : 22.1ns
U24-M1C4T0 <> U19-M1C1T1 Data Latency : 21.1ns
U24-M1C4T0 <> U21-M1C2T1 Data Latency : 23.0ns
U24-M1C4T0 <> U23-M1C3T1 Data Latency : 20.4ns
U24-M1C4T0 <> U25-M1C4T1 Data Latency : 9.8ns
U24-M1C4T0 <> U27-M1C5T1 Data Latency : 21.1ns
U24-M1C4T0 <> U29-M1C6T1 Data Latency : 22.9ns
U24-M1C4T0 <> U31-M1C7T1 Data Latency : 21.6ns
U26-M1C5T0 <> U28-M1C6T0 Data Latency : 20.9ns
U26-M1C5T0 <> U30-M1C7T0 Data Latency : 21.3ns
U26-M1C5T0 <> U1-M0C0T1 Data Latency : 58.2ns
U26-M1C5T0 <> U3-M0C1T1 Data Latency : 58.6ns
U26-M1C5T0 <> U5-M0C2T1 Data Latency : 58.8ns
U26-M1C5T0 <> U7-M0C3T1 Data Latency : 58.0ns
U26-M1C5T0 <> U9-M0C4T1 Data Latency : 59.2ns
U26-M1C5T0 <> U11-M0C5T1 Data Latency : 58.0ns
U26-M1C5T0 <> U13-M0C6T1 Data Latency : 59.0ns
U26-M1C5T0 <> U15-M0C7T1 Data Latency : 58.5ns
U26-M1C5T0 <> U17-M1C0T1 Data Latency : 20.2ns
U26-M1C5T0 <> U19-M1C1T1 Data Latency : 20.4ns
U26-M1C5T0 <> U21-M1C2T1 Data Latency : 20.4ns
U26-M1C5T0 <> U23-M1C3T1 Data Latency : 20.5ns
U26-M1C5T0 <> U25-M1C4T1 Data Latency : 21.1ns
U26-M1C5T0 <> U27-M1C5T1 Data Latency : 9.7ns
U26-M1C5T0 <> U29-M1C6T1 Data Latency : 20.9ns
U26-M1C5T0 <> U31-M1C7T1 Data Latency : 21.3ns
U28-M1C6T0 <> U30-M1C7T0 Data Latency : 20.9ns
U28-M1C6T0 <> U1-M0C0T1 Data Latency : 58.9ns
U28-M1C6T0 <> U3-M0C1T1 Data Latency : 59.1ns
U28-M1C6T0 <> U5-M0C2T1 Data Latency : 59.2ns
U28-M1C6T0 <> U7-M0C3T1 Data Latency : 58.5ns
U28-M1C6T0 <> U9-M0C4T1 Data Latency : 59.3ns
U28-M1C6T0 <> U11-M0C5T1 Data Latency : 58.7ns
U28-M1C6T0 <> U13-M0C6T1 Data Latency : 59.5ns
U28-M1C6T0 <> U15-M0C7T1 Data Latency : 59.3ns
U28-M1C6T0 <> U17-M1C0T1 Data Latency : 21.4ns
U28-M1C6T0 <> U19-M1C1T1 Data Latency : 20.3ns
U28-M1C6T0 <> U21-M1C2T1 Data Latency : 22.2ns
U28-M1C6T0 <> U23-M1C3T1 Data Latency : 20.2ns
U28-M1C6T0 <> U25-M1C4T1 Data Latency : 22.9ns
U28-M1C6T0 <> U27-M1C5T1 Data Latency : 20.9ns
U28-M1C6T0 <> U29-M1C6T1 Data Latency : 9.8ns
U28-M1C6T0 <> U31-M1C7T1 Data Latency : 20.9ns
U30-M1C7T0 <> U1-M0C0T1 Data Latency : 58.5ns
U30-M1C7T0 <> U3-M0C1T1 Data Latency : 58.7ns
U30-M1C7T0 <> U5-M0C2T1 Data Latency : 59.0ns
U30-M1C7T0 <> U7-M0C3T1 Data Latency : 58.0ns
U30-M1C7T0 <> U9-M0C4T1 Data Latency : 59.5ns
U30-M1C7T0 <> U11-M0C5T1 Data Latency : 58.3ns
U30-M1C7T0 <> U13-M0C6T1 Data Latency : 59.4ns
U30-M1C7T0 <> U15-M0C7T1 Data Latency : 58.9ns
U30-M1C7T0 <> U17-M1C0T1 Data Latency : 20.2ns
U30-M1C7T0 <> U19-M1C1T1 Data Latency : 20.3ns
U30-M1C7T0 <> U21-M1C2T1 Data Latency : 21.0ns
U30-M1C7T0 <> U23-M1C3T1 Data Latency : 20.4ns
U30-M1C7T0 <> U25-M1C4T1 Data Latency : 21.8ns
U30-M1C7T0 <> U27-M1C5T1 Data Latency : 21.2ns
U30-M1C7T0 <> U29-M1C6T1 Data Latency : 21.1ns
U30-M1C7T0 <> U31-M1C7T1 Data Latency : 9.8ns
U1-M0C0T1 <> U3-M0C1T1 Data Latency : 19.6ns
U1-M0C0T1 <> U5-M0C2T1 Data Latency : 21.6ns
U1-M0C0T1 <> U7-M0C3T1 Data Latency : 19.6ns
U1-M0C0T1 <> U9-M0C4T1 Data Latency : 22.0ns
U1-M0C0T1 <> U11-M0C5T1 Data Latency : 20.0ns
U1-M0C0T1 <> U13-M0C6T1 Data Latency : 21.4ns
U1-M0C0T1 <> U15-M0C7T1 Data Latency : 20.2ns
U1-M0C0T1 <> U17-M1C0T1 Data Latency : 57.9ns
U1-M0C0T1 <> U19-M1C1T1 Data Latency : 57.7ns
U1-M0C0T1 <> U21-M1C2T1 Data Latency : 57.8ns
U1-M0C0T1 <> U23-M1C3T1 Data Latency : 57.3ns
U1-M0C0T1 <> U25-M1C4T1 Data Latency : 58.8ns
U1-M0C0T1 <> U27-M1C5T1 Data Latency : 57.9ns
U1-M0C0T1 <> U29-M1C6T1 Data Latency : 58.6ns
U1-M0C0T1 <> U31-M1C7T1 Data Latency : 58.5ns
U3-M0C1T1 <> U5-M0C2T1 Data Latency : 20.8ns
U3-M0C1T1 <> U7-M0C3T1 Data Latency : 20.1ns
U3-M0C1T1 <> U9-M0C4T1 Data Latency : 21.3ns
U3-M0C1T1 <> U11-M0C5T1 Data Latency : 20.6ns
U3-M0C1T1 <> U13-M0C6T1 Data Latency : 20.6ns
U3-M0C1T1 <> U15-M0C7T1 Data Latency : 20.6ns
U3-M0C1T1 <> U17-M1C0T1 Data Latency : 58.4ns
U3-M0C1T1 <> U19-M1C1T1 Data Latency : 58.4ns
U3-M0C1T1 <> U21-M1C2T1 Data Latency : 58.8ns
U3-M0C1T1 <> U23-M1C3T1 Data Latency : 57.7ns
U3-M0C1T1 <> U25-M1C4T1 Data Latency : 59.3ns
U3-M0C1T1 <> U27-M1C5T1 Data Latency : 58.6ns
U3-M0C1T1 <> U29-M1C6T1 Data Latency : 59.3ns
U3-M0C1T1 <> U31-M1C7T1 Data Latency : 59.0ns
U5-M0C2T1 <> U7-M0C3T1 Data Latency : 19.8ns
U5-M0C2T1 <> U9-M0C4T1 Data Latency : 22.9ns
U5-M0C2T1 <> U11-M0C5T1 Data Latency : 20.4ns
U5-M0C2T1 <> U13-M0C6T1 Data Latency : 22.4ns
U5-M0C2T1 <> U15-M0C7T1 Data Latency : 21.1ns
U5-M0C2T1 <> U17-M1C0T1 Data Latency : 58.0ns
U5-M0C2T1 <> U19-M1C1T1 Data Latency : 58.0ns
U5-M0C2T1 <> U21-M1C2T1 Data Latency : 58.3ns
U5-M0C2T1 <> U23-M1C3T1 Data Latency : 57.7ns
U5-M0C2T1 <> U25-M1C4T1 Data Latency : 59.1ns
U5-M0C2T1 <> U27-M1C5T1 Data Latency : 58.4ns
U5-M0C2T1 <> U29-M1C6T1 Data Latency : 58.8ns
U5-M0C2T1 <> U31-M1C7T1 Data Latency : 58.7ns
U7-M0C3T1 <> U9-M0C4T1 Data Latency : 20.7ns
U7-M0C3T1 <> U11-M0C5T1 Data Latency : 20.8ns
U7-M0C3T1 <> U13-M0C6T1 Data Latency : 20.9ns
U7-M0C3T1 <> U15-M0C7T1 Data Latency : 20.8ns
U7-M0C3T1 <> U17-M1C0T1 Data Latency : 58.0ns
U7-M0C3T1 <> U19-M1C1T1 Data Latency : 57.7ns
U7-M0C3T1 <> U21-M1C2T1 Data Latency : 58.3ns
U7-M0C3T1 <> U23-M1C3T1 Data Latency : 57.5ns
U7-M0C3T1 <> U25-M1C4T1 Data Latency : 58.8ns
U7-M0C3T1 <> U27-M1C5T1 Data Latency : 58.4ns
U7-M0C3T1 <> U29-M1C6T1 Data Latency : 58.8ns
U7-M0C3T1 <> U31-M1C7T1 Data Latency : 58.5ns
U9-M0C4T1 <> U11-M0C5T1 Data Latency : 20.8ns
U9-M0C4T1 <> U13-M0C6T1 Data Latency : 22.8ns
U9-M0C4T1 <> U15-M0C7T1 Data Latency : 21.4ns
U9-M0C4T1 <> U17-M1C0T1 Data Latency : 58.4ns
U9-M0C4T1 <> U19-M1C1T1 Data Latency : 58.2ns
U9-M0C4T1 <> U21-M1C2T1 Data Latency : 58.9ns
U9-M0C4T1 <> U23-M1C3T1 Data Latency : 58.1ns
U9-M0C4T1 <> U25-M1C4T1 Data Latency : 59.7ns
U9-M0C4T1 <> U27-M1C5T1 Data Latency : 58.6ns
U9-M0C4T1 <> U29-M1C6T1 Data Latency : 59.3ns
U9-M0C4T1 <> U31-M1C7T1 Data Latency : 59.0ns
U11-M0C5T1 <> U13-M0C6T1 Data Latency : 21.0ns
U11-M0C5T1 <> U15-M0C7T1 Data Latency : 21.2ns
U11-M0C5T1 <> U17-M1C0T1 Data Latency : 58.4ns
U11-M0C5T1 <> U19-M1C1T1 Data Latency : 58.1ns
U11-M0C5T1 <> U21-M1C2T1 Data Latency : 58.6ns
U11-M0C5T1 <> U23-M1C3T1 Data Latency : 57.5ns
U11-M0C5T1 <> U25-M1C4T1 Data Latency : 59.3ns
U11-M0C5T1 <> U27-M1C5T1 Data Latency : 58.2ns
U11-M0C5T1 <> U29-M1C6T1 Data Latency : 59.1ns
U11-M0C5T1 <> U31-M1C7T1 Data Latency : 58.5ns
U13-M0C6T1 <> U15-M0C7T1 Data Latency : 21.0ns
U13-M0C6T1 <> U17-M1C0T1 Data Latency : 58.6ns
U13-M0C6T1 <> U19-M1C1T1 Data Latency : 58.4ns
U13-M0C6T1 <> U21-M1C2T1 Data Latency : 58.7ns
U13-M0C6T1 <> U23-M1C3T1 Data Latency : 58.1ns
U13-M0C6T1 <> U25-M1C4T1 Data Latency : 59.4ns
U13-M0C6T1 <> U27-M1C5T1 Data Latency : 58.7ns
U13-M0C6T1 <> U29-M1C6T1 Data Latency : 59.4ns
U13-M0C6T1 <> U31-M1C7T1 Data Latency : 59.4ns
U15-M0C7T1 <> U17-M1C0T1 Data Latency : 58.9ns
U15-M0C7T1 <> U19-M1C1T1 Data Latency : 58.2ns
U15-M0C7T1 <> U21-M1C2T1 Data Latency : 58.8ns
U15-M0C7T1 <> U23-M1C3T1 Data Latency : 57.7ns
U15-M0C7T1 <> U25-M1C4T1 Data Latency : 59.7ns
U15-M0C7T1 <> U27-M1C5T1 Data Latency : 58.5ns
U15-M0C7T1 <> U29-M1C6T1 Data Latency : 59.6ns
U15-M0C7T1 <> U31-M1C7T1 Data Latency : 59.1ns
U17-M1C0T1 <> U19-M1C1T1 Data Latency : 19.4ns
U17-M1C0T1 <> U21-M1C2T1 Data Latency : 21.4ns
U17-M1C0T1 <> U23-M1C3T1 Data Latency : 19.5ns
U17-M1C0T1 <> U25-M1C4T1 Data Latency : 22.3ns
U17-M1C0T1 <> U27-M1C5T1 Data Latency : 20.1ns
U17-M1C0T1 <> U29-M1C6T1 Data Latency : 21.4ns
U17-M1C0T1 <> U31-M1C7T1 Data Latency : 20.3ns
U19-M1C1T1 <> U21-M1C2T1 Data Latency : 20.3ns
U19-M1C1T1 <> U23-M1C3T1 Data Latency : 19.7ns
U19-M1C1T1 <> U25-M1C4T1 Data Latency : 21.1ns
U19-M1C1T1 <> U27-M1C5T1 Data Latency : 20.4ns
U19-M1C1T1 <> U29-M1C6T1 Data Latency : 20.3ns
U19-M1C1T1 <> U31-M1C7T1 Data Latency : 20.2ns
U21-M1C2T1 <> U23-M1C3T1 Data Latency : 19.6ns
U21-M1C2T1 <> U25-M1C4T1 Data Latency : 22.8ns
U21-M1C2T1 <> U27-M1C5T1 Data Latency : 20.1ns
U21-M1C2T1 <> U29-M1C6T1 Data Latency : 22.1ns
U21-M1C2T1 <> U31-M1C7T1 Data Latency : 20.9ns
U23-M1C3T1 <> U25-M1C4T1 Data Latency : 20.6ns
U23-M1C3T1 <> U27-M1C5T1 Data Latency : 20.5ns
U23-M1C3T1 <> U29-M1C6T1 Data Latency : 20.6ns
U23-M1C3T1 <> U31-M1C7T1 Data Latency : 20.6ns
U25-M1C4T1 <> U27-M1C5T1 Data Latency : 21.1ns
U25-M1C4T1 <> U29-M1C6T1 Data Latency : 22.9ns
U25-M1C4T1 <> U31-M1C7T1 Data Latency : 21.6ns
U27-M1C5T1 <> U29-M1C6T1 Data Latency : 20.9ns
U27-M1C5T1 <> U31-M1C7T1 Data Latency : 21.3ns
U29-M1C6T1 <> U31-M1C7T1 Data Latency : 20.9ns
1x 64bytes Blocks Bandwidth : 26.57GB/s
4x 64bytes Blocks Bandwidth : 29.2GB/s
4x 256bytes Blocks Bandwidth : 103.48GB/s
4x 1kB Blocks Bandwidth : 324GB/s
4x 4kB Blocks Bandwidth : 522GB/s
16x 4kB Blocks Bandwidth : 669.66GB/s
4x 64kB Blocks Bandwidth : 1001.73GB/s
16x 64kB Blocks Bandwidth : 612.24GB/s
8x 256kB Blocks Bandwidth : 600.25GB/s
4x 1MB Blocks Bandwidth : 608.21GB/s
16x 1MB Blocks Bandwidth : 22.37GB/s
8x 4MB Blocks Bandwidth : 18.56GB/s

Benchmark Status
Result ID : AMD Ryzen 9 5950X 16-Core Processor (2M 16C 32T 4.92GHz, 1.9GHz IMC, 16x 512kB L2, 2x 32MB L3)
Microcode : A20F10-1009
Computer : MSI MS-7D13 (MSI MEG B550 UNIFY-X (MS-7D13))
Platform Compliance : x64
No. Threads : 32
System Timer : 10MHz
Page Size : 2MB

Processor
Model : AMD Ryzen 9 5950X 16-Core Processor
URL : https://www.amd.com
Speed : 4.92GHz
Min/Max/Turbo Speed : 2.2GHz - 3.4GHz - 4.92GHz
Modules per Processor : 2 Unit(s)
Cores per Processor : 8 Unit(s)
Threads per Core : 2 Unit(s)
Front-Side Bus Speed : 100MHz
Revision/Stepping : 21 / 0
Microcode : A20F10-1009
L1D (1st Level) Data Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L1I (1st Level) Code Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L2 (2nd Level) Data/Unified Cache : 16x 512kB, 8-Way, Fully Inclusive, 64bytes Line Size, 2 Thread(s)
L3 (3rd Level) Data/Unified Cache : 2x 32MB, 16-Way, Exclusive, 64bytes Line Size, 16 Thread(s)
Rated Power (TDP) : 105.00W

Memory Controller
Speed : 1.9GHz (100%)
Min/Max/Turbo Speed : 950MHz - 1.9GHz

Performance Enhancing Tips
Notice 242 : Dynamic OverClocking/Turbo engaged. Environment conditions may influence performance.
Tip 3 : Double-click tip or press Enter while a tip is selected for more information about the tip.
read Bandwidth : 175.35GB/s
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Benchmark Results
Average Inter-Thread Latency : 39.9ns (9.5ns - 59.7ns)
Inter-Thread (same Core) Latency : 9.7ns
Inter-Core (same Module) Latency : 20.9ns
Inter-Module (same Package) Latency : 58.5ns
Results Interpretation : Lower Scores mean Better Performance.
Decimal Numeral System (base 10) : 1s = 1000ms, 1ms = 1000µs, 1µs = 1000ns, etc.

Performance per Thread
Aggregate Inter-Thread Bandwidth : 5.48GB/s
No. Threads : 32
Results Interpretation : Higher Scores mean Better Performance.
Binary Numeral System (base 2) : 1GB(/s) = 1024MB(/s), 1MB(/s) = 1024kB(/s), 1kB(/s) = 1024 bytes(/s), etc.

Performance vs. Power
Processor(s) Power : 105.00W
Aggregate Inter-Thread Bandwidth : 1710.09MB/s/W
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 3.80ns/W
Results Interpretation : Lower Scores mean Better Performance.

Capacity vs. Power
Total Cache Size : 707.05kB/W
Results Interpretation : Higher Scores mean Better Performance.

Performance vs. Speed
Aggregate Inter-Thread Bandwidth : 36.46MB/s/MHz
Results Interpretation : Higher Scores mean Better Performance.
Average Inter-Thread Latency : 0.08ns/MHz
Results Interpretation : Lower Scores mean Better Performance.

Detailed Results
Processor Affinity : U0-U1 U2-U3 U4-U5 U6-U7 U8-U9 U10-U11 U12-U13 U14-U15 U16-U17 U18-U19 U20-U21 U22-U23 U24-U25 U26-U27 U28-U29 U30-U31
U0-M0C0T0 <> U2-M0C1T0 Data Latency : 19.5ns
U0-M0C0T0 <> U4-M0C2T0 Data Latency : 21.7ns
U0-M0C0T0 <> U6-M0C3T0 Data Latency : 19.6ns
U0-M0C0T0 <> U8-M0C4T0 Data Latency : 22.0ns
U0-M0C0T0 <> U10-M0C5T0 Data Latency : 20.0ns
U0-M0C0T0 <> U12-M0C6T0 Data Latency : 21.4ns
U0-M0C0T0 <> U14-M0C7T0 Data Latency : 20.2ns
U0-M0C0T0 <> U16-M1C0T0 Data Latency : 57.9ns
U0-M0C0T0 <> U18-M1C1T0 Data Latency : 57.8ns
U0-M0C0T0 <> U20-M1C2T0 Data Latency : 57.8ns
U0-M0C0T0 <> U22-M1C3T0 Data Latency : 57.1ns
U0-M0C0T0 <> U24-M1C4T0 Data Latency : 58.7ns
U0-M0C0T0 <> U26-M1C5T0 Data Latency : 57.9ns
U0-M0C0T0 <> U28-M1C6T0 Data Latency : 58.5ns
U0-M0C0T0 <> U30-M1C7T0 Data Latency : 58.6ns
U0-M0C0T0 <> U1-M0C0T1 Data Latency : 9.5ns
U0-M0C0T0 <> U3-M0C1T1 Data Latency : 19.6ns
U0-M0C0T0 <> U5-M0C2T1 Data Latency : 21.7ns
U0-M0C0T0 <> U7-M0C3T1 Data Latency : 19.6ns
U0-M0C0T0 <> U9-M0C4T1 Data Latency : 22.0ns
U0-M0C0T0 <> U11-M0C5T1 Data Latency : 19.9ns
U0-M0C0T0 <> U13-M0C6T1 Data Latency : 21.4ns
U0-M0C0T0 <> U15-M0C7T1 Data Latency : 20.3ns
U0-M0C0T0 <> U17-M1C0T1 Data Latency : 57.9ns
U0-M0C0T0 <> U19-M1C1T1 Data Latency : 57.7ns
U0-M0C0T0 <> U21-M1C2T1 Data Latency : 58.0ns
U0-M0C0T0 <> U23-M1C3T1 Data Latency : 57.1ns
U0-M0C0T0 <> U25-M1C4T1 Data Latency : 58.8ns
U0-M0C0T0 <> U27-M1C5T1 Data Latency : 57.9ns
U0-M0C0T0 <> U29-M1C6T1 Data Latency : 58.6ns
U0-M0C0T0 <> U31-M1C7T1 Data Latency : 58.4ns
U2-M0C1T0 <> U4-M0C2T0 Data Latency : 20.6ns
U2-M0C1T0 <> U6-M0C3T0 Data Latency : 20.0ns
U2-M0C1T0 <> U8-M0C4T0 Data Latency : 21.2ns
U2-M0C1T0 <> U10-M0C5T0 Data Latency : 20.5ns
U2-M0C1T0 <> U12-M0C6T0 Data Latency : 20.5ns
U2-M0C1T0 <> U14-M0C7T0 Data Latency : 20.3ns
U2-M0C1T0 <> U16-M1C0T0 Data Latency : 58.1ns
U2-M0C1T0 <> U18-M1C1T0 Data Latency : 57.8ns
U2-M0C1T0 <> U20-M1C2T0 Data Latency : 58.4ns
U2-M0C1T0 <> U22-M1C3T0 Data Latency : 57.2ns
U2-M0C1T0 <> U24-M1C4T0 Data Latency : 59.0ns
U2-M0C1T0 <> U26-M1C5T0 Data Latency : 57.9ns
U2-M0C1T0 <> U28-M1C6T0 Data Latency : 58.9ns
U2-M0C1T0 <> U30-M1C7T0 Data Latency : 58.6ns
U2-M0C1T0 <> U1-M0C0T1 Data Latency : 19.5ns
U2-M0C1T0 <> U3-M0C1T1 Data Latency : 10.0ns
U2-M0C1T0 <> U5-M0C2T1 Data Latency : 20.6ns
U2-M0C1T0 <> U7-M0C3T1 Data Latency : 20.1ns
U2-M0C1T0 <> U9-M0C4T1 Data Latency : 21.1ns
U2-M0C1T0 <> U11-M0C5T1 Data Latency : 20.5ns
U2-M0C1T0 <> U13-M0C6T1 Data Latency : 20.5ns
U2-M0C1T0 <> U15-M0C7T1 Data Latency : 20.4ns
U2-M0C1T0 <> U17-M1C0T1 Data Latency : 58.1ns
U2-M0C1T0 <> U19-M1C1T1 Data Latency : 58.0ns
U2-M0C1T0 <> U21-M1C2T1 Data Latency : 58.3ns
U2-M0C1T0 <> U23-M1C3T1 Data Latency : 57.3ns
U2-M0C1T0 <> U25-M1C4T1 Data Latency : 59.0ns
U2-M0C1T0 <> U27-M1C5T1 Data Latency : 57.9ns
U2-M0C1T0 <> U29-M1C6T1 Data Latency : 59.1ns
U2-M0C1T0 <> U31-M1C7T1 Data Latency : 58.3ns
U4-M0C2T0 <> U6-M0C3T0 Data Latency : 19.8ns
U4-M0C2T0 <> U8-M0C4T0 Data Latency : 22.9ns
U4-M0C2T0 <> U10-M0C5T0 Data Latency : 20.3ns
U4-M0C2T0 <> U12-M0C6T0 Data Latency : 22.4ns
U4-M0C2T0 <> U14-M0C7T0 Data Latency : 21.1ns
U4-M0C2T0 <> U16-M1C0T0 Data Latency : 58.1ns
U4-M0C2T0 <> U18-M1C1T0 Data Latency : 58.0ns
U4-M0C2T0 <> U20-M1C2T0 Data Latency : 58.4ns
U4-M0C2T0 <> U22-M1C3T0 Data Latency : 57.7ns
U4-M0C2T0 <> U24-M1C4T0 Data Latency : 59.2ns
U4-M0C2T0 <> U26-M1C5T0 Data Latency : 58.3ns
U4-M0C2T0 <> U28-M1C6T0 Data Latency : 58.7ns
U4-M0C2T0 <> U30-M1C7T0 Data Latency : 58.7ns
U4-M0C2T0 <> U1-M0C0T1 Data Latency : 21.6ns
U4-M0C2T0 <> U3-M0C1T1 Data Latency : 20.7ns
U4-M0C2T0 <> U5-M0C2T1 Data Latency : 9.8ns
U4-M0C2T0 <> U7-M0C3T1 Data Latency : 19.7ns
U4-M0C2T0 <> U9-M0C4T1 Data Latency : 22.9ns
U4-M0C2T0 <> U11-M0C5T1 Data Latency : 20.4ns
U4-M0C2T0 <> U13-M0C6T1 Data Latency : 22.4ns
U4-M0C2T0 <> U15-M0C7T1 Data Latency : 21.1ns
U4-M0C2T0 <> U17-M1C0T1 Data Latency : 58.0ns
U4-M0C2T0 <> U19-M1C1T1 Data Latency : 58.0ns
U4-M0C2T0 <> U21-M1C2T1 Data Latency : 58.4ns
U4-M0C2T0 <> U23-M1C3T1 Data Latency : 57.7ns
U4-M0C2T0 <> U25-M1C4T1 Data Latency : 59.2ns
U4-M0C2T0 <> U27-M1C5T1 Data Latency : 58.3ns
U4-M0C2T0 <> U29-M1C6T1 Data Latency : 58.7ns
U4-M0C2T0 <> U31-M1C7T1 Data Latency : 58.6ns
U6-M0C3T0 <> U8-M0C4T0 Data Latency : 20.6ns
U6-M0C3T0 <> U10-M0C5T0 Data Latency : 20.8ns
U6-M0C3T0 <> U12-M0C6T0 Data Latency : 21.2ns
U6-M0C3T0 <> U14-M0C7T0 Data Latency : 20.8ns
U6-M0C3T0 <> U16-M1C0T0 Data Latency : 58.0ns
U6-M0C3T0 <> U18-M1C1T0 Data Latency : 57.7ns
U6-M0C3T0 <> U20-M1C2T0 Data Latency : 58.2ns
U6-M0C3T0 <> U22-M1C3T0 Data Latency : 57.5ns
U6-M0C3T0 <> U24-M1C4T0 Data Latency : 58.8ns
U6-M0C3T0 <> U26-M1C5T0 Data Latency : 58.2ns
U6-M0C3T0 <> U28-M1C6T0 Data Latency : 58.8ns
U6-M0C3T0 <> U30-M1C7T0 Data Latency : 58.5ns
U6-M0C3T0 <> U1-M0C0T1 Data Latency : 19.9ns
U6-M0C3T0 <> U3-M0C1T1 Data Latency : 20.3ns
U6-M0C3T0 <> U5-M0C2T1 Data Latency : 19.9ns
U6-M0C3T0 <> U7-M0C3T1 Data Latency : 9.8ns
U6-M0C3T0 <> U9-M0C4T1 Data Latency : 20.7ns
U6-M0C3T0 <> U11-M0C5T1 Data Latency : 20.7ns
U6-M0C3T0 <> U13-M0C6T1 Data Latency : 20.7ns
U6-M0C3T0 <> U15-M0C7T1 Data Latency : 20.8ns
U6-M0C3T0 <> U17-M1C0T1 Data Latency : 58.0ns
U6-M0C3T0 <> U19-M1C1T1 Data Latency : 57.6ns
U6-M0C3T0 <> U21-M1C2T1 Data Latency : 58.2ns
U6-M0C3T0 <> U23-M1C3T1 Data Latency : 57.5ns
U6-M0C3T0 <> U25-M1C4T1 Data Latency : 58.9ns
U6-M0C3T0 <> U27-M1C5T1 Data Latency : 58.3ns
U6-M0C3T0 <> U29-M1C6T1 Data Latency : 58.9ns
U6-M0C3T0 <> U31-M1C7T1 Data Latency : 58.5ns
U8-M0C4T0 <> U10-M0C5T0 Data Latency : 20.8ns
U8-M0C4T0 <> U12-M0C6T0 Data Latency : 22.7ns
U8-M0C4T0 <> U14-M0C7T0 Data Latency : 21.4ns
U8-M0C4T0 <> U16-M1C0T0 Data Latency : 58.4ns
U8-M0C4T0 <> U18-M1C1T0 Data Latency : 58.2ns
U8-M0C4T0 <> U20-M1C2T0 Data Latency : 59.0ns
U8-M0C4T0 <> U22-M1C3T0 Data Latency : 58.1ns
U8-M0C4T0 <> U24-M1C4T0 Data Latency : 59.6ns
U8-M0C4T0 <> U26-M1C5T0 Data Latency : 58.7ns
U8-M0C4T0 <> U28-M1C6T0 Data Latency : 59.2ns
U8-M0C4T0 <> U30-M1C7T0 Data Latency : 59.0ns
U8-M0C4T0 <> U1-M0C0T1 Data Latency : 21.7ns
U8-M0C4T0 <> U3-M0C1T1 Data Latency : 21.2ns
U8-M0C4T0 <> U5-M0C2T1 Data Latency : 23.1ns
U8-M0C4T0 <> U7-M0C3T1 Data Latency : 20.4ns
U8-M0C4T0 <> U9-M0C4T1 Data Latency : 9.5ns
U8-M0C4T0 <> U11-M0C5T1 Data Latency : 20.8ns
U8-M0C4T0 <> U13-M0C6T1 Data Latency : 22.8ns
U8-M0C4T0 <> U15-M0C7T1 Data Latency : 21.4ns
U8-M0C4T0 <> U17-M1C0T1 Data Latency : 58.4ns
U8-M0C4T0 <> U19-M1C1T1 Data Latency : 58.2ns
U8-M0C4T0 <> U21-M1C2T1 Data Latency : 58.9ns
U8-M0C4T0 <> U23-M1C3T1 Data Latency : 58.1ns
U8-M0C4T0 <> U25-M1C4T1 Data Latency : 59.7ns
U8-M0C4T0 <> U27-M1C5T1 Data Latency : 58.7ns
U8-M0C4T0 <> U29-M1C6T1 Data Latency : 59.2ns
U8-M0C4T0 <> U31-M1C7T1 Data Latency : 59.0ns
U10-M0C5T0 <> U12-M0C6T0 Data Latency : 21.0ns
U10-M0C5T0 <> U14-M0C7T0 Data Latency : 21.2ns
U10-M0C5T0 <> U16-M1C0T0 Data Latency : 58.5ns
U10-M0C5T0 <> U18-M1C1T0 Data Latency : 58.1ns
U10-M0C5T0 <> U20-M1C2T0 Data Latency : 58.5ns
U10-M0C5T0 <> U22-M1C3T0 Data Latency : 57.6ns
U10-M0C5T0 <> U24-M1C4T0 Data Latency : 59.4ns
U10-M0C5T0 <> U26-M1C5T0 Data Latency : 58.2ns
U10-M0C5T0 <> U28-M1C6T0 Data Latency : 59.1ns
U10-M0C5T0 <> U30-M1C7T0 Data Latency : 58.5ns
U10-M0C5T0 <> U1-M0C0T1 Data Latency : 20.2ns
U10-M0C5T0 <> U3-M0C1T1 Data Latency : 20.7ns
U10-M0C5T0 <> U5-M0C2T1 Data Latency : 20.6ns
U10-M0C5T0 <> U7-M0C3T1 Data Latency : 20.7ns
U10-M0C5T0 <> U9-M0C4T1 Data Latency : 20.9ns
U10-M0C5T0 <> U11-M0C5T1 Data Latency : 9.7ns
U10-M0C5T0 <> U13-M0C6T1 Data Latency : 21.0ns
U10-M0C5T0 <> U15-M0C7T1 Data Latency : 21.2ns
U10-M0C5T0 <> U17-M1C0T1 Data Latency : 58.4ns
U10-M0C5T0 <> U19-M1C1T1 Data Latency : 58.1ns
U10-M0C5T0 <> U21-M1C2T1 Data Latency : 58.6ns
U10-M0C5T0 <> U23-M1C3T1 Data Latency : 57.5ns
U10-M0C5T0 <> U25-M1C4T1 Data Latency : 59.4ns
U10-M0C5T0 <> U27-M1C5T1 Data Latency : 58.3ns
U10-M0C5T0 <> U29-M1C6T1 Data Latency : 59.2ns
U10-M0C5T0 <> U31-M1C7T1 Data Latency : 58.5ns
U12-M0C6T0 <> U14-M0C7T0 Data Latency : 21.0ns
U12-M0C6T0 <> U16-M1C0T0 Data Latency : 58.6ns
U12-M0C6T0 <> U18-M1C1T0 Data Latency : 58.4ns
U12-M0C6T0 <> U20-M1C2T0 Data Latency : 58.7ns
U12-M0C6T0 <> U22-M1C3T0 Data Latency : 57.9ns
U12-M0C6T0 <> U24-M1C4T0 Data Latency : 59.4ns
U12-M0C6T0 <> U26-M1C5T0 Data Latency : 58.8ns
U12-M0C6T0 <> U28-M1C6T0 Data Latency : 59.4ns
U12-M0C6T0 <> U30-M1C7T0 Data Latency : 59.4ns
U12-M0C6T0 <> U1-M0C0T1 Data Latency : 21.4ns
U12-M0C6T0 <> U3-M0C1T1 Data Latency : 20.7ns
U12-M0C6T0 <> U5-M0C2T1 Data Latency : 22.4ns
U12-M0C6T0 <> U7-M0C3T1 Data Latency : 20.5ns
U12-M0C6T0 <> U9-M0C4T1 Data Latency : 22.7ns
U12-M0C6T0 <> U11-M0C5T1 Data Latency : 20.9ns
U12-M0C6T0 <> U13-M0C6T1 Data Latency : 9.8ns
U12-M0C6T0 <> U15-M0C7T1 Data Latency : 21.0ns
U12-M0C6T0 <> U17-M1C0T1 Data Latency : 58.6ns
U12-M0C6T0 <> U19-M1C1T1 Data Latency : 58.5ns
U12-M0C6T0 <> U21-M1C2T1 Data Latency : 58.6ns
U12-M0C6T0 <> U23-M1C3T1 Data Latency : 58.0ns
U12-M0C6T0 <> U25-M1C4T1 Data Latency : 59.5ns
U12-M0C6T0 <> U27-M1C5T1 Data Latency : 58.9ns
U12-M0C6T0 <> U29-M1C6T1 Data Latency : 59.4ns
U12-M0C6T0 <> U31-M1C7T1 Data Latency : 59.4ns
U14-M0C7T0 <> U16-M1C0T0 Data Latency : 58.9ns
U14-M0C7T0 <> U18-M1C1T0 Data Latency : 58.2ns
U14-M0C7T0 <> U20-M1C2T0 Data Latency : 58.9ns
U14-M0C7T0 <> U22-M1C3T0 Data Latency : 57.7ns
U14-M0C7T0 <> U24-M1C4T0 Data Latency : 59.5ns
U14-M0C7T0 <> U26-M1C5T0 Data Latency : 58.5ns
U14-M0C7T0 <> U28-M1C6T0 Data Latency : 59.7ns
U14-M0C7T0 <> U30-M1C7T0 Data Latency : 59.1ns
U14-M0C7T0 <> U1-M0C0T1 Data Latency : 20.2ns
U14-M0C7T0 <> U3-M0C1T1 Data Latency : 20.4ns
U14-M0C7T0 <> U5-M0C2T1 Data Latency : 21.2ns
U14-M0C7T0 <> U7-M0C3T1 Data Latency : 20.6ns
U14-M0C7T0 <> U9-M0C4T1 Data Latency : 21.6ns
U14-M0C7T0 <> U11-M0C5T1 Data Latency : 21.2ns
U14-M0C7T0 <> U13-M0C6T1 Data Latency : 21.1ns
U14-M0C7T0 <> U15-M0C7T1 Data Latency : 9.6ns
U14-M0C7T0 <> U17-M1C0T1 Data Latency : 58.9ns
U14-M0C7T0 <> U19-M1C1T1 Data Latency : 58.2ns
U14-M0C7T0 <> U21-M1C2T1 Data Latency : 58.9ns
U14-M0C7T0 <> U23-M1C3T1 Data Latency : 57.7ns
U14-M0C7T0 <> U25-M1C4T1 Data Latency : 59.5ns
U14-M0C7T0 <> U27-M1C5T1 Data Latency : 58.4ns
U14-M0C7T0 <> U29-M1C6T1 Data Latency : 59.6ns
U14-M0C7T0 <> U31-M1C7T1 Data Latency : 59.1ns
U16-M1C0T0 <> U18-M1C1T0 Data Latency : 19.4ns
U16-M1C0T0 <> U20-M1C2T0 Data Latency : 21.4ns
U16-M1C0T0 <> U22-M1C3T0 Data Latency : 19.4ns
U16-M1C0T0 <> U24-M1C4T0 Data Latency : 22.4ns
U16-M1C0T0 <> U26-M1C5T0 Data Latency : 20.1ns
U16-M1C0T0 <> U28-M1C6T0 Data Latency : 21.4ns
U16-M1C0T0 <> U30-M1C7T0 Data Latency : 20.3ns
U16-M1C0T0 <> U1-M0C0T1 Data Latency : 58.3ns
U16-M1C0T0 <> U3-M0C1T1 Data Latency : 58.1ns
U16-M1C0T0 <> U5-M0C2T1 Data Latency : 58.4ns
U16-M1C0T0 <> U7-M0C3T1 Data Latency : 57.7ns
U16-M1C0T0 <> U9-M0C4T1 Data Latency : 58.7ns
U16-M1C0T0 <> U11-M0C5T1 Data Latency : 58.1ns
U16-M1C0T0 <> U13-M0C6T1 Data Latency : 58.8ns
U16-M1C0T0 <> U15-M0C7T1 Data Latency : 58.6ns
U16-M1C0T0 <> U17-M1C0T1 Data Latency : 9.7ns
U16-M1C0T0 <> U19-M1C1T1 Data Latency : 19.4ns
U16-M1C0T0 <> U21-M1C2T1 Data Latency : 21.4ns
U16-M1C0T0 <> U23-M1C3T1 Data Latency : 19.4ns
U16-M1C0T0 <> U25-M1C4T1 Data Latency : 22.4ns
U16-M1C0T0 <> U27-M1C5T1 Data Latency : 20.1ns
U16-M1C0T0 <> U29-M1C6T1 Data Latency : 21.4ns
U16-M1C0T0 <> U31-M1C7T1 Data Latency : 20.3ns
U18-M1C1T0 <> U20-M1C2T0 Data Latency : 20.4ns
U18-M1C1T0 <> U22-M1C3T0 Data Latency : 19.8ns
U18-M1C1T0 <> U24-M1C4T0 Data Latency : 21.1ns
U18-M1C1T0 <> U26-M1C5T0 Data Latency : 20.4ns
U18-M1C1T0 <> U28-M1C6T0 Data Latency : 20.3ns
U18-M1C1T0 <> U30-M1C7T0 Data Latency : 20.3ns
U18-M1C1T0 <> U1-M0C0T1 Data Latency : 57.9ns
U18-M1C1T0 <> U3-M0C1T1 Data Latency : 58.0ns
U18-M1C1T0 <> U5-M0C2T1 Data Latency : 58.4ns
U18-M1C1T0 <> U7-M0C3T1 Data Latency : 57.1ns
U18-M1C1T0 <> U9-M0C4T1 Data Latency : 58.7ns
U18-M1C1T0 <> U11-M0C5T1 Data Latency : 57.4ns
U18-M1C1T0 <> U13-M0C6T1 Data Latency : 58.6ns
U18-M1C1T0 <> U15-M0C7T1 Data Latency : 58.1ns
U18-M1C1T0 <> U17-M1C0T1 Data Latency : 19.4ns
U18-M1C1T0 <> U19-M1C1T1 Data Latency : 9.7ns
U18-M1C1T0 <> U21-M1C2T1 Data Latency : 20.4ns
U18-M1C1T0 <> U23-M1C3T1 Data Latency : 19.8ns
U18-M1C1T0 <> U25-M1C4T1 Data Latency : 21.1ns
U18-M1C1T0 <> U27-M1C5T1 Data Latency : 20.4ns
U18-M1C1T0 <> U29-M1C6T1 Data Latency : 20.3ns
U18-M1C1T0 <> U31-M1C7T1 Data Latency : 20.2ns
U20-M1C2T0 <> U22-M1C3T0 Data Latency : 19.6ns
U20-M1C2T0 <> U24-M1C4T0 Data Latency : 22.8ns
U20-M1C2T0 <> U26-M1C5T0 Data Latency : 20.1ns
U20-M1C2T0 <> U28-M1C6T0 Data Latency : 22.2ns
U20-M1C2T0 <> U30-M1C7T0 Data Latency : 20.9ns
U20-M1C2T0 <> U1-M0C0T1 Data Latency : 58.0ns
U20-M1C2T0 <> U3-M0C1T1 Data Latency : 58.5ns
U20-M1C2T0 <> U5-M0C2T1 Data Latency : 58.5ns
U20-M1C2T0 <> U7-M0C3T1 Data Latency : 58.0ns
U20-M1C2T0 <> U9-M0C4T1 Data Latency : 58.6ns
U20-M1C2T0 <> U11-M0C5T1 Data Latency : 58.2ns
U20-M1C2T0 <> U13-M0C6T1 Data Latency : 58.7ns
U20-M1C2T0 <> U15-M0C7T1 Data Latency : 58.6ns
U20-M1C2T0 <> U17-M1C0T1 Data Latency : 21.4ns
U20-M1C2T0 <> U19-M1C1T1 Data Latency : 20.3ns
U20-M1C2T0 <> U21-M1C2T1 Data Latency : 9.7ns
U20-M1C2T0 <> U23-M1C3T1 Data Latency : 19.5ns
U20-M1C2T0 <> U25-M1C4T1 Data Latency : 22.8ns
U20-M1C2T0 <> U27-M1C5T1 Data Latency : 20.1ns
U20-M1C2T0 <> U29-M1C6T1 Data Latency : 22.1ns
U20-M1C2T0 <> U31-M1C7T1 Data Latency : 20.9ns
U22-M1C3T0 <> U24-M1C4T0 Data Latency : 20.6ns
U22-M1C3T0 <> U26-M1C5T0 Data Latency : 20.5ns
U22-M1C3T0 <> U28-M1C6T0 Data Latency : 20.5ns
U22-M1C3T0 <> U30-M1C7T0 Data Latency : 20.6ns
U22-M1C3T0 <> U1-M0C0T1 Data Latency : 57.6ns
U22-M1C3T0 <> U3-M0C1T1 Data Latency : 58.0ns
U22-M1C3T0 <> U5-M0C2T1 Data Latency : 58.2ns
U22-M1C3T0 <> U7-M0C3T1 Data Latency : 57.2ns
U22-M1C3T0 <> U9-M0C4T1 Data Latency : 58.6ns
U22-M1C3T0 <> U11-M0C5T1 Data Latency : 57.5ns
U22-M1C3T0 <> U13-M0C6T1 Data Latency : 58.3ns
U22-M1C3T0 <> U15-M0C7T1 Data Latency : 57.9ns
U22-M1C3T0 <> U17-M1C0T1 Data Latency : 19.7ns
U22-M1C3T0 <> U19-M1C1T1 Data Latency : 19.8ns
U22-M1C3T0 <> U21-M1C2T1 Data Latency : 19.7ns
U22-M1C3T0 <> U23-M1C3T1 Data Latency : 9.7ns
U22-M1C3T0 <> U25-M1C4T1 Data Latency : 20.6ns
U22-M1C3T0 <> U27-M1C5T1 Data Latency : 20.5ns
U22-M1C3T0 <> U29-M1C6T1 Data Latency : 20.7ns
U22-M1C3T0 <> U31-M1C7T1 Data Latency : 20.6ns
U24-M1C4T0 <> U26-M1C5T0 Data Latency : 21.1ns
U24-M1C4T0 <> U28-M1C6T0 Data Latency : 22.9ns
U24-M1C4T0 <> U30-M1C7T0 Data Latency : 21.6ns
U24-M1C4T0 <> U1-M0C0T1 Data Latency : 58.7ns
U24-M1C4T0 <> U3-M0C1T1 Data Latency : 59.5ns
U24-M1C4T0 <> U5-M0C2T1 Data Latency : 59.0ns
U24-M1C4T0 <> U7-M0C3T1 Data Latency : 58.6ns
U24-M1C4T0 <> U9-M0C4T1 Data Latency : 59.4ns
U24-M1C4T0 <> U11-M0C5T1 Data Latency : 58.9ns
U24-M1C4T0 <> U13-M0C6T1 Data Latency : 59.5ns
U24-M1C4T0 <> U15-M0C7T1 Data Latency : 59.4ns
U24-M1C4T0 <> U17-M1C0T1 Data Latency : 22.1ns
U24-M1C4T0 <> U19-M1C1T1 Data Latency : 21.1ns
U24-M1C4T0 <> U21-M1C2T1 Data Latency : 23.0ns
U24-M1C4T0 <> U23-M1C3T1 Data Latency : 20.4ns
U24-M1C4T0 <> U25-M1C4T1 Data Latency : 9.8ns
U24-M1C4T0 <> U27-M1C5T1 Data Latency : 21.1ns
U24-M1C4T0 <> U29-M1C6T1 Data Latency : 22.9ns
U24-M1C4T0 <> U31-M1C7T1 Data Latency : 21.6ns
U26-M1C5T0 <> U28-M1C6T0 Data Latency : 20.9ns
U26-M1C5T0 <> U30-M1C7T0 Data Latency : 21.3ns
U26-M1C5T0 <> U1-M0C0T1 Data Latency : 58.2ns
U26-M1C5T0 <> U3-M0C1T1 Data Latency : 58.6ns
U26-M1C5T0 <> U5-M0C2T1 Data Latency : 58.8ns
U26-M1C5T0 <> U7-M0C3T1 Data Latency : 58.0ns
U26-M1C5T0 <> U9-M0C4T1 Data Latency : 59.2ns
U26-M1C5T0 <> U11-M0C5T1 Data Latency : 58.0ns
U26-M1C5T0 <> U13-M0C6T1 Data Latency : 59.0ns
U26-M1C5T0 <> U15-M0C7T1 Data Latency : 58.5ns
U26-M1C5T0 <> U17-M1C0T1 Data Latency : 20.2ns
U26-M1C5T0 <> U19-M1C1T1 Data Latency : 20.4ns
U26-M1C5T0 <> U21-M1C2T1 Data Latency : 20.4ns
U26-M1C5T0 <> U23-M1C3T1 Data Latency : 20.5ns
U26-M1C5T0 <> U25-M1C4T1 Data Latency : 21.1ns
U26-M1C5T0 <> U27-M1C5T1 Data Latency : 9.7ns
U26-M1C5T0 <> U29-M1C6T1 Data Latency : 20.9ns
U26-M1C5T0 <> U31-M1C7T1 Data Latency : 21.3ns
U28-M1C6T0 <> U30-M1C7T0 Data Latency : 20.9ns
U28-M1C6T0 <> U1-M0C0T1 Data Latency : 58.9ns
U28-M1C6T0 <> U3-M0C1T1 Data Latency : 59.1ns
U28-M1C6T0 <> U5-M0C2T1 Data Latency : 59.2ns
U28-M1C6T0 <> U7-M0C3T1 Data Latency : 58.5ns
U28-M1C6T0 <> U9-M0C4T1 Data Latency : 59.3ns
U28-M1C6T0 <> U11-M0C5T1 Data Latency : 58.7ns
U28-M1C6T0 <> U13-M0C6T1 Data Latency : 59.5ns
U28-M1C6T0 <> U15-M0C7T1 Data Latency : 59.3ns
U28-M1C6T0 <> U17-M1C0T1 Data Latency : 21.4ns
U28-M1C6T0 <> U19-M1C1T1 Data Latency : 20.3ns
U28-M1C6T0 <> U21-M1C2T1 Data Latency : 22.2ns
U28-M1C6T0 <> U23-M1C3T1 Data Latency : 20.2ns
U28-M1C6T0 <> U25-M1C4T1 Data Latency : 22.9ns
U28-M1C6T0 <> U27-M1C5T1 Data Latency : 20.9ns
U28-M1C6T0 <> U29-M1C6T1 Data Latency : 9.8ns
U28-M1C6T0 <> U31-M1C7T1 Data Latency : 20.9ns
U30-M1C7T0 <> U1-M0C0T1 Data Latency : 58.5ns
U30-M1C7T0 <> U3-M0C1T1 Data Latency : 58.7ns
U30-M1C7T0 <> U5-M0C2T1 Data Latency : 59.0ns
U30-M1C7T0 <> U7-M0C3T1 Data Latency : 58.0ns
U30-M1C7T0 <> U9-M0C4T1 Data Latency : 59.5ns
U30-M1C7T0 <> U11-M0C5T1 Data Latency : 58.3ns
U30-M1C7T0 <> U13-M0C6T1 Data Latency : 59.4ns
U30-M1C7T0 <> U15-M0C7T1 Data Latency : 58.9ns
U30-M1C7T0 <> U17-M1C0T1 Data Latency : 20.2ns
U30-M1C7T0 <> U19-M1C1T1 Data Latency : 20.3ns
U30-M1C7T0 <> U21-M1C2T1 Data Latency : 21.0ns
U30-M1C7T0 <> U23-M1C3T1 Data Latency : 20.4ns
U30-M1C7T0 <> U25-M1C4T1 Data Latency : 21.8ns
U30-M1C7T0 <> U27-M1C5T1 Data Latency : 21.2ns
U30-M1C7T0 <> U29-M1C6T1 Data Latency : 21.1ns
U30-M1C7T0 <> U31-M1C7T1 Data Latency : 9.8ns
U1-M0C0T1 <> U3-M0C1T1 Data Latency : 19.6ns
U1-M0C0T1 <> U5-M0C2T1 Data Latency : 21.6ns
U1-M0C0T1 <> U7-M0C3T1 Data Latency : 19.6ns
U1-M0C0T1 <> U9-M0C4T1 Data Latency : 22.0ns
U1-M0C0T1 <> U11-M0C5T1 Data Latency : 20.0ns
U1-M0C0T1 <> U13-M0C6T1 Data Latency : 21.4ns
U1-M0C0T1 <> U15-M0C7T1 Data Latency : 20.2ns
U1-M0C0T1 <> U17-M1C0T1 Data Latency : 57.9ns
U1-M0C0T1 <> U19-M1C1T1 Data Latency : 57.7ns
U1-M0C0T1 <> U21-M1C2T1 Data Latency : 57.8ns
U1-M0C0T1 <> U23-M1C3T1 Data Latency : 57.3ns
U1-M0C0T1 <> U25-M1C4T1 Data Latency : 58.8ns
U1-M0C0T1 <> U27-M1C5T1 Data Latency : 57.9ns
U1-M0C0T1 <> U29-M1C6T1 Data Latency : 58.6ns
U1-M0C0T1 <> U31-M1C7T1 Data Latency : 58.5ns
U3-M0C1T1 <> U5-M0C2T1 Data Latency : 20.8ns
U3-M0C1T1 <> U7-M0C3T1 Data Latency : 20.1ns
U3-M0C1T1 <> U9-M0C4T1 Data Latency : 21.3ns
U3-M0C1T1 <> U11-M0C5T1 Data Latency : 20.6ns
U3-M0C1T1 <> U13-M0C6T1 Data Latency : 20.6ns
U3-M0C1T1 <> U15-M0C7T1 Data Latency : 20.6ns
U3-M0C1T1 <> U17-M1C0T1 Data Latency : 58.4ns
U3-M0C1T1 <> U19-M1C1T1 Data Latency : 58.4ns
U3-M0C1T1 <> U21-M1C2T1 Data Latency : 58.8ns
U3-M0C1T1 <> U23-M1C3T1 Data Latency : 57.7ns
U3-M0C1T1 <> U25-M1C4T1 Data Latency : 59.3ns
U3-M0C1T1 <> U27-M1C5T1 Data Latency : 58.6ns
U3-M0C1T1 <> U29-M1C6T1 Data Latency : 59.3ns
U3-M0C1T1 <> U31-M1C7T1 Data Latency : 59.0ns
U5-M0C2T1 <> U7-M0C3T1 Data Latency : 19.8ns
U5-M0C2T1 <> U9-M0C4T1 Data Latency : 22.9ns
U5-M0C2T1 <> U11-M0C5T1 Data Latency : 20.4ns
U5-M0C2T1 <> U13-M0C6T1 Data Latency : 22.4ns
U5-M0C2T1 <> U15-M0C7T1 Data Latency : 21.1ns
U5-M0C2T1 <> U17-M1C0T1 Data Latency : 58.0ns
U5-M0C2T1 <> U19-M1C1T1 Data Latency : 58.0ns
U5-M0C2T1 <> U21-M1C2T1 Data Latency : 58.3ns
U5-M0C2T1 <> U23-M1C3T1 Data Latency : 57.7ns
U5-M0C2T1 <> U25-M1C4T1 Data Latency : 59.1ns
U5-M0C2T1 <> U27-M1C5T1 Data Latency : 58.4ns
U5-M0C2T1 <> U29-M1C6T1 Data Latency : 58.8ns
U5-M0C2T1 <> U31-M1C7T1 Data Latency : 58.7ns
U7-M0C3T1 <> U9-M0C4T1 Data Latency : 20.7ns
U7-M0C3T1 <> U11-M0C5T1 Data Latency : 20.8ns
U7-M0C3T1 <> U13-M0C6T1 Data Latency : 20.9ns
U7-M0C3T1 <> U15-M0C7T1 Data Latency : 20.8ns
U7-M0C3T1 <> U17-M1C0T1 Data Latency : 58.0ns
U7-M0C3T1 <> U19-M1C1T1 Data Latency : 57.7ns
U7-M0C3T1 <> U21-M1C2T1 Data Latency : 58.3ns
U7-M0C3T1 <> U23-M1C3T1 Data Latency : 57.5ns
U7-M0C3T1 <> U25-M1C4T1 Data Latency : 58.8ns
U7-M0C3T1 <> U27-M1C5T1 Data Latency : 58.4ns
U7-M0C3T1 <> U29-M1C6T1 Data Latency : 58.8ns
U7-M0C3T1 <> U31-M1C7T1 Data Latency : 58.5ns
U9-M0C4T1 <> U11-M0C5T1 Data Latency : 20.8ns
U9-M0C4T1 <> U13-M0C6T1 Data Latency : 22.8ns
U9-M0C4T1 <> U15-M0C7T1 Data Latency : 21.4ns
U9-M0C4T1 <> U17-M1C0T1 Data Latency : 58.4ns
U9-M0C4T1 <> U19-M1C1T1 Data Latency : 58.2ns
U9-M0C4T1 <> U21-M1C2T1 Data Latency : 58.9ns
U9-M0C4T1 <> U23-M1C3T1 Data Latency : 58.1ns
U9-M0C4T1 <> U25-M1C4T1 Data Latency : 59.7ns
U9-M0C4T1 <> U27-M1C5T1 Data Latency : 58.6ns
U9-M0C4T1 <> U29-M1C6T1 Data Latency : 59.3ns
U9-M0C4T1 <> U31-M1C7T1 Data Latency : 59.0ns
U11-M0C5T1 <> U13-M0C6T1 Data Latency : 21.0ns
U11-M0C5T1 <> U15-M0C7T1 Data Latency : 21.2ns
U11-M0C5T1 <> U17-M1C0T1 Data Latency : 58.4ns
U11-M0C5T1 <> U19-M1C1T1 Data Latency : 58.1ns
U11-M0C5T1 <> U21-M1C2T1 Data Latency : 58.6ns
U11-M0C5T1 <> U23-M1C3T1 Data Latency : 57.5ns
U11-M0C5T1 <> U25-M1C4T1 Data Latency : 59.3ns
U11-M0C5T1 <> U27-M1C5T1 Data Latency : 58.2ns
U11-M0C5T1 <> U29-M1C6T1 Data Latency : 59.1ns
U11-M0C5T1 <> U31-M1C7T1 Data Latency : 58.5ns
U13-M0C6T1 <> U15-M0C7T1 Data Latency : 21.0ns
U13-M0C6T1 <> U17-M1C0T1 Data Latency : 58.6ns
U13-M0C6T1 <> U19-M1C1T1 Data Latency : 58.4ns
U13-M0C6T1 <> U21-M1C2T1 Data Latency : 58.7ns
U13-M0C6T1 <> U23-M1C3T1 Data Latency : 58.1ns
U13-M0C6T1 <> U25-M1C4T1 Data Latency : 59.4ns
U13-M0C6T1 <> U27-M1C5T1 Data Latency : 58.7ns
U13-M0C6T1 <> U29-M1C6T1 Data Latency : 59.4ns
U13-M0C6T1 <> U31-M1C7T1 Data Latency : 59.4ns
U15-M0C7T1 <> U17-M1C0T1 Data Latency : 58.9ns
U15-M0C7T1 <> U19-M1C1T1 Data Latency : 58.2ns
U15-M0C7T1 <> U21-M1C2T1 Data Latency : 58.8ns
U15-M0C7T1 <> U23-M1C3T1 Data Latency : 57.7ns
U15-M0C7T1 <> U25-M1C4T1 Data Latency : 59.7ns
U15-M0C7T1 <> U27-M1C5T1 Data Latency : 58.5ns
U15-M0C7T1 <> U29-M1C6T1 Data Latency : 59.6ns
U15-M0C7T1 <> U31-M1C7T1 Data Latency : 59.1ns
U17-M1C0T1 <> U19-M1C1T1 Data Latency : 19.4ns
U17-M1C0T1 <> U21-M1C2T1 Data Latency : 21.4ns
U17-M1C0T1 <> U23-M1C3T1 Data Latency : 19.5ns
U17-M1C0T1 <> U25-M1C4T1 Data Latency : 22.3ns
U17-M1C0T1 <> U27-M1C5T1 Data Latency : 20.1ns
U17-M1C0T1 <> U29-M1C6T1 Data Latency : 21.4ns
U17-M1C0T1 <> U31-M1C7T1 Data Latency : 20.3ns
U19-M1C1T1 <> U21-M1C2T1 Data Latency : 20.3ns
U19-M1C1T1 <> U23-M1C3T1 Data Latency : 19.7ns
U19-M1C1T1 <> U25-M1C4T1 Data Latency : 21.1ns
U19-M1C1T1 <> U27-M1C5T1 Data Latency : 20.4ns
U19-M1C1T1 <> U29-M1C6T1 Data Latency : 20.3ns
U19-M1C1T1 <> U31-M1C7T1 Data Latency : 20.2ns
U21-M1C2T1 <> U23-M1C3T1 Data Latency : 19.6ns
U21-M1C2T1 <> U25-M1C4T1 Data Latency : 22.8ns
U21-M1C2T1 <> U27-M1C5T1 Data Latency : 20.1ns
U21-M1C2T1 <> U29-M1C6T1 Data Latency : 22.1ns
U21-M1C2T1 <> U31-M1C7T1 Data Latency : 20.9ns
U23-M1C3T1 <> U25-M1C4T1 Data Latency : 20.6ns
U23-M1C3T1 <> U27-M1C5T1 Data Latency : 20.5ns
U23-M1C3T1 <> U29-M1C6T1 Data Latency : 20.6ns
U23-M1C3T1 <> U31-M1C7T1 Data Latency : 20.6ns
U25-M1C4T1 <> U27-M1C5T1 Data Latency : 21.1ns
U25-M1C4T1 <> U29-M1C6T1 Data Latency : 22.9ns
U25-M1C4T1 <> U31-M1C7T1 Data Latency : 21.6ns
U27-M1C5T1 <> U29-M1C6T1 Data Latency : 20.9ns
U27-M1C5T1 <> U31-M1C7T1 Data Latency : 21.3ns
U29-M1C6T1 <> U31-M1C7T1 Data Latency : 20.9ns
1x 64bytes Blocks Bandwidth : 26.57GB/s
4x 64bytes Blocks Bandwidth : 29.2GB/s
4x 256bytes Blocks Bandwidth : 103.48GB/s
4x 1kB Blocks Bandwidth : 324GB/s
4x 4kB Blocks Bandwidth : 522GB/s
16x 4kB Blocks Bandwidth : 669.66GB/s
4x 64kB Blocks Bandwidth : 1001.73GB/s
16x 64kB Blocks Bandwidth : 612.24GB/s
8x 256kB Blocks Bandwidth : 600.25GB/s
4x 1MB Blocks Bandwidth : 608.21GB/s
16x 1MB Blocks Bandwidth : 22.37GB/s
8x 4MB Blocks Bandwidth : 18.56GB/s

Benchmark Status
Result ID : AMD Ryzen 9 5950X 16-Core Processor (2M 16C 32T 4.92GHz, 1.9GHz IMC, 16x 512kB L2, 2x 32MB L3)
Microcode : A20F10-1009
Computer : MSI MS-7D13 (MSI MEG B550 UNIFY-X (MS-7D13))
Platform Compliance : x64
No. Threads : 32
System Timer : 10MHz
Page Size : 2MB

Processor
Model : AMD Ryzen 9 5950X 16-Core Processor
URL : https://www.amd.com
Speed : 4.92GHz
Min/Max/Turbo Speed : 2.2GHz - 3.4GHz - 4.92GHz
Modules per Processor : 2 Unit(s)
Cores per Processor : 8 Unit(s)
Threads per Core : 2 Unit(s)
Front-Side Bus Speed : 100MHz
Revision/Stepping : 21 / 0
Microcode : A20F10-1009
L1D (1st Level) Data Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L1I (1st Level) Code Cache : 16x 32kB, 8-Way, Exclusive, 64bytes Line Size, 2 Thread(s)
L2 (2nd Level) Data/Unified Cache : 16x 512kB, 8-Way, Fully Inclusive, 64bytes Line Size, 2 Thread(s)
L3 (3rd Level) Data/Unified Cache : 2x 32MB, 16-Way, Exclusive, 64bytes Line Size, 16 Thread(s)
Rated Power (TDP) : 105.00W

Memory Controller
Speed : 1.9GHz (100%)
Min/Max/Turbo Speed : 950MHz - 1.9GHz

Performance Enhancing Tips
Notice 242 : Dynamic OverClocking/Turbo engaged. Environment conditions may influence performance.
Tip 3 : Double-click tip or press Enter while a tip is selected for more information about the tip.
Hi @KedarWolf. I just finish to testing.. I will continue tomorrow with more cycles, gaming, realbench, OOCT and I guess I'm done with 3800. Pretty similar results between two timings (SCL 2 or 4, ProcODT 48 to 40). SCL 2 will give me more write speed, SCL 4 more read speed. I should see the SiSandra Intercore and Inter-Thread Latency, but I don't know how to export it!! (yet) :)

Loot at your timings with my memories. I would say, Awesome!

2489144


Thanks for your help!
 

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Hey. I managed to stabilize my ram oc, but i have a weird issue(?). I was testing on external ssd with windows to go installed, some essential overclocking tools and few games. It passed every test i gave it for 16h+. Tm5 1usmus/tm5 anta extreme/small fft per thread and all threads/large fft all threads/y cruncher. Everything was fine on external ssd windows.

The issue appeared when i tried to do 2 last tm5 tests again, but on my main windows instead of external windows. Tm5 doesn't give errors, but just stops testing randomly. The timer is still going, but testing just stops. I think it happens when 1 cycle ends and ram gets freed, but new cycle doesn't start. Happens at random cycles (3,9,25,69)., but it doesn't stop if i disable ethernet (read thread with same issue on reddit, but there was no conclusion). With ethernet disabled it passes the tests and doesn't stop. Do you guys know if this is a sign of instability or just windows shenanigans? Tried turning off all programs and test, but it still happens. I think the only big difference between my windows installs is that my main windows has eset antivirus and external ssd just windows defender.

So, should i be worried and try to pinpoint the issue if my main windows passes the tests with ethernet disabled? Haven't encountered any other issues. No whea, no game crashes. Just tm5 stopping randomly with no errors.
 

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OG AMD
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8,954 Posts
Hello guys, need advice
on my b550 taichi + ryzen 5950x + 4x32gb F4-3200C16Q-128GVK (hynix MJR) i can get stable overclock memory at 3533Mhz (dram v1.422, vsoc 1.12 llc1, vddg's auto) maximum, all what above (3600,3666,3733) not stable. played with cad bus, proc's, increased voltages dram to 1.462, soc to 1.2, vddg's to 1.15, vppm to 2.7, vdd to 1.9 but nothing, not stable. I Can pass karhu 1h (even 3 hours) or tm5 (1usmus config) but after reboot errors in tests almost immediately. maybe this is limit board or IMC and i need some special settings or timinngs =\
View attachment 2489140 View attachment 2489141 View attachment 2489142

3533 stable
3666 training and boot ok with procodt 48om, rtt 7/2/1 or 7/3/1 and cad bus 40-20-24-24
3733 problem with memory training and cold boot
4 DR sticks..... seems pretty fast to me but I have limitied experience trying to overclock 128 GB's of RAM. I think I would focus on lowering voltages and latency.
 

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SCL 4, tWRRD 4
tRRD_S 5, tRRD_L 7
tRP 18, tRAS 40, tRC 58
(calculate tRFC from the calculator for 16 gb dimms ~ B-2 mode. 580 tRFC)
Last, try tWR 10 , tRTP 8. Maybe even tRTP 5 @ 1.46v

Example by cm87
SCL 4, tWRRD 4
tRRD_S 5, tRRD_L 7
tRP 18, tRAS 40, tRC 58
(calculate tRFC from the calculator for 16 gb dimms ~ B-2 mode. 580 tRFC)
Last, try tWR 10 , tRTP 8. Maybe even tRTP 5 @ 1.46v

Example by cm87
Hi Veii, I was using the cm87 timings posted and had good results. VDIMM 1.5v
One difference is I couldn't get tRCDRD to go lower than 19 without a BSOD at windows startup. The other difference is drive strengths I use 60-20-30-20 instead which seems to work well for me.

1900 FCLK wont POST, anything above that I can post but will get a ton of WHEA error. 5800x is silver sample according to CTR. Hence my only is to tighten 1867 FCLK

With 2T GDM disable, I was able to complete TM5 1usmus 5 cycle test with no error, would need longer hours/cycles to confirm though.
However for 1T GDM disable, that's another story as I am seemingly 1 TM5 error from 100% stability...
Any tips to reach that? Thank you in advance :)

2489187
 

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Doing some memory testing and received a "voltage cutoff choke" in TM5. Anyone know what that means and more importantly, how do to go about correcting it?
 

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Hi,i need some help to have stable memory setup with my taichi x370.I have 4 dimms 3333cl16 LPX corsair and are not identical.I m running with latest beta leaked bios P6.62 with 5900x.My goal is to set as high as i can without WHEA errors which occur above 3200/IF 1600 with this agesa 1.1.0.0.I dont know how to start with ryzen Calculator as my Hynix memory are my limit.I have manage to run them 3600cl16 but i got whea errors.When i start tuning with Ryzen Calculator recommadations noticed that i reduce WHEA errors but CINE20 test droped 700 points and while the test was running i heard coil wine from the mobo.This is happenig only above 3200/if 1600.Here my best tuned in 3200 without WHEA errors.

Any old friend from taichi @Veii ?Can you help?
2489206
2489207
2489208
 

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Hi,i need some help to have stable memory setup with my taichi x370.I have 4 dimms 3333cl16 LPX corsair and are not identical.I m running with latest beta leaked bios P6.62 with 5900x.My goal is to set as high as i can without WHEA errors which occur above 3200/IF 1600 with this agesa 1.1.0.0.I dont know how to start with ryzen Calculator as my Hynix memory are my limit.I have manage to run them 3600cl16 but i got whea errors.When i start tuning with Ryzen Calculator recommadations noticed that i reduce WHEA errors but CINE20 test droped 700 points and while the test was running i heard coil wine from the mobo.This is happenig only above 3200/if 1600.Here my best tuned in 3200 without WHEA errors.

Any old friend from taichi @Veii ?Can you help? View attachment 2489206 View attachment 2489207 View attachment 2489208
I think your first step is to update your BIOS, AGESA 1.1.0 is ancient!
 

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63 Posts
Hello guys, need advice
on my b550 taichi + ryzen 5950x + 4x32gb F4-3200C16Q-128GVK (hynix MJR)
I know nothing about Hynix MJR, but your voltages are not good, check
Try:

VSOC = 1.1
CLDO VDDP = 0.900
VDDG CCD = 0.940
VDDG IDO = 1.020

My reference is
and this
 

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Old crazy guy
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2,783 Posts
Gave up trying to stabilize the 1T profile without the setup timings; while ClkDrvStr at 120Ohm helps the RTT fails after one hour no matter what.
Tried everything else possible but couldn't make it.

I've decided to focus on optimizing the 1T profile with setup timings.
Got it almost where I'd like to.

2489198
2489213


I could reach even better scores with different timings but this one is better.
Because its consistency in latency is almost perfect.
This kit running at 1T with setup timings seems to be a little more erratic than the usual.

I'm probably just too much obsessed on it; latency jumping up and down every now and then without a reason hurts me :p
I does happen also with GDM and 2T profiles when the timings are very tight; randomly the AIDA latency test goes off the chart.
If you run only the latency test, it can be very often correlated to a drop in CPU Clock frequency.
Sometimes there's a clock drop even if the latency is fine. It's big, down to 4.7 to 4.9 GHz.
And I noticed that if it happens at some point the latency will show an inconsistency, if you repeat again and again the test.

I think the CPU Clock reported by AIDA can be a spotter of slight misalignment in timings.
AIDA runs a small routine at bench start to detect the "top speed" of the CPU (Core 0).
It's probably not exactly the highest clock that can reach but the highest it can reach with that workload.
BoostTester and also Geekbench are not affected by memory timings.
They give the same result unless something is really wrong.
AIDA seems to use a very special routine.

Which is good cause it can be used as a reference and is somewhat consistent.
I guess that it makes PBO to struggle to boost the clock if there's something wrong with timings.
If the CPU Clock crashes down, that's very likely a sign that something is wrong.
Or that Windows decided to run something on Core 0 just at that moment...

So my dogma now is: get the reported CPU Clock at the right frequency AND the latency in the range of +/- 0.1ns repeatedly.
Only this makes me confident the timings are right.
With this profile I could get endless runs with latency between +/- 0.1ns from 54.5ns and CPU Clock at 5100, sometimes 5075 MHz.
Other timings would give me better scores but would "ruin the experience" every now and then.

About the profile settings. I had to forget a lot of rules as always:
  • VDIMM 1.52V and VTT at 750mV, tested for 1h:30m with TM5, 53.1c temp
  • ProcODT and RTT; found the best as 34.3 Ohm 60-24-20-20. It has a huge impact on consistency, most of the time wasted to get it right
  • tRP-tRAS-tRC; 19-21-41/19-21-42 were performing worse than 14-28-42. Got good results with 13-27-41, especially in Write and Copy bandwidth and more stable
  • tRRDS/L; worse for consistency 4/4, set to 4/6
  • tCWL; no option, no POST at 12
  • tWTRS/L and tRTP/tWR; that's the combo where I had to focus a lot to get consistency. tRTP at 10 with tWTRS/L at 5/10 seems to do the magic. tWR below 14 would improve scores but mess consistency, higher just worse.
I have set back the previous "regular" timings; more Copy bandwidth and 0.1ns less in latency.
But CPU Clock crashes often to 5 GHz, almost always the Clock is around 5075 instead of 5100 MHz and repeating the test at some point the latency drops to 55ns.

You need a precise methodology to test latency with CPU Clock, prerequisites and timings are essential.
I had quite some fun with it but that's cause I'm Ab Normal as Igor would say :p
Took some notes for myself to not forget but I have then adapted to a guide, if you have time to waste.

Prerequisites:
  • Clean Windows install
    • Either a dedicated benching install or you need to close every background app and stop every possible windows service
    • Better a dedicated install as you'll have to repeat everything every time you change a timing
  • AIDA64
    • You can use the free version but it'll take much much longer
  • PBO
    • This method does not work with static OC, you really need PBO
    • A very aggressive PBO setting; you need enough margin between a low boost and high boost to determine if something is wrong or not.
      • Example given with my 5950x:
        • Base boost clock (fmax): 5050 MHz
        • Boost clock Max: 125 MHz = 5175 MHz
        • AIDA CPU Clock reported speed:
          • Not acceptable: below 5000 MHz
          • Acceptable: 5000 MHz and beyond (low boost but still boost)
          • First full benchmark: 5100-5125 MHz
          • Latency test after 15 seconds of idle: 5100-5075 MHz
  • How much time Windows need after booting to begin idling
    • Windows is doing always some stuff for a while after the Desktop is available
    • You need to determine how many minutes it needs to settle, for me is 2-3 minutes
    • I have the CPU temperature displayed on the Debug Code LED screen on the Unify-X
      • If you don't have an external sensor, use HWInfo; open it and keep track of how much time is needed for the CPU Temperature to settle flat
      • DO NOT use HWInfo while normally testing with AIDA, only to gather the right timings; even on background will affect latency
  • How much time for the Core 0 to settle after a latency test and get a good boost
    • Latency test runs on Core 0; if it's still too hot from the previous the CPU Clock will be low
    • You need to find the sweet spot that gives you a repeatable high clock (if the timings are not right from start it'll be a bit though, you need to try many times)
      • My sweet spot is 15 seconds to get a repeatable 5100 MHz, sometimes 5075 MHz
      • Below 15 seconds could be 5025/5050 MHz, not high enough to test consistency. CPU could fail to boost, latency could be impacted
      • Longer wait will just consume too much time
Methodology:
  • Your goal is to verify the boost is working as expected and at the same time you get reproducible latency within 0.1ns from the average
  • First run at boot is a full benchmark, subsequent are only latency tests
    • Expected result from full benchmark
      • Read Bandwidth: almost top speed, I assume you start already from a good profile, mostly a matter of primaries
      • Write Bandwidth: doesn't matter if top speed, can be sacrificed for latency consistency (I did it). For single CCD doesn't matter as it's limited to around 30.4 GB/s
      • Copy Bandwidth: as above, doesn't matter if top speed, can be sacrificed for latency consistency.
        • But it's more interesting as it can be a spotter for bad timings; if it drops too low check for inconsistencies
        • Heavily impacted by tertiary timings, ideal to spot problems there
      • CPU Clock: should be the max boost clock that can be triggered by the AIDA workload; for me 5100-5125 MHz
        • Literally anything can cause a drop in reported frequency, a scheduled task, a background process, a butterfly on the other side of the planet, solar wind, a storm of Higgs bosons, Bill lurking on your intimate pictures... it's Windows
        • If it's not reporting the CPU Clock you expect, it could be a bad omen but also nothing, wait for the latency test consistency. If you have a doubt repeat
        • Sometimes despite there are no constraints like load or temperature the CPU will not boost as usual. No other option than repeat
        • If you have big inconsistencies at the first benchmark after boot it could be an issue with ProcODT, RTT, CAD BUS, VDIMM.
          • Big ones like dropping below 5 GHz are usually also evident during consistency checks with frequent latency drops Eg +1-2ns
        • If you are in doubt the current settings are limiting PBO boost close and re-open the Cache & Memory Benchmark window, run only the latency. And again a few times with 15-30 seconds apart to cool the Core 0
          • The bench windows seems static but it's not; if the benchmark ran at least once some refresh timer will run in background, it'll be very hard for the subsequent runs to detect again a clock that high as the first
            • Eg. First run when window is open I get 5100-5125 MHz clock, subsequent even with minutes idle from 5100-5075 MHz. Only a couple of times got a 5125 MHz.
              • Closing and reopening the window I get a very constant 5100-5125 MHz clock
      • Latency: if in the first test the latency is in the 0.1ns tolerance it's a good sign. But it's run after the Copy test, the CPU is hot. As above can be influenced by a whisper
    • Expected result from latency test
      • Repeat the test for at least 10-15 times; at this point you know already if you are good or not
      • Keep track of how many successful tests you can run consecutively; 4-5 times is not good, at least 10-12 you made it, endless is perfect
      • Some random hiccups in CPU Clock or latency can happen. It's Windows. But if they are too frequent, means something is bad
      • CPU Clock: should be the average to max boost clock, for me 5100-5075 MHz stable (more frequent 5100)
        • It can crash down sometimes; if it's still in the acceptable range, for me above 5000 MHz, and the latency is right then I count it successful.
          • Perfection is the king, first benchmark it can happen but you need to aim to zero occurrences in the latency only test
        • If it's an hard crash, for me below 5000 MHz, not good. Can still happen sometimes but must be really rare and not reproduceable
      • Latency:
        • Only count successful if latency is in 0.1ns margin
        • Results in 0.2-0.4ns are fine but don't count them as successful for the consecutive series for consistency, suspect something is wrong if too frequent
        • +1-2ns means bad timings unless it's really a rare event. It's Windows!
        • Perfect is perfect; aim to an endless run after the first benchmark with latency and clock always in check
Steps:
  • Boot Windows and don't run anything else
  • If it's not a clean/benching install, close everything
    • Maybe prepare a batch file that kills and stops
  • Open AIDA64 and launch the Cache & Memory Benchmark
  • Move the mouse cursor over the Start Benchmark button
  • Wait enough time to have Windows settle Eg. 2 minutes
  • Click on the Start button (or press Alt+B)
    • Be careful not to move the mouse cursor, it will impact the CPU Clock routine
  • Check the results
  • Move the mouse cursor over the "ns" in the Latency box
  • Wait enough time for the CPU to settle in temperature, Eg. 30 seconds
  • Double click on "ns"
    • Be careful not to move the mouse cursor, it will impact the CPU Clock routine
  • Count the first run as successful if it meets the criteria, not to be worried if it's not as expected
  • Wait enough time for the CPU to settle in temperature to get a good boost, Eg. 15 seconds
  • Check the results
  • Repeat until you get at least 10-12 consecutive consistent results in a series
    • Perfect is endless run, you give up cause you are tired
  • If too many unacceptable results, reboot, change timings, repeat from start
 

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Registered
Joined
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3,037 Posts
Gave up trying to stabilize the 1T profile without the setup timings; while ClkDrvStr at 120Ohm helps the RTT fails after one hour no matter what.
Tried everything else possible but couldn't make it.

I've decided to focus on optimizing the 1T profile with setup timings.
Got it almost where I'd like to.

View attachment 2489198 View attachment 2489213

I could reach even better scores with different timings but this one is better.
Because its consistency in latency is almost perfect.
This kit running at 1T with setup timings seems to be a little more erratic than the usual.

I'm probably just too much obsessed on it; latency jumping up and down every now and then without a reason hurts me :p
I does happen also with GDM and 2T profiles when the timings are very tight; randomly the AIDA latency test goes off the chart.
If you run only the latency test, it can be very often correlated to a drop in CPU Clock frequency.
Sometimes there's a clock drop even if the latency is fine. It's big, down to 4.7 to 4.9 GHz.
And I noticed that if it happens at some point the latency will show an inconsistency, if you repeat again and again the test.

I think the CPU Clock reported by AIDA can be a spotter of slight misalignment in timings.
AIDA runs a small routine at bench start to detect the "top speed" of the CPU (Core 0).
It's probably not exactly the highest clock that can reach but the highest it can reach with that workload.
BoostTester and also Geekbench are not affected by memory timings.
They give the same result unless something is really wrong.
AIDA seems to use a very special routine.

Which is good cause it can be used as a reference and is somewhat consistent.
I guess that it makes PBO to struggle to boost the clock if there's something wrong with timings.
If the CPU Clock crashes down, that's very likely a sign that something is wrong.
Or that Windows decided to run something on Core 0 just at that moment...

So my dogma now is: get the reported CPU Clock at the right frequency AND the latency in the range of +/- 0.1ns repeatedly.
Only this makes me confident the timings are right.
With this profile I could get endless runs with latency between +/- 0.1ns from 54.5ns and CPU Clock at 5100, sometimes 5075 MHz.
Other timings would give me better scores but would "ruin the experience" every now and then.

About the profile settings. I had to forget a lot of rules as always:
  • VDIMM 1.52V and VTT at 750mV, tested for 1h:30m with TM5, 53.1c temp
  • ProcODT and RTT; found the best as 34.3 Ohm 60-24-20-20. It has a huge impact on consistency, most of the time wasted to get it right
  • tRP-tRAS-tRC; 19-21-41/19-21-42 were performing worse than 14-28-42. Got good results with 13-27-41, especially in Write and Copy bandwidth and more stable
  • tRRDS/L; worse for consistency 4/4, set to 4/6
  • tCWL; no option, no POST at 12
  • tWTRS/L and tRTP/tWR; that's the combo where I had to focus a lot to get consistency. tRTP at 10 with tWTRS/L at 5/10 seems to do the magic. tWR below 14 would improve scores but mess consistency, higher just worse.
I have set back the previous "regular" timings; more Copy bandwidth and 0.1ns less in latency.
But CPU Clock crashes often to 5 GHz, almost always the Clock is around 5075 instead of 5100 MHz and repeating the test at some point the latency drops to 55ns.

You need a precise methodology to test latency with CPU Clock, prerequisites and timings are essential.
I had quite some fun with it but that's cause I'm Ab Normal as Igor would say :p
Took some notes for myself to not forget but I have then adapted to a guide, if you have time to waste.

Prerequisites:
  • Clean Windows install
    • Either a dedicated benching install or you need to close every background app and stop every possible windows service
    • Better a dedicated install as you'll have to repeat everything every time you change a timing
  • AIDA64
    • You can use the free version but it'll take much much longer
  • PBO
    • This method does not work with static OC, you really need PBO
    • A very aggressive PBO setting; you need enough margin between a low boost and high boost to determine if something is wrong or not.
      • Example given with my 5950x:
        • Base boost clock (fmax): 5050 MHz
        • Boost clock Max: 125 MHz = 5175 MHz
        • AIDA CPU Clock reported speed:
          • Not acceptable: below 5000 MHz
          • Acceptable: 5000 MHz and beyond (low boost but still boost)
          • First full benchmark: 5100-5125 MHz
          • Latency test after 15 seconds of idle: 5100-5075 MHz
  • How much time Windows need after booting to begin idling
    • Windows is doing always some stuff for a while after the Desktop is available
    • You need to determine how many minutes it needs to settle, for me is 2-3 minutes
    • I have the CPU temperature displayed on the Debug Code LED screen on the Unify-X
      • If you don't have an external sensor, use HWInfo; open it and keep track of how much time is needed for the CPU Temperature to settle flat
      • DO NOT use HWInfo while normally testing with AIDA, only to gather the right timings; even on background will affect latency
  • How much time for the Core 0 to settle after a latency test and get a good boost
    • Latency test runs on Core 0; if it's still too hot from the previous the CPU Clock will be low
    • You need to find the sweet spot that gives you a repeatable high clock (if the timings are not right from start it'll be a bit though, you need to try many times)
      • My sweet spot is 15 seconds to get a repeatable 5100 MHz, sometimes 5075 MHz
      • Below 15 seconds could be 5025/5050 MHz, not high enough to test consistency. CPU could fail to boost, latency could be impacted
      • Longer wait will just consume too much time
Methodology:
  • Your goal is to verify the boost is working as expected and at the same time you get reproducible latency within 0.1ns from the average
  • First run at boot is a full benchmark, subsequent are only latency tests
    • Expected result from full benchmark
      • Read Bandwidth: almost top speed, I assume you start already from a good profile, mostly a matter of primaries
      • Write Bandwidth: doesn't matter if top speed, can be sacrificed for latency consistency (I did it). For single CCD doesn't matter as it's limited to around 30.4 GB/s
      • Copy Bandwidth: as above, doesn't matter if top speed, can be sacrificed for latency consistency.
        • But it's more interesting as it can be a spotter for bad timings; if it drops too low check for inconsistencies
        • Heavily impacted by tertiary timings, ideal to spot problems there
      • CPU Clock: should be the max boost clock that can be triggered by the AIDA workload; for me 5100-5125 MHz
        • Literally anything can cause a drop in reported frequency, a scheduled task, a background process, a butterfly on the other side of the planet, solar wind, a storm of Higgs bosons, Bill lurking on your intimate pictures... it's Windows
        • If it's not reporting the CPU Clock you expect, it could be a bad omen but also nothing, wait for the latency test consistency. If you have a doubt repeat
        • Sometimes despite there are no constraints like load or temperature the CPU will not boost as usual. No other option than repeat
        • If you have big inconsistencies at the first benchmark after boot it could be an issue with ProcODT, RTT, CAD BUS, VDIMM.
          • Big ones like dropping below 5 GHz are usually also evident during consistency checks with frequent latency drops Eg +1-2ns
        • If you are in doubt the current settings are limiting PBO boost close and re-open the Cache & Memory Benchmark window, run only the latency. And again a few times with 15-30 seconds apart to cool the Core 0
          • The bench windows seems static but it's not; if the benchmark ran at least once some refresh timer will run in background, it'll be very hard for the subsequent runs to detect again a clock that high as the first
            • Eg. First run when window is open I get 5100-5125 MHz clock, subsequent even with minutes idle from 5100-5075 MHz. Only a couple of times got a 5125 MHz.
              • Closing and reopening the window I get a very constant 5100-5125 MHz clock
      • Latency: if in the first test the latency is in the 0.1ns tolerance it's a good sign. But it's run after the Copy test, the CPU is hot. As above can be influenced by a whisper
    • Expected result from latency test
      • Repeat the test for at least 10-15 times; at this point you know already if you are good or not
      • Keep track of how many successful tests you can run consecutively; 4-5 times is not good, at least 10-12 you made it, endless is perfect
      • Some random hiccups in CPU Clock or latency can happen. It's Windows. But if they are too frequent, means something is bad
      • CPU Clock: should be the average to max boost clock, for me 5100-5075 MHz stable (more frequent 5100)
        • It can crash down sometimes; if it's still in the acceptable range, for me above 5000 MHz, and the latency is right then I count it successful.
          • Perfection is the king, first benchmark it can happen but you need to aim to zero occurrences in the latency only test
        • If it's an hard crash, for me below 5000 MHz, not good. Can still happen sometimes but must be really rare and not reproduceable
      • Latency:
        • Only count successful if latency is in 0.1ns margin
        • Results in 0.2-0.4ns are fine but don't count them as successful for the consecutive series for consistency, suspect something is wrong if too frequent
        • +1-2ns means bad timings unless it's really a rare event. It's Windows!
        • Perfect is perfect; aim to an endless run after the first benchmark with latency and clock always in check
Steps:
  • Boot Windows and don't run anything else
  • If it's not a clean/benching install, close everything
    • Maybe prepare a batch file that kills and stops
  • Open AIDA64 and launch the Cache & Memory Benchmark
  • Move the mouse cursor over the Start Benchmark button
  • Wait enough time to have Windows settle Eg. 2 minutes
  • Click on the Start button (or press Alt+B)
    • Be careful not to move the mouse cursor, it will impact the CPU Clock routine
  • Check the results
  • Move the mouse cursor over the "ns" in the Latency box
  • Wait enough time for the CPU to settle in temperature, Eg. 30 seconds
  • Double click on "ns"
    • Be careful not to move the mouse cursor, it will impact the CPU Clock routine
  • Count the first run as successful if it meets the criteria, not to be worried if it's not as expected
  • Wait enough time for the CPU to settle in temperature to get a good boost, Eg. 15 seconds
  • Check the results
  • Repeat until you get at least 10-12 consecutive consistent results in a series
    • Perfect is endless run, you give up cause you are tired
  • If too many unacceptable results, reboot, change timings, repeat from start
I mean, you should just tighten timings with a static overclock then?

If be more concerned as to why L3 latency is at 10.3ns as opposed to the 9.9/10.0 it should be at for 5075/5100.
 

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msi mpg B550 gaming edge wifi, 5600X, 3200c14, 2070S FTW 3 ultra, 8200SX pro 2tb nvme
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247 Posts
hey @Veii when you mentioned, using TM5 and C/O
with HWinfo while holding 4.85 all core/threads with 50mv offset
did you mean -50mv offset?

as it stands today, ive not updated bios, but i upped my C/O from 15,11,11,11,15,15 with 60mv pos offset????

to 17,13,13,15,18,18 with (amd voltage option) inside MSI bios
and to my surprise im stable in y-cruncher *didnt limit PBO just set to motherboard so its insanely high
and was HOT on my chip, but

none the less, voltages did NOT pass above 1.41 max but stayed around 1.37/39
to where as before would hit, around 1.49 peak but stayed around 1.42/45

(edit)--->(all cores and threads stayed within 4.85/4.82 so im fine with that at least)---<(edit)

did i miss or perhaps missunderstand what you said?

-50mv offset or positive 50mv offset to core???

yes im sorry to ask this, but im super confused and went back WAYYYY in the forum
but couldnt find where this was spoke about.

thought i had it bookmarked but i didnt. as i have 20 pages or so bookmarked that
youve noted for all to use...
 

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Registered
msi mpg B550 gaming edge wifi, 5600X, 3200c14, 2070S FTW 3 ultra, 8200SX pro 2tb nvme
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247 Posts
enabling LN2 actually fails post/boot.
same thing on both MSI boards i have, the x570 and B550 gaming edge wifi boards
do the same thing with LN2 mode on (NO POST) on stable settings.

Yes, the TM5 config is the "1usmus default" config file
would you mind uploading this 1usmus default config file?
yes, its on the net and i searched for HOURS and couldnt find it.
found some in another language to which i couldn't understand at ALL

ill have to agree with Time, 4x32 is ALOT of ram to get stable at any frequency really....
4x8 is hard enough (with agesa being changed so much internally)
while some have yet to do 2x8 or 2x16.
if your stable at 3533, then tighten timings and lower voltages
while adjusting CO. unless you can afford to drop 32gb?

whats stable on todays bios may not be stable on tomorrows release (figuratively speaking as seen with this latest 1.2.0.2 agesa release)
 

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Gave up trying to stabilize the 1T profile without the setup timings; while ClkDrvStr at 120Ohm helps the RTT fails after one hour no matter what.
Tried everything else possible but couldn't make it.

I've decided to focus on optimizing the 1T profile with setup timings.
Got it almost where I'd like to.

View attachment 2489198 View attachment 2489213


I could reach even better scores with different timings but this one is better.
Because its consistency in latency is almost perfect.
This kit running at 1T with setup timings seems to be a little more erratic than the usual.

I'm probably just too much obsessed on it; latency jumping up and down every now and then without a reason hurts me :p
I does happen also with GDM and 2T profiles when the timings are very tight; randomly the AIDA latency test goes off the chart.
If you run only the latency test, it can be very often correlated to a drop in CPU Clock frequency.
Sometimes there's a clock drop even if the latency is fine. It's big, down to 4.7 to 4.9 GHz.
And I noticed that if it happens at some point the latency will show an inconsistency, if you repeat again and again the test.

I think the CPU Clock reported by AIDA can be a spotter of slight misalignment in timings.
AIDA runs a small routine at bench start to detect the "top speed" of the CPU (Core 0).
It's probably not exactly the highest clock that can reach but the highest it can reach with that workload.
BoostTester and also Geekbench are not affected by memory timings.
They give the same result unless something is really wrong.
AIDA seems to use a very special routine.

Which is good cause it can be used as a reference and is somewhat consistent.
I guess that it makes PBO to struggle to boost the clock if there's something wrong with timings.
If the CPU Clock crashes down, that's very likely a sign that something is wrong.
Or that Windows decided to run something on Core 0 just at that moment...

So my dogma now is: get the reported CPU Clock at the right frequency AND the latency in the range of +/- 0.1ns repeatedly.
Only this makes me confident the timings are right.
With this profile I could get endless runs with latency between +/- 0.1ns from 54.5ns and CPU Clock at 5100, sometimes 5075 MHz.
Other timings would give me better scores but would "ruin the experience" every now and then.

About the profile settings. I had to forget a lot of rules as always:
  • VDIMM 1.52V and VTT at 750mV, tested for 1h:30m with TM5, 53.1c temp
  • ProcODT and RTT; found the best as 34.3 Ohm 60-24-20-20. It has a huge impact on consistency, most of the time wasted to get it right
  • tRP-tRAS-tRC; 19-21-41/19-21-42 were performing worse than 14-28-42. Got good results with 13-27-41, especially in Write and Copy bandwidth and more stable
  • tRRDS/L; worse for consistency 4/4, set to 4/6
  • tCWL; no option, no POST at 12
  • tWTRS/L and tRTP/tWR; that's the combo where I had to focus a lot to get consistency. tRTP at 10 with tWTRS/L at 5/10 seems to do the magic. tWR below 14 would improve scores but mess consistency, higher just worse.
I have set back the previous "regular" timings; more Copy bandwidth and 0.1ns less in latency.
But CPU Clock crashes often to 5 GHz, almost always the Clock is around 5075 instead of 5100 MHz and repeating the test at some point the latency drops to 55ns.

You need a precise methodology to test latency with CPU Clock, prerequisites and timings are essential.
I had quite some fun with it but that's cause I'm Ab Normal as Igor would say :p
Took some notes for myself to not forget but I have then adapted to a guide, if you have time to waste.

Prerequisites:
  • Clean Windows install
    • Either a dedicated benching install or you need to close every background app and stop every possible windows service
    • Better a dedicated install as you'll have to repeat everything every time you change a timing
  • AIDA64
    • You can use the free version but it'll take much much longer
  • PBO
    • This method does not work with static OC, you really need PBO
    • A very aggressive PBO setting; you need enough margin between a low boost and high boost to determine if something is wrong or not.
      • Example given with my 5950x:
        • Base boost clock (fmax): 5050 MHz
        • Boost clock Max: 125 MHz = 5175 MHz
        • AIDA CPU Clock reported speed:
          • Not acceptable: below 5000 MHz
          • Acceptable: 5000 MHz and beyond (low boost but still boost)
          • First full benchmark: 5100-5125 MHz
          • Latency test after 15 seconds of idle: 5100-5075 MHz
  • How much time Windows need after booting to begin idling
    • Windows is doing always some stuff for a while after the Desktop is available
    • You need to determine how many minutes it needs to settle, for me is 2-3 minutes
    • I have the CPU temperature displayed on the Debug Code LED screen on the Unify-X
      • If you don't have an external sensor, use HWInfo; open it and keep track of how much time is needed for the CPU Temperature to settle flat
      • DO NOT use HWInfo while normally testing with AIDA, only to gather the right timings; even on background will affect latency
  • How much time for the Core 0 to settle after a latency test and get a good boost
    • Latency test runs on Core 0; if it's still too hot from the previous the CPU Clock will be low
    • You need to find the sweet spot that gives you a repeatable high clock (if the timings are not right from start it'll be a bit though, you need to try many times)
      • My sweet spot is 15 seconds to get a repeatable 5100 MHz, sometimes 5075 MHz
      • Below 15 seconds could be 5025/5050 MHz, not high enough to test consistency. CPU could fail to boost, latency could be impacted
      • Longer wait will just consume too much time
Methodology:
  • Your goal is to verify the boost is working as expected and at the same time you get reproducible latency within 0.1ns from the average
  • First run at boot is a full benchmark, subsequent are only latency tests
    • Expected result from full benchmark
      • Read Bandwidth: almost top speed, I assume you start already from a good profile, mostly a matter of primaries
      • Write Bandwidth: doesn't matter if top speed, can be sacrificed for latency consistency (I did it). For single CCD doesn't matter as it's limited to around 30.4 GB/s
      • Copy Bandwidth: as above, doesn't matter if top speed, can be sacrificed for latency consistency.
        • But it's more interesting as it can be a spotter for bad timings; if it drops too low check for inconsistencies
        • Heavily impacted by tertiary timings, ideal to spot problems there
      • CPU Clock: should be the max boost clock that can be triggered by the AIDA workload; for me 5100-5125 MHz
        • Literally anything can cause a drop in reported frequency, a scheduled task, a background process, a butterfly on the other side of the planet, solar wind, a storm of Higgs bosons, Bill lurking on your intimate pictures... it's Windows
        • If it's not reporting the CPU Clock you expect, it could be a bad omen but also nothing, wait for the latency test consistency. If you have a doubt repeat
        • Sometimes despite there are no constraints like load or temperature the CPU will not boost as usual. No other option than repeat
        • If you have big inconsistencies at the first benchmark after boot it could be an issue with ProcODT, RTT, CAD BUS, VDIMM.
          • Big ones like dropping below 5 GHz are usually also evident during consistency checks with frequent latency drops Eg +1-2ns
        • If you are in doubt the current settings are limiting PBO boost close and re-open the Cache & Memory Benchmark window, run only the latency. And again a few times with 15-30 seconds apart to cool the Core 0
          • The bench windows seems static but it's not; if the benchmark ran at least once some refresh timer will run in background, it'll be very hard for the subsequent runs to detect again a clock that high as the first
            • Eg. First run when window is open I get 5100-5125 MHz clock, subsequent even with minutes idle from 5100-5075 MHz. Only a couple of times got a 5125 MHz.
              • Closing and reopening the window I get a very constant 5100-5125 MHz clock
      • Latency: if in the first test the latency is in the 0.1ns tolerance it's a good sign. But it's run after the Copy test, the CPU is hot. As above can be influenced by a whisper
    • Expected result from latency test
      • Repeat the test for at least 10-15 times; at this point you know already if you are good or not
      • Keep track of how many successful tests you can run consecutively; 4-5 times is not good, at least 10-12 you made it, endless is perfect
      • Some random hiccups in CPU Clock or latency can happen. It's Windows. But if they are too frequent, means something is bad
      • CPU Clock: should be the average to max boost clock, for me 5100-5075 MHz stable (more frequent 5100)
        • It can crash down sometimes; if it's still in the acceptable range, for me above 5000 MHz, and the latency is right then I count it successful.
          • Perfection is the king, first benchmark it can happen but you need to aim to zero occurrences in the latency only test
        • If it's an hard crash, for me below 5000 MHz, not good. Can still happen sometimes but must be really rare and not reproduceable
      • Latency:
        • Only count successful if latency is in 0.1ns margin
        • Results in 0.2-0.4ns are fine but don't count them as successful for the consecutive series for consistency, suspect something is wrong if too frequent
        • +1-2ns means bad timings unless it's really a rare event. It's Windows!
        • Perfect is perfect; aim to an endless run after the first benchmark with latency and clock always in check
Steps:
  • Boot Windows and don't run anything else
  • If it's not a clean/benching install, close everything
    • Maybe prepare a batch file that kills and stops
  • Open AIDA64 and launch the Cache & Memory Benchmark
  • Move the mouse cursor over the Start Benchmark button
  • Wait enough time to have Windows settle Eg. 2 minutes
  • Click on the Start button (or press Alt+B)
    • Be careful not to move the mouse cursor, it will impact the CPU Clock routine
  • Check the results
  • Move the mouse cursor over the "ns" in the Latency box
  • Wait enough time for the CPU to settle in temperature, Eg. 30 seconds
  • Double click on "ns"
    • Be careful not to move the mouse cursor, it will impact the CPU Clock routine
  • Count the first run as successful if it meets the criteria, not to be worried if it's not as expected
  • Wait enough time for the CPU to settle in temperature to get a good boost, Eg. 15 seconds
  • Check the results
  • Repeat until you get at least 10-12 consecutive consistent results in a series
    • Perfect is endless run, you give up cause you are tired
  • If too many unacceptable results, reboot, change timings, repeat from start
Hi Mannix.

The first thing I can tell you is that without a doubt you should have the best combined results between bandwidth and latency for 3800. I have a healthy envy about how your memory achieves 1T GDM disabled. I still blame myself for having paid so much for my memories that they claim to be so good but I could have researched a little more and saved a lot of USD! So you can't complain.

Regarding AIDA, the same thing happens to all of us, it is a ritual to try, in fact I always executed HWInfo, or sometimes I had ZenTimmings open. Wouldn't it be better to try Safe Mode instead of doing all that? I just asked KedarWolf to share his BenchOS image with me to build a dual boot and test from Windows just for Benchs. Because killing all the services on a Gamings PC sometimes gets annoying. For now I have 110 services (I lowered it from 250), I have practically nothing installed, but every time I want to play I need to enable XBOX and Gaming Services, EA Services for EA Desktop and so on. Better a dual boot, old windows, debloated and ready.

I go back to what I told you at the beginning, you have the best bandwidth bench and the best latency at 3800, I don't know if someone has surpassed it with 2 CCDs, what you can try is by deactivating the CCD2 and see how it turns out. You would have a 5800x. And in my case, I still think that my mother or perhaps repeated and copied VRMs configuration is not correct. Otherwise, I buy either the dark Hero, which I know doesn't fail, although it doesn't give me anything new, or the Unify-X, which doesn't have Daisy Chain, and for me it has a better VRM controller from what I saw in Buildzoid and also a lot of settings that I don't have in Asus. For me, that only have an RTX 3808 and 3TB in two NVME would be more than enough. I will miss the safe boot button, but lucky it has the clear CMOS! But the real goal is to run at 4000MT/s, and it doesn't depend on motherboards, just AMD BIOS I guess.
 
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