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yes i have 5800x and dark hero

and i habe another question how i know which timming i can put on

tRDWR :
tWRRD :
I don't know of specific formula myself but tWRRD is often 3 on DR, it works for me. If I leave it on auto it goes to 1, which also passes stability tests but Veii recommended 3 a while back.

tRDWR will partly depend on what you have tCWL set to, I can do 14/8, but when going to 12 tCWL lowest I can go is 9. 14/9, 14/10 and 14/11 I've seen as well. Just depends what your sticks can do.
 

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CL=CWL even
CWL=CL-1 odd
RAS=RC-RP
RP=RCD
WR=CL even 100% stable
WTRL=RTP=WR/2
WTRS=3(4)
RCDWR=8
SC=CCDS-3=1
SCL=CCDL-3=2,3,4
SD=DD
RDRDSD/DD=4+RPRE-1
WRWRSD/DD=4+WPRE-1
RDWR=CL-CWL+5+WPRE
WRRD=CWL-CL+4+RPRE
tRFC ns convert timings, round up to the nearest divisible by 16.
 

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View attachment 2528435 View attachment 2528436

so i have tunning my kit with baseline 56 on the addrcmdsetup i tested it right now with [email protected] why my latency are ca 60?
IIRC, AddrCmdSetup will add latency since it's a delay, more than likely it's hiding issues with your other settings as well which mey be auto-corrected further adding to latency. Just eyeballing, some secondaries may be too tight if you haven't tailored interrupt and cad_bus for you individual setup.
 

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Iconoclast
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Alright, pretty sure I've got these setting stable:


Pulled the 2x32GiB of OEM Samsung 16Gb M-die I was using as it likes completely different drive strengths than the Micron 16Gb E-die stuff (not to mention a voltage wall on one of the DIMMs just under the sable voltage of everything else), and slapped in a 2x16GiB kit of 3200MT/s single sided Timetec stuff that I got for free, which said it was Hynix CJR, but is actually also the same 16Gb Micron E-die as in the OEM Kingston DIMMs in my main slots.

Had to bump vSoC, VDDP, and increase the resistance on AddCmdDrvStr, but it's now passing everything I can throw at it.

Tried GDM disabled, and it was actually fairly easy to stabilize, but it's also slightly slower, because I need to loosen tRDRDSCL to 5.

Not going to match many B-die setups, but it's not bad for 96GiB of mismatched garbage I paid ~200 dollars for.
 

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B550 AORUS MASTER, 5800X, 16GB (2×8GB) TEAMGROUP UD4-4000 DDR4 memory, XFX RX 5500 XT
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IIRC, AddrCmdSetup will add latency since it's a delay, more than likely it's hiding issues with your other settings as well which mey be auto-corrected further adding to latency. Just eyeballing, some secondaries may be too tight if you haven't tailored interrupt and cad_bus for you individual setup.
@Skull_Angel

The setup timings do add latency but it's measured in picoseconds

Often performance will outweigh the picoseconds in overclocking use cases
 

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It might be slightly too low soc voltage or iod voltage, that gives latency penalty. Try for instance 1.12v soc, 1.06 iod, 0.94 ccd and 0.9 vddp
this is what i have there

VDDSOC Voltage = 1.1v
DRAM = 1.45v
VDDG CCD Voltage = 0.95v
VDDG IOD Voltage = 1.05v
CLDO VDDP Voltage = 0.975v
 

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this is what i have there

VDDSOC Voltage = 1.1v
DRAM = 1.45v
VDDG CCD Voltage = 0.95v
VDDG IOD Voltage = 1.05v
CLDO VDDP Voltage = 0.975v
Yeah, I saw that, and that is why I suggest slightly higher soc and iod and lower ccd and vddp. Can you try again but change the voltages as I suggested to see if it improves? :)
 

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Yeah, I saw that, and that is why I suggest slightly higher soc and iod and lower ccd and vddp. Can you try again but change the voltages as I suggested to see if it improves? :)
if i put 0.95 on my iod i have then problem (disconnected) on my logitech 🖱
 

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This is great but have you tried;
2T instead of GDM. I assume you have already tried 1T.
SCLs at 2
tRTP at 5 or 6 (5 with 2T, 6 with GDM)
This command rate configuration seems the best/easiest so probably not going to change it. I'll try SCLs at 2 and tRTP at 6 and stress test the next night, thanks
 

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Hi, it's been a while since I've been there, too busy with work.
I got my cousin's PC, he has 4x8 Crucial Micron E-Die C9BVK, I noticed the voltage scaling for tRC and tRFC is zero. Also I am annoying because I cannot follow the basic rule tRC = tRP + tRAS because below 50 impossible to boot. Same for tRFC, below 600 impossible to boot.
I peeled a lot of message, but the topic before too quickly to be able to find an answer to my question: What rule should I apply for tRC?
If in passing you see any inconsistency in the timings let me know. On the image only tRC and tRFC are not optimized, in auto.
@Veii Not that the opinion of others does not interest me far from there, but I must admit that your explanations are always clear and precise, if ever you are still among us, a quick little analysis is no refusal.
Welcome to all who can enlighten me on the EDie Micron.

Font Screenshot Technology Computer Software
 

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Iconoclast
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I got my cousin's PC, he has 4x8 Crucial Micron E-Die C9BVK, I noticed the voltage scaling for tRC and tRFC is zero. Also I am annoying because I cannot follow the basic rule tRC = tRP + tRAS because below 50 impossible to boot. Same for tRFC, below 600 impossible to boot.
Fairly typical for E-die.

I peeled a lot of message, but the topic before too quickly to be able to find an answer to my question: What rule should I apply for tRC?
Still tRP + tRAS. Or more specifically, in your case, the tightest tRC you can run, minus tRP, should be your tRAS.
 
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