I'm not sure what to look at with those photos. You have a lot of fingerprints on the contact pins.On Die Termination feature and generally RTTs behave different on dual rank
it's comparing apples to pears ,just because they grow up in the same soil with the same rain
If you have an A0 PCB design, which starts to fail at 1.48-1.52v, and nearly dies at that (we have had dead A0 dimms here, twice already by people following blind established values)
Mine are not much different.
It's not the IC that fails, usually both my A0 and A2 , between micron and samsung (mind you they are different too, you can't expect everyone to follow jedec designs)
A2 Rev.E start to fail at 1.72ish VDIMM, my A0 B-Dies the ICs start to fail at 1.68v
I think i've reached the IC limit but very well see when PCBs fail and when ICs fail
Dimms do die instantly, but it's nearly never the ICs that mess up, but the PCBs they are on
Sadly it's also no direct post from you, but a quote from another source.
Are you sure about what information you quote me with ?
Because it's the high voltage and exactly the termination impedance's, that depend on what amperage arrives to the dimms and how warm they get
Also it's the high input voltage + strong RTTs that leave such burn residues i can not get away. The 4400 kits and a DR 4267 set (A2 and strange A1 PCB) gotten from a friend, all turned useless
He short-benched them at very high voltages following blind research but there are no way to get stable at all (also yes i do own multiple boards and dimms, if you don't know me)
^ everything i quote is my own source, me ~ based on experience
These are by now old photo's
I hope this is all i have to lookup ~ just because you don't believe me
This was on both A2's , SR and DR
DR i could clean away and they where "fine" although where a strange A1 that trained for over 2 minutes (ripjaws)
View attachment 2560293
No burn/oxidation-marks anymore, yet where clear that they had it (cleaning is bothersome and doesn't go away by propranolol or water)
Cleaning is possible, but all that is not necessary if you just don't follow research blindly
My A0's are perfectly fine to daily 1.65v and my A2 rev.E's in 30° room temp-summer didn't go above 40° without active cooling at 1.68v
Alone that heat differentiates that strongly on RTTs, and i've got a warning that my A0's started to fail at 1.53v (lost channels) ~ i got my lesson , also after messing up @mongoled 's A0's Being equaly resposible for community not knowing what to push and what to lower on over-sensitive weak PCBs
Gladly we don't have to have the same experience, that's good ~ so we don't have to agree & i'm happy that you have no messed up dimms
But based on my experience and community here, RTTs need a fully redo.
Sadly it depends too much on DIMM PCB and Board PCB.
Boardvendors kinda follow AMDs enforced spec, but not always ~ soo sometimes CAD & RTT impedances differ between Vendor's Trace design. So also on Dimms
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They differ way to much, without having a clear indicator of the design & it's not easy to establish "new RTTs"
Also especially since NOM and PARK differ by VDIMM range used
Oh yea, the design files. Also check out all/all if your archive doesn't have other gens.
I'm also not sure what you're trying to point out. A lower RTT impedance raises DQ's voltage relative to VSSQ (Figure 190 in 79-4D; Figure 239 in Micron 16Gbit DDR4); and DQ already has a high impedance (Table 169; table 133).