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That's my bottleneck as well, that trade off.

Like, I need more voltage to be stable but then it gets hotter and makes it temperature unstable. So I lower voltage, temps fine, now it's voltage unstable..

I hate B-Die and it's temp sensitivity.. Max I can run in the summer VDIMM wise is 1.50v. That tops at ~45c which is still stable but 1.53v (for 4500C17) gets to 48c and that is the point at which my DIMM'S go "nope".
That's why I use dimm watercooling ;)
 
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That's my bottleneck as well, that trade off.

Like, I need more voltage to be stable but then it gets hotter and makes it temperature unstable. So I lower voltage, temps fine, now it's voltage unstable..

I hate B-Die and it's temp sensitivity.. Max I can run in the summer VDIMM wise is 1.50v. That tops at ~45c which is still stable but 1.53v (for 4500C17) gets to 48c and that is the point at which my DIMM'S go "nope".
Your kit are so sensitive, my kits get error over 55
 

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You need a really awesome Kit to drive 4600+ at air, to find such a kit is more as difficult, if you don´t select are really highend bin.
Then is your IMC the limit or the board.

It´s much easier to watercooling the dimm´s, but for [email protected]+ you need nevertheless an really awesome kit.
The important difference between low "voltage´s IC´s" like 4000C14 bin that can do high frequency and a also awesome "4700ér Kit" is, it´s at higher temp more boot stable in higher frequency.

But only to find an Kit can do [email protected] is really hard.
 

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Back on my 3800Mhz (4x8GB) profile with more tweaks. Why do you guys think? I'm working with Gen to push the frequency higher.

2517864
 

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don't wanna count my chickens but it seems my 4266 wall was just because my 10850K.

10850K would fail 4300 ~60 seconds into GSAT, 10900K is 15 minutes strong so far.

edit: passed an hour but gonna test for longer later.

2517921
 

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My TRFC at 310 was rock stable before the heat.
Maybe 4c hotter room temp, the rest settings is the same.
Now after 5 min pisses error (tested 2 times and error after about 5 min).
So i take the front chassi off and open window and have now been running 25min without error.
I don't understand..
 

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View attachment 2517692 View attachment 2517693
Hello, who can help go lower than 40ns?
Running Vdimm 1.41 vccio 1.185 SA 1.185.
Do not wanna raise up Vdimm to much.
I cannot go past 4000mhz on this board.
Can tighten timings, but when raise Vdimm to 1.5v and primary to 15 16 35
latency go to 38.9ns but system feels not so responsive.
Also i tried to lower by half Trfc and do not see sny improvement in ns latency.
This ram is Gskill Royal f4 4600 C18 GTRS 1.45V 2x8Gb.
Dont have ppd settings in this motherboard.
Help to go lower if possible, - thanks.
Overclock CPU to 5GHz CPU and 4.7GHz Cache.
 

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Back on my 3800Mhz (4x8GB) profile with more tweaks. Why do you guys think? I'm working with Gen to push the frequency higher.

View attachment 2517864
double click in the empty boxes in AIDA64 instead of clicking "Start Benchmark" and you won't have to run the cache tests 🙃
 

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double click in the empty boxes in AIDA64 instead of clicking "Start Benchmark" and you won't have to run the cache tests 🙃
Or just double click the word memory on the left :)
 
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double click in the empty boxes in AIDA64 instead of clicking "Start Benchmark" and you won't have to run the cache tests 🙃
I know that. :) I want to see cache because I'm trying to work out what is going on with the L2 cache. On default BIOS settings I get around 1000+ gb/s on L2. Something I change manually is dropping this to around 700 gb/s. Does anyone know what would alter the L2 cache?
 

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This seems really weird... It looks like I can run 3900mhz stable with secondary tweaks but 3866 just refuses no matter what I do with the primaries. Guess I should just take the 3900 and be happy. 😊
 

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This seems really weird... It looks like I can run 3900mhz stable with secondary tweaks but 3866 just refuses no matter what I do with the primaries. Guess I should just take the 3900 and be happy. 😊
Not necessarily so weird. One is 133 MHz strap (29 x 133.3333 MHz), the other is 100 MHz strap (39 x 100 MHz). I find 4000 MHz with 133 MHz FCLK strap gives lower performance vs. using 4000 MHz with the 100 MHz FCLK strap. The indication is that the 100 MHz strap is also more stable for me.
 

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Not necessarily so weird. One is 133 MHz strap (29 x 133.3333 MHz), the other is 100 MHz strap (39 x 100 MHz). I find 4000 MHz with 133 MHz FCLK strap gives lower performance vs. using 4000 MHz with the 100 MHz FCLK strap. The indication is that the 100 MHz strap is also more stable for me.
Which one is 133 Mhz strap and which 100 Mhz? I noticed the DRAM ratio is higher at 3900 Mhz.
 

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I see, it's the 3866. So 3866 is changing the bus to 133mhz and this could be why I'm struggling to stabilize 3866?
 

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Which one is 133 Mhz strap and which 100 Mhz? I noticed the DRAM ratio is higher at 3900 Mhz.
Your example:
29 x 133.3333 MHz = 3866 MHz (unstable)
39 x 100 MHz = 3900 MHz (stable)

My example:
30 x 133.3333 MHz = 4000 MHz (worse performance)
40 x 100 MHz = 4000 MHz (good performance)
(for the latter you need to specify FCLK manually, as auto may default to either strap depending on motherboard default behaviour).

Note others have reported being able to get higher memory clocks with 133 MHz, but I guess that depends on numerous factors, for me it was the opposite.

Edit: cross post by us both. Yes, you got it. :)
 
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Going to do some reading on FCLK. :)
 

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Going to do some reading on FCLK. :)
I should clarify that my use of FCLK is probably not precise. That term is more associated with Ryzen Infinity fabric. I think "memory strap" is possibly a better term for intel. BCLK used to be unified across memory, PCIe speed, cache freq, and CPU clock, but in recent Intel generations BCLK for these things have been split and separated so they have become different types of "something-CLK ratios".

For example, on your Asus board, the corresponding BIOS setting is called "BCLK Frequency : RAM Frequency ratio". Either 100:100 or 100:133, I believe.

You might also need to set "DRAM Odd Ratio Mode" to enabled to show all DRAM ratios for all 100 and 133 MHz multiplier combinations.
 

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I should clarify that my use of FCLK is probably not precise. That term is more associated with Ryzen Infinity fabric. I think "memory strap" is possibly a better term for intel. BCLK used to be unified across memory, PCIe speed, cache freq, and CPU clock, but in recent Intel generations BCLK for these things have been split and separated so they have become different types of "something-CLK ratios".

For example, on your Asus board, the corresponding BIOS setting is called "BCLK Frequency : RAM Frequency ratio". Either 100:100 or 100:133, I believe.

You might also need to set "DRAM Odd Ratio Mode" to enabled to show all DRAM ratios for all 100 and 133 MHz multiplier combinations.
So would this explain why when the ring frequency is lower than the ram frequency there is a latency penalty in aida64? For example, 43x ring with 4400 ram gives latency penalty of about 1ns in aida, but when I raise the ring to 44x to match the ram frequency I gain 1 ns. Is this because 43x ring is not found in the 133 divider and I was using the 133 divider for 4400 on the ram(divider was left on auto in the bios)?

What i mean by latency penalty, for example
1. 47x all core w/ 43x ring with [email protected] ram= 37.0ns aida
2. 47x all core w/43x ring with [email protected] ram= 37.9ns aida( or possibly higher than that)
3. 47x all core w/44x ring with [email protected] ram= 37.0ns aida

Is this latency penalty listed in #2. caused by the divider itself that is being used for 4400MHz ram? The divider is on auto and i'm pretty sure it defaults to 133 divider for 4400mhz. Does both the ring frequency and ram frequency have to be on the same divider? or Is there some sort of hidden rule that the ram frequency can't be higher than the ring frequency otherwise latency penalty?

Also, not really related but. Since [email protected] and raising trcd/trp by 2 each to 16-18-18-36-2T gives an extra 100mhz to 4400 at the same latency (along with raising the ring by 1x multiplier), does this mean that raising both trcd/trp by 2 again to 16-20-20-38-2T and increasing the ring to 45 will give me another 100mhz for a total of 4500mhz?

For example,
47x all core w/ 43x ring with [email protected] ram= 37.0ns
47x all core w/44x ring with [email protected] ram= 37.0ns
In theory, would
47x all core w/45x ring with 16-20-20-38-2T be what I need for 4500mhz ram at 37.0ns?
 
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