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Rampage Formula Won't Post At 366 FSB

554 Views 5 Replies 3 Participants Last post by  nolonger
I've been recently trying to find my max stable FSB on my Rampage Formula to get the most out of my overclock, but it steems to cap out at 366MHz on the FSB.

It seems stable at 350MHz 1.25V (although further testing needs to be done), but I can't get it to post at all at 366MHz.

Code:
Code:
[CODE]
ASUS Rampage Formula BIOS 0407 Template

*Extreme Tweaker*
Ai Overclock Tuner               [Manual]
CPU Ratio Setting                [6]
FSB Strap to North Bridge        [Auto]
FSB Frequency                    [366]
PCIE Frequency                   [100]

DRAM Frequency                   [712]
DRAM Command Rate                [Auto]
DRAM CMD Skew on Channal A       [Auto]
DRAM CMD Skew on Channal B       [Auto]
DRAM CLK Skew on Channal A       [Auto]
DRAM CLK Skew on Channal B       [Auto]

DRAM Timing Control              [Manual]
 1st Information
  CAS# Latency                   [5]
  RAS# to CAS# Delay             [6]
  RAS# PRE Time                  [6]
  RAS# ACT Time                  [18]
  RAS# to RAS# Delay             [Auto]
  REF Cycle Time                 [Auto]
  WRITE Recovery Time            [Auto]
  READ to PRE Time               [Auto]
 2nd Information
  READ to WRITE Delay (S/D)      [Auto]
  WRITE to READ Delay (S)        [Auto]
  WRITE to READ Delay (D)        [Auto]
  READ to READ Delay (S)         [Auto]
  READ to READ Delay (D)         [Auto]
  WRITE to WRITE Delay (S)       [Auto]
  WRITE to WRITE Dealy (D)       [Auto]
 3rd Information
  WRITE to PRE Delay             [Auto]
  READ to PRE Delay              [Auto]
  PRE to PRE Delay               [Auto]
  ALL PRE to ACT Delay           [Auto]
  ALL PRE to REF Delay           [Auto]

DRAM Static Read Control         [Auto]
Ai Clock Twister                 [Auto]
Ai Transation Booster            [Auto]
  Common Performance Booster     [Auto]

  Pull-In of CHA PH1             [Auto]
  Pull-In of CHA PH2             [Auto]
  Pull-In of CHA PH3             [Auto]
  Pull-In of CHA PH4             [Auto]
  Pull-In of CHA PH5             [Auto]
  Pull-In of CHA PH6             [Auto]
  Pull-In of CHB PH1             [Auto]
  Pull-In of CHB PH2             [Auto]
  Pull-In of CHB PH3             [Auto]
  Pull-In of CHB PH4             [Auto]
  Pull-In of CHB PH5             [Auto]
  Pull-In of CHB PH6             [Auto]

CPU Voltage                      [1.2]
CPU PLL Voltage                  [Auto]
DRAM Voltage                     [1.8]
NB Voltage                         [1.31]
FSB Termination Voltage          [Auto]
South Bridge Voltage             [Auto]
SB 1,5V Voltage                  [Auto]
Loadline Calibration             [Enabled]
CPU GTL Voltage Reference        [Auto]
NB GTL Voltage Reference         [Auto]
DRAM Controller Voltage REF      [Auto]
DRAM Channel A Voltage REF       [Auto]
DRAM Channel B Voltage REF       [Auto]

CPU LED Selection                [Auto]
NB LED Selection                 [Auto]
SB LED Selection                 [Auto]
Voltiminder LED                  [Auto]

CPU Spread Spectrum              [Disabled]
PCIE Spred Spectrum              [Disabled]

*Advanced settings*
CPU Ratio Setting                [6]
C1E Support                      [Disabled]
CPU TM Function                  []
Vanderpool Technology            []
Execute Disable Bit              []
Max CPUID Value Limit            []
[/CODE]
Can anyone help? Thanks!
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1 - 6 of 6 Posts
maybe a FSB hole? did you try higher than 366, like 380 or 400?
Quote:


Originally Posted by gnolnats
View Post

Are you giving the NB enough volts?

I tried 1.31V max. See the template.

Tried 375 and 400, nothing.
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2
Quote:


Originally Posted by nolonger
View Post

I tried 1.31V max. See the template.

Tried 375 and 400, nothing.

I'm thinking you need somewhere in the neighborhood of 1.55 volts on the NB. I don't think 1.31 is going to cut it, or it definitely wouldn't on my Maximus Formula, which is basically the same board.

Here's some numers from when I was OC'ing a Q9550 (nothing in pink would work, just a prediction of what I was going to try)

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Vtt being FSB Termination Voltage?
1 - 6 of 6 Posts
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