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Who decides this? Do you know something amd doesn’t? It’s roughly within spec. Maybe you designed the chip. And no one asks about llc, is that voltage drooping? It matters.
i know right same thing happend on 3000 series certain people going crazy like they were cpu gods and knew exacty what was gonna kill a cpu I havet had 1 eek of problems out of my 3900x running 1.36 for 2+ years now it has been known 1.35vcore is unoffical safe vcore for 7nm underload im at 1.34-1.35.
 

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Everyone can do allcore with fixed vcore instead of AMD PBO, of course. But that has nothing do to with this thread.
 

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Who decides this? Do you know something amd doesn’t? It’s roughly within spec. Maybe you designed the chip. And no one asks about llc, is that voltage drooping? It matters.
If you're running all-core, you should have LLC set to at least medium, if not high; you want a little voltage variability as possible. My board droops 0.1v at default, but only 0.03v at LLC4; that let's me set 1.05v instead of 1.12v for the same clocks and stability. At idle and gaming the heat output difference in my office is noticeable. I can do 4400/4350 at 1.12v with my current cooling, but my office temps get near 30C, which isn't worth it to me at present.

As for what is safe: Community feedback on ryzen 3000, and some instances starting to come back on 5000 chips now. I myself build a watercooled video production rig for a friend with a 3900X set to 4400/1.35v that lost stability after about 14 months. It wouldn't do 4200 at 1.35v after being 24H prime avx stable when built.

der8auer is doing a test on 3 ryzen 5000 cpus that should be done the first stage on Aug 25th and the year mark is Feb 25th, so that should give us some hard data.
 

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I will never understand, why somebody is using allcore settings for gaming. For video rendering it makes sense, but not at all for gaming. To optimize Ryzen for gaming, PBO an CO is a much better approach and that is, what this thread is about, isn't it?
 

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I will never understand, why somebody is using allcore settings for gaming. For video rendering it makes sense, but not at all for gaming. To optimize Ryzen for gaming, PBO an CO is a much better approach and that is, what this thread is about, isn't it?
This thread is for that mainly, you are correct.

In general, if you have a 5950X for only gaming, you've wasted money. The main gaming use-case is gaming while doing other things, that's where all-core make more sense. You're not getting full boost if you have 16 x265 threads going, and it's very difficult to confirm 100% stability with PBO/CO.
 

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The good rule of thumbs for assessing the maximum voltage, avoiding too much degradation.

-Electromigration and silicon degradation also depend on the t° and the current flowing, through the chip.
-Good binned, low leakage silicon chips, require less voltage, heat up more, don't scale with cold(LN2/Voltage).
-Badly binned, high leakage silicon chips, require more voltage, heat up less, scale with cold(LN2/Voltage).

The maximum voltage range, allowed by standard condition, is dictated by the silicon quality of the chip itself.
For example, pushing the voltage, on a godly binned 3900/3950x, that can run real 7nm voltages (less than 1.25 full load), just to get a bit more PBO boost, is not advised.
On the other hands, pushing high voltage on a badly binned 3600x/3700x, will not degrade too much the cpu, if one cools the chip properly.

I would not go above 1.35v under load, if i know that i own a good and nicely binned cpu.
The better the cpu is, the lower the bar of the max voltage is, that one can apply under load.
 

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If you're running all-core, you should have LLC set to at least medium, if not high; you want a little voltage variability as possible. My board droops 0.1v at default, but only 0.03v at LLC4; that let's me set 1.05v instead of 1.12v for the same clocks and stability. At idle and gaming the heat output difference in my office is noticeable. I can do 4400/4350 at 1.12v with my current cooling, but my office temps get near 30C, which isn't worth it to me at present.

As for what is safe: Community feedback on ryzen 3000, and some instances starting to come back on 5000 chips now. I myself build a watercooled video production rig for a friend with a 3900X set to 4400/1.35v that lost stability after about 14 months. It wouldn't do 4200 at 1.35v after being 24H prime avx stable when built.

der8auer is doing a test on 3 ryzen 5000 cpus that should be done the first stage on Aug 25th and the year mark is Feb 25th, so that should give us some hard data.
Lmao Der8auer trolls people that make these stupid voltage statements as if they know better than AMD does. Here you go:
, yes, it's not specifically static overclock, but DOS overclock, he does this on water. 1.32 + voltage offset. I have a 5900x on dark hero with 1.34v llc 3 47.50 ccx1, 46.50 ccx2 with CB scores above 9400. I mean if your office get hot well that's one thing, a preference and nothing to do with the statement, the point is, the voltages stated are not over the top, that's just fact.
 

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Lmao Der8auer trolls people that make these stupid voltage statements as if they know better than AMD does. Here you go:
, yes, it's not specifically static overclock, but DOS overclock, he does this on water. 1.32 + voltage offset. I have a 5900x on dark hero with 1.34v llc 3 47.50 ccx1, 46.50 ccx2 with CB scores above 9400. I mean if your office get hot well that's one thing, a preference and nothing to do with the statement, the point is, the voltages stated are not over the top, that's just fact.
Correction, it's technically llc 3, but it's auto, I am testing leaving at auto as some have infeered it's preferable to PBO to be on auto. Not enough data on that yet.
 

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so lets get back on topic some we have some proof now 1.35 is safe by amd/asus. One thing i have noticed is with fmax on my cpu will pull 1.38 on cb23 which is a pretty heavy avx load not prime95 heavy but still enough to push 90c on some cooling loops even without fmax iv seen pbo push 1.35 with it on auto. I have a ccd overclock tuned and stable and a C0 overclock also tuned and i think stable most my cores can do -23 had 1 that could only do -4 guess i see why ctr gives my cpu a gold sample.
 

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Is that at SVI2? But yes, I believe I did read for X amount of override voltage is added. Then we have multiplier which makes the cores pursue more voltage if conditions are right. Then we undervolt via CO, maybe a little more with said settings. Then we have power limits, higher EDC is better, no wait lower edc is better! Ah and fmax enhancer actually works now nearly pushing every core over 5 ghz on light single threaded workload, but with DOS thrown in it’s still totally unstable. Then telemetry and voltage offsets. I just want an authoritative source that documents what each nob does in the bios. I’ve read the EYPC server tuning guides, as it’s the closest I can find to at least get some information. Maybe we can divide and conquer as a community and document each nob and it’s behavior. Until the next ASEGA changes pukes on something. I feel like I have been pissing in the wind for the last few months because I just can’t settle lol. I don’t mind doing the homework, reading anything I can but majority of this stuff is undocumented or very poorly documented, maybe it’s time we demand at the very least complete documentation. Ahhh, I digress
 

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This old voltage cherry again lol, same blathering every generation.

To start, DOS is a noob crutch. I've matched or beaten every all core DOS score I've tried to on HWBOT using PBO configured properly. If setup right, PBO is more aggressive than most people are IRT all core boost.

Stop using anything non-amd 7nm as a model of voltage tolerance.

AMD allow 1.5v GET at max freq and max temp for unlimited duration on a single core. This is perfectly fine.

AMD socket specs dictate total power draw not chip tolerance to degradation. Don't believe it, look up power per core across 2xxx, 3xxx, 5xxx chips. 5800x being the stand out, clearly the actual cores are vastly tougher than 5900/5950 limits would lead one to believe or it would not be 140/95/142.

Socket specs were set FOUR(4.5 really)generations ago as a measure to allow board partners to have a minimum spec to build for. It has everything to do with minimum VRM capability and nearly nothing to do with CPU capability.

The CPU's own built in limits happily accommodate well over 1.35v at 4850+mhz all core loads when SMU is controlling boost, no screwing with EDC bug etc, just give it leash and it will run.

Heat is the #1 contributor to degradation. Want fast and long lasting? Invest in cooling to cope, it takes more than the latest lolAIO to keep 59xx chips cold.

TSMC 7nm is vastly more durable to voltage than the claimed node size would lead you to believe. The gate sizr has literally zero to do with interconnect size for voltage. 7nm Ryzen interconnects are beefy, there are technical white papers about it, I suggest you read them before making wild ass claims of 1.3v being too much voltage.

I ran a 3900x 24/7 at EDC bug with only the FIT controller limiting power to chip limits for over a year, zero degradation. Why? Cold. Keep them cold and they don't care. Buy into the idiotuber claims that water-cooling is dead or air cooling is enough for Ryzen and yeah, your chips are going to degrade when OCd hard. These influences, with very few exceptions, know exactly **** all about OCing limits. They exist for you to click stuff, aside from Roman, I can think of only 2 who are hardcore OCers.

You can have your cake or you can eat it. If you want both, you need sub ambient cooling.

PS: All core OC has a place, but it's 100% NOT gaming, period. No scenario conceivable (outside some wild ass edge case) is better all core OC than tuned PBO on Zen3 unless the human tuning it did something wrong.
 

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The documentation exists for PBO settings, however, there is no way to expose the logic behind which settings are prioritized over others outside of testing your configuration (thanks AMD). By configuration I mean, CPU sample, board bios, AGESA revision, cooling solution, PBO settings, etc etc. The whole setup.

Perfect example is scalar.

Scalar = auto my PC is happy. Scalar = anything besides auto I have to drastically cut down on CO adjustments, and boost/scores are commensurate to the change. Scalar shows no change in voltage or max achieved boost levels ony board, but definitely shows stability changes. Clearly I'm bumping into a decision tree point where I'm already on knife edge before scalar is even considered, changing the scalar in any way, pushes me over that edge.

Other people find luck with 1x, some with 5x, some with 10x. Why? It depends where in the boost decision tree your temp, voltage, power, and limits land.

Throw in oddball board builder options, like Asus DOS or Forced OC Mode Disable and you find many aspects are influenced with NO feedback besides test scores.

With Force OC Mode Disable turned on and 101 BCLK and 50x multi CPU-Z single score = 715 at a claimed 5045 mhz effective clock (in reality its boosting past 5050).

With PBO disabled I still get a reported 5050 effective clock, but 705 cpuz single.

R23 scores, PBO tweaked 1686, PBO disabled 1665. Same claimed effective speeds, same claimed voltages, same power limits.

No that's not a margin of error, it's reproducible and repeatable.

Just a couple examples of why any "guide" should be taken at the literal meaning of guide. It is not a how to, that's up to each user, it only shows you the way.

I agree it's a terrible situation for the community who likes to tweak and OC. The trade off is much better performance out of the box.

Board partners and AMD have really screwed OCing up by obfuscating names, functions, and logical function of options. Many are placebo on one generation only to be pivotal on the next. This imho is purely the long term socket effect and board partner laziness to not remove placebo/defunct options from bios revisions (c7h is littered with them).
 

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The documentation exists for PBO settings, however, there is no way to expose the logic behind which settings are prioritized over others outside of testing your configuration (thanks AMD). By configuration I mean, CPU sample, board bios, AGESA revision, cooling solution, PBO settings, etc etc. The whole setup.

Perfect example is scalar.

Scalar = auto my PC is happy. Scalar = anything besides auto I have to drastically cut down on CO adjustments, and boost/scores are commensurate to the change. Scalar shows no change in voltage or max achieved boost levels ony board, but definitely shows stability changes. Clearly I'm bumping into a decision tree point where I'm already on knife edge before scalar is even considered, changing the scalar in any way, pushes me over that edge.

Other people find luck with 1x, some with 5x, some with 10x. Why? It depends where in the boost decision tree your temp, voltage, power, and limits land.

Throw in oddball board builder options, like Asus DOS or Forced OC Mode Disable and you find many aspects are influenced with NO feedback besides test scores.

With Force OC Mode Disable turned on and 101 BCLK and 50x multi CPU-Z single score = 715 at a claimed 5045 mhz effective clock (in reality its boosting past 5050).

With PBO disabled I still get a reported 5050 effective clock, but 705 cpuz single.

R23 scores, PBO tweaked 1686, PBO disabled 1665. Same claimed effective speeds, same claimed voltages, same power limits.

No that's not a margin of error, it's reproducible and repeatable.

Just a couple examples of why any "guide" should be taken at the literal meaning of guide. It is not a how to, that's up to each user, it only shows you the way.

I agree it's a terrible situation for the community who likes to tweak and OC. The trade off is much better performance out of the box.

Board partners and AMD have really screwed OCing up by obfuscating names, functions, and logical function of options. Many are placebo on one generation only to be pivotal on the next. This imho is purely the long term socket effect and board partner laziness to not remove placebo/defunct options from bios revisions (c7h is littered with them).
So it sounds like we agree on the voltage conversation. These guys are literally castrating their CPUs with this stupid low-voltage all-core OCs.. Yes, if you don't have proper cooling things simply get too hot, the cpu is not the issue, it's the cooling. I dunno where these guys get their information.

I may or may not agree on DOS OC. It's just another tool, and if I can actually get it stable, it would be great. But you're right, the thing I am struggling with is my C8H finely tuned CO I can reach what I am stable at all core DOS OC. I thought the whole point of dos OC was pushing past the plateau of CO, which there definitely is but to your point it's depending on the choice, either top all core speeds and cut off some single-threaded boost or vice-versa. I have never seen anyone prove out you can have both. WIth DOS OC I can, but I can't get past most stability tests. So if in the end i can achieve the same speed multicore with tuned C/O as I can with DOS OC, then what's the point? Maybe @shamino1978 can help.

I am not even asking for a guide. Like half the setting in the bios don't even have a help string. I'd be happy with like 3 sentences documenting what each thing does(in a document, not the bios lol). I absolutely understand that each and every feature/setting can't simply be summarized in three sentences, they are too complex with too many interactions. Put a link to a white paper, an overview with a disclaimer it's oversimplified. I agree it's impossible to give prescriptive guidance on 99% of these, as the amount of variables involved is staggering. Really it's just a starting point then you have at least some information and can decide for yourself how/if you want to use it. That's all I am after. I have found some useful information in the AMD developers guide relating to bios, but it's geared towards coding rather than deeper explanation, but at least it's something. The other resource has been computerbase.de forums, now my blood may have german but i don't speak it lol. So translate on the browser makes it invaluable. They seem to be much more of a coordinated community, there is some high-quality content relating to CO, some Bios optimization guides, RAM OC. I can post some translated PDFs if anyone wants them.
 

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The documentation exists for PBO settings, however, there is no way to expose the logic behind which settings are prioritized over others outside of testing your configuration (thanks AMD). By configuration I mean, CPU sample, board bios, AGESA revision, cooling solution, PBO settings, etc etc. The whole setup.

Perfect example is scalar.

Scalar = auto my PC is happy. Scalar = anything besides auto I have to drastically cut down on CO adjustments, and boost/scores are commensurate to the change. Scalar shows no change in voltage or max achieved boost levels ony board, but definitely shows stability changes. Clearly I'm bumping into a decision tree point where I'm already on knife edge before scalar is even considered, changing the scalar in any way, pushes me over that edge.

Other people find luck with 1x, some with 5x, some with 10x. Why? It depends where in the boost decision tree your temp, voltage, power, and limits land.

Throw in oddball board builder options, like Asus DOS or Forced OC Mode Disable and you find many aspects are influenced with NO feedback besides test scores.

With Force OC Mode Disable turned on and 101 BCLK and 50x multi CPU-Z single score = 715 at a claimed 5045 mhz effective clock (in reality its boosting past 5050).

With PBO disabled I still get a reported 5050 effective clock, but 705 cpuz single.

R23 scores, PBO tweaked 1686, PBO disabled 1665. Same claimed effective speeds, same claimed voltages, same power limits.

No that's not a margin of error, it's reproducible and repeatable.

Just a couple examples of why any "guide" should be taken at the literal meaning of guide. It is not a how to, that's up to each user, it only shows you the way.

I agree it's a terrible situation for the community who likes to tweak and OC. The trade off is much better performance out of the box.

Board partners and AMD have really screwed OCing up by obfuscating names, functions, and logical function of options. Many are placebo on one generation only to be pivotal on the next. This imho is purely the long term socket effect and board partner laziness to not remove placebo/defunct options from bios revisions (c7h is littered with them).
Couple more things, given the issues still persist with USB, and may not relate to BCLK, have you experienced instabitliy on your NVME or GPU?
Curious also on your cooling setup? I guess i am mid range, custom loop, EKWB Quantum Velocity Waterblock, EK Thick 360 Rad Push/Pull only for CPU.
On the Scaler it does add voltage, but it's, to your point, based on your silicon quality aka what's good for me may not be for you. Skatterbencher did an extensive review of PBO with hard data on youtube, and proved out that it does infact add voltage should your CPU be able to tolerate higher frequencies
 

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To your first post -

Asus bios are ... Atrocious. They work (ish), they're usually good performers, and usually have a couple of unique features, but Asus deliberately obfuscates things.

Force OC Mode Disabled - great example. It does WAY more than turn boosting back on when BCLK is raised. It, somehow, deceives the SMU lol.

There are other cases in history of Asus naming things names that don't even remotely do what the name implies, to hide the function from competitors.

It really comes down to doing a lot of reading, research and testing to squeeze out the last percent.

Completely agree, it can add voltage, but...only when other points along the path to adding voltage from scalar are not already maxed out precluding it to do so. I've also done extensive controlled testing, and published a white paper on in using zen 2, obviously little translates to zen 3, but I saw the same results with scalar. If the CPU is maxed already, scalar does nothing but cause instability, if there's "headroom" left along the decision tree it will bump voltage to try and hit the next bin up.

Cooling is chilled water with an Optimus Foundation and Conductonaut, heat is a non-issue, I pick my water temps :)

Have been raising baseclock on CPUs for...like 25+ years, I've had 2 corruption events over that time associated with it, 1 on SB-E (1680v2)while using PCIE 3.0 + NVME booting (neither officially supported features for the x79 platform), and one ages ago on Athlon XPs modded to work as Athlon MPs in a dual CPU rig. Both were operating way way out of design specs doing things never intended so they get a pass for wetting the bed lol.

Far fewer than have resulted from playing with memory timings.

NVME - Honestly it seems to be Samsung's drives primarily that don't tolerate it well, I use PNY drives.

GPUs - Never seen an issue I traced back to link speed, even back in the PCI (no E) days when it has hard coupled and highly sensitive.
 

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Proof 1.394v @ 4832 while banging up against the EDC limit is normal behavior on 5950x for any doubters, drop in CO with PBO at sock limits and that climbed to 4933 @ 1.38v.

PBO DISABLED in this shot...
 

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To your first post -

Asus bios are ... Atrocious. They work (ish), they're usually good performers, and usually have a couple of unique features, but Asus deliberately obfuscates things.

Force OC Mode Disabled - great example. It does WAY more than turn boosting back on when BCLK is raised. It, somehow, deceives the SMU lol.

There are other cases in history of Asus naming things names that don't even remotely do what the name implies, to hide the function from competitors.

It really comes down to doing a lot of reading, research and testing to squeeze out the last percent.

Completely agree, it can add voltage, but...only when other points along the path to adding voltage from scalar are not already maxed out precluding it to do so. I've also done extensive controlled testing, and published a white paper on in using zen 2, obviously little translates to zen 3, but I saw the same results with scalar. If the CPU is maxed already, scalar does nothing but cause instability, if there's "headroom" left along the decision tree it will bump voltage to try and hit the next bin up.

Cooling is chilled water with an Optimus Foundation and Conductonaut, heat is a non-issue, I pick my water temps :)

Have been raising baseclock on CPUs for...like 25+ years, I've had 2 corruption events over that time associated with it, 1 on SB-E (1680v2)while using PCIE 3.0 + NVME booting (neither officially supported features for the x79 platform), and one ages ago on Athlon XPs modded to work as Athlon MPs in a dual CPU rig. Both were operating way way out of design specs doing things never intended so they get a pass for wetting the bed lol.

Far fewer than have resulted from playing with memory timings.

NVME - Honestly it seems to be Samsung's drives primarily that don't tolerate it well, I use PNY drives.

GPUs - Never seen an issue I traced back to link speed, even back in the PCI (no E) days when it has hard coupled and highly sensitive.
Ahhh that has been the next thing on my list. I guess I was worried about condensation. What kind of chiller do you use?
 

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been getting clock watchdog timeout bsod now, among other weird and annoying behaviour.
might have to rma my 5950x.
 
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