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Meddling user
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Wanted to clear a common misconception people seem to have: The "Northbridge Frequency" displayed by CPU-Z is NOT the FCLK (fabric) frequency. Instead it is the frequency of the memory controller itself (UCLK). Normally both FCLK and UCLK operate at the same speed (MEMCLK). When FCLK and MEMCLK are desynchronised, UCLK will be set to 1/2 mode. Regardless if you lower or raise it below / above the MEMCLK. For example, if MEMCLK = 3200MHz and FCLK is anything else than 1600MHz, the UCLK frequency will be MEMCLK / 2 (i.e. 800MHz).

No third party software (for the time being) can monitor FCLK frequency.

Hi @The Stilt , not really what I found. First boot with a Ryzen 5 3600 in my C7H with Gskill flare x set to docp 3200 cl 14 the nb spped in cpuz read 1000, when I restarted znd set the fclk speed to 1600 it showed 1600 as nb speed in cpuz. Same as when set to 3600 mem speed and 1800 fclk speed.
It is defo UCLK in my case, even though I initially thought it was FCLK. Johan45 was the first to explain to me it is UCLK.

For example VPII set say 3666MHz, which is 1833MHz RAM, FCLK will be 1833MHz if manually set, but as the UCLK will go MEMCLK/2 you should see ~917MHz. See the screenie in this post, I target 3533MHz (ie 1767MHz), 883MHz would be UCLK when MEMCLK/2=UCLK.

@gupsterg

NP. I didnt know if it was potentially dangerous or not, but hey, better be safe than sorry :thumb:
Thanks again :thumb: , fully appreciated :thumb: .

@gupsterg

Forgot I had my X370 C6H, updated BIOS to 7106 (AGESA 1002) AUTO OC + 200 MHz. Have not done any too much timings tightening and probably won't have time for the mean time (have to return chip). But anyways, was fun to meddle with. 3600 does seem to have more headroom.

P.S. Forgot C6H has the worst positioning for multimeter read points lulz
Nice :) , I cancelled my R7 3700X pre-order this morning, the R5 3600 is good enough fun for me :) .

Be aware under load the Probeit points on C6H are affected by load line to planes (C7H isn't), there was a post by Elmor in the C6H thread and also should be in the OP of Ryzen Essential thread in my signature. You are better off setting a faster polling rate in HWINFO (~500ms or lower), then referencing the average SVI2 VCORE/SOC.

Yesterday to me felt wasted for me, I didn't get what I thought I'd get done. Any how this morning I am back testing what I'd like to be :) .

Without CPU OC this is how my CPU sits with MEMCLK/FCLK/UCLK 1:1:1:-

3533S SOC: 1.025V CLDO_VDDG: 0.985V VDIMM: 1.35V
3600S SOC: 1.025V CLDO_VDDG: 0.985V VDIMM: 1.355V
3666S SOC: 1.043V CLDO_VDDG: 1.003V VDIMM: 1.385V ProcODT: 48

Highest RAM profile is repeat pass in Kahru RAM Test of ~3000%, yet to run other tests. When combining it with PBO+150MHz it seems I need higher SOC & CLDO_VDDG.

3666S with PBO+150MHz PPT: 142W TDC: 95A EDC: 140A Scalar: 6x:-

SOC: 1.043V CLDO_VDDG: 1.003V fails ~400% tested twice in RAM Test
SOC: 1.050V CLDO_VDDG: 1.010V fails ~800% tested twice in RAM Test
SOC: 1.056V CLDO_VDDG: 1.016V fails ~1890% tested once in RAM Test

Upto PBO+100MHz I do not need to adjust scalar to have nice ACB of upto 4.3GHz in RAM Test. Over +100MHz I need to adjust this to have improved sustainable all cores frequency. +125MHz IIRC needs at least 4x, +150MHz seems right with 6x, not tried 7x yet. Below video will show clocks, etc.

 

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Tetrapyloctomist
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VDDP != (not) cLDO_VDDP.

cLDO_VDDP defaults to 0.900V on Matisse and is sourced from VDDCR_SoC.
Because of that, the same rules that apply on cLDO_VDDG apply on it as well.
And changing VDDCR_SoC & cLDO_VDDG as needed and keep to rule you posted before of allowing at least ~40mV gap between it and cLDO_VDDG
After thanking everyone involved in this once again (those quoted included of course), may i ask we .. consolidate this all somewhere? Perhaps just updating the OP even.
It's that typical situation where you have one post with facts, followed by 478452 posts of people trying stuff out; very natural, albeit with the cost of the important stuff getting lost somewhere along the road.
Request over, back to reading :)
 

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Can someone pls check my values (especially voltages)?
I think i need to lower some of the voltages, would be happy if you could tell me the numbers what i should try?
Thx in advance and greetings from Germany.
(Its only a quick aida test...)

Edit: Cant change CLDO VDDP Voltage to 0.9V in Tweakers Paradise in the Bios, it switches to 0 if i do so. What am i doing wrong?
 

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Meddling user
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Can someone pls check my values (especially voltages)?
I think i need to lower some of the voltages, would be happy if you could tell me the numbers what i should try?
Thx in advance and greetings from Germany.
(Its only a quick aida test...)

Edit: Cant change CLDO VDDP Voltage to 0.9V in Tweakers Paradise in the Bios, it switches to 0 if i do so. What am i doing wrong?
Value needs to me entered as mV, so if you want 0.9V enter 900. Usually there is help string there stating this, perhaps missing.

From your HWINFO screenie seems as if your using something like manually set SOC of 1.062V if so manually set CLDO_VDDG 1.022V.
 

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Value needs to me entered as mV, so if you want 0.9V enter 900. Usually there is help string there stating this, perhaps missing.

From your HWINFO screenie seems as if your using something like manually set SOC of 1.062V if so manually set CLDO_VDDG 1.022V.
Ah ok thx.
This is how it looks now, any other suggestions?
 

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Meddling user
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Ah ok thx.
This is how it looks now, any other suggestions?
NP :) .

Other than stability test and tweak as required I think your good to go :thumb: .

Seeing things like 3733MHz on Ryzen is unnerving :D :thumb: ....
 

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I've not seen others doing it, but personally PBO did very little for me on my x3900, depending on BIOS and settings was always around 4075-4125 all core (Gigabyte Master x570, on a custom water loop, max temp was never over 58.8c). Single core is never seen above 4325 in CPU-Z for example and Cinebench 20 single core is closed to 4200MHZ (yes it does boost all the way up to 4600 but so such a short period I've never seen it only in charts).

What I found was helpful was bumping the Frontside BUS from 100 to 102.5, that gains me almost exactly 2.7% in Cinebench and CPU-Z multi-core and closer to 4% in single core, though for some reason the temp does increase to closer to 65c under load.

I have CPU core set at Normal on this MB with a -0.05 offset right now, not sure how low to push this however.

So my Single core in CPU-Z as an example went from appx. 535 to 555 as it changed by a few with each run. Multicore is now running about 8470.

ERIC
 

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Meddling user
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Meddling user
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Premium Member
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Discussion Starter · #152 ·
@The Stilt

Roger any guidance on which P95 to use and temperature to be considered ok?

Temperatures are pretty ok.
95°C is the official TjMax, but you don't want to exceed 85°C or so.

I suggest you use P95 29.8b3 version.
For maximum load, use 256-256 FFT size, Run FFTs in-place. If you run AVX/AVX2/FMA3 disabled (local.txt) use 160-160 Run FFTs in-place option.

I don't recommend running 256-bit Prime95 at > 1.250V thou...
 

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Premium Member
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Discussion Starter · #153 ·
Which 9900K stepping do you have?



Also, could you test Matisse, Coffee Lake Refresh, and Skylake-X Refresh at 8C/16T?
P0.

My multithreaded results were discarded due to the bios bug on Matisse and I am not going to retest them.
Several days of work, no ROI.

Sorry.
 

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Meddling user
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Temperatures are pretty ok.
95°C is the official TjMax, but you don't want to exceed 85°C or so.

I suggest you use P95 29.8b3 version.
For maximum load, use 256-256 FFT size, Run FFTs in-place. If you run AVX/AVX2/FMA3 disabled (local.txt) use 160-160 Run FFTs in-place option.

I don't recommend running 256-bit Prime95 at > 1.250V thou...
Thanks as always :thumb: .

When you say "I don't recommend running 256-bit Prime95 at > 1.250V thou..." disable AVX2?
 

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Discussion Starter · #155 ·
Thanks as always :thumb: .

When you say "I don't recommend running 256-bit Prime95 at > 1.250V thou..." disable AVX2?
local.txt >>
CpuSupportsAVX=0
CpuSupportsFMA3=0
CpuSupportsFMA4=0
CpuSupportsAVX2=0

The thing is, to properly test the stability (i.e. all workloads) you need to test with FMA3, since there is no offset.
But it is not wise, especially if you are pushing.
 

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81*C is how hot a stock 3600 runs in SmallFFT's...with a 360mm AiO. Yet the cooler is barely warm, I've tried this on 3 different coolers and got similar results. TIM was evenly spread Kryonaut. Some pre-release reviews showed the same behaviour, almost 90*c on weaker coolers.
I hate to be the doomsayer but won't the 3900/3950X be hitting Tjmax all the time in SmallFFT's?

 

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Premium Member
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Discussion Starter · #157 ·
81*C is how hot a stock 3600 runs in SmallFFT's...with a 360mm AiO. Yet the cooler is barely warm, I've tried this on 3 different coolers and got similar results. TIM was evenly spread Kryonaut. Some pre-release reviews showed the same behaviour, almost 90*c on weaker coolers.
I hate to be the doomsayer but won't the 3900/3950X be hitting Tjmax all the time in SmallFFT's?

https://youtu.be/gVgO0Fsszls
The limitations on 2 CCD SKUs are similar to the 1 CCD ones.
The total power will be higher, but the per CCD intensity (which is the biggest) issue is the same or slightly lower (due to higher quality silicon).
Twice the watts roughly, but twice the surface area as well.
 

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That's true, the 3900X has a second CCD with 6 cores. It shouldn't matter that much then. I'm still battling WHEA errors in HWInfo64, every now and then it counts one for the PCIe controller even without overclocking.
 
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