[switched.com]Thumbnail-Sized Chip Holds 1 TB

593 Views 7 Replies 8 Participants Last post by Gexx, Nov 25, 2009

Poppinj

Discussion Starter · Nov 25, 2009

Quote:

Engineers at North Carolina State University have created a computer chip that holds one terabyte -- or 1,000 gigabytes -- of data and is no larger than a fingernail. For perspective, that means you could store 20 high-definition DVDs or 250 million pages of text on this tiny chip. According to Computer World, this modern marvel is made possible by a process called selective doping, in which engineers add an impurity to a material in order to change its properties. In this case, it results in a drastic reduction in size.

Not only does this breakthrough affect data storage, but it has implications for 'green' technology, too. For example, engineers could use selective doping to build ceramic engines that could withstand higher temperatures. That possible outcome, lead engineer Jagdish "Jay" Narayan says, could lead to better fuel efficiency. Doping could also better solar energy by improving the thermal conductivity of the materials used.

While the potential here for energy conservation is great, we still can't get over the fact that this chip has more than 50-times the storage capacity of other silicon-based chips. [From: Computer World]

Its the whole article. Its pretty short. I swear I see something like this once a month for years, about new storage methods or chips that increase capacity uberfold, but havnt seen anything hit the market.

http://www.switched.com/2009/10/24/t...of-20-hd-dvds/

It also links to a longer computer world article.

http://www.computerworld.com/s/artic...il_sized_chip_

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aksthem1

· #2 · Nov 25, 2009

I wonder when we will get 1GB of L2 or L3 cache now. Doubting the size of L1 cache being past 128KB on 64bit CPUs.

MMM 1TB flash drives.

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JKBenchmarks

· #3 · Nov 25, 2009

Mmm... 1 Petabyte SSD's.

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Ethatron

· #4 · Nov 25, 2009

Quote:

Originally Posted by aksthem1

I wonder when we will get 1GB of L2 or L3 cache now. Doubting the size of L1 cache being past 128KB on 64bit CPUs.

Speed and capacity are two different things. The conditions for 3GHz+ "storage" very probably don't match with what's possible with big "storage".

I doubt (uneducated

) SSDs for example work under 95Â°, assuming you would put a 0.05" 2GB SSD aside the four+ cores; that's apart of the problem of limited re-writability. The other problem is latency, throughput of GDDR5 can be higher than than L1-cache but it still has x-times latency. All the other stuff has even worst latencies.

If there wouldn't be contradicting gain/loose factors in these parts we wouldn't have any cache-cascades at all, 2MB+ L0 cache for each pipeline and done.

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